Nexperia-BSP250-135
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DISCRETE SEMICONDUCTORS
DATA SHEET
BSP250
P-channel enhancement mode
vertical D-MOS transistor
1997 Jun 20
Product specification
Supersedes data of November 1994
File under Discrete Semiconductors, SC13b
Philips Semiconductors
Product specification
P-channel enhancement mode
vertical D-MOS transistor
BSP250
FEATURES
PINNING – SOT223
•
High-speed switching
•
No secondary breakdown
•
Very low on-resistance.
PIN
SYMBOL
DESCRIPTION
1
2
3
4
g
d
s
d
gate
drain
source
drain
APPLICATIONS
•
Low-loss motor and actuator drivers
•
Power switching.
DESCRIPTION
handbook, halfpage
4
d
s
P-channel enhancement mode vertical D-MOS transistor
in a SOT223 plastic SMD package.
g
CAUTION
1
2
3
The device is supplied in an antistatic package.
The gate-source input must be protected against static
discharge during transport or handling.
Top view
MAM121
Fig.1 Simplified
outline and symbol.
QUICK REFERENCE DATA
SYMBOL
V
DS
PARAMETER
CONDITIONS
MIN.
MAX.
−
30
UNIT
drain-source voltage (DC)
source-drain diode forward voltage
gate-source voltage (DC)
gate-source threshold voltage
drain current (DC)
−
V
V
V
V
A
Ω
W
V
SD
I
S
=
−
1.25 A
−
−
1.6
±
20
−
2.8
−
3
V
GSO
V
GSth
I
D
open drain
−
I
D
=
−
1 mA; V
DS
= V
GS
−
1
−
R
DSon
P
tot
drain-source on-state resistance
total power dissipation
I
D
=
−
1 A; V
GS
=
−
10 V
T
s
= 100
°
C
−
0.25
5
−
1997 Jun 20
2
Philips Semiconductors
Product specification
P-channel enhancement mode
vertical D-MOS transistor
BSP250
LIMITING VALUES
In accordance with the Absolute Maximum Rating System (IEC 134).
SYMBOL
PARAMETER
drain-source voltage (DC)
CONDITIONS
MIN.
MAX.
−
30
UNIT
V
DS
V
GSO
I
D
−
−
−
−
−
−
V
V
A
A
gate-source voltage (DC)
drain current (DC)
open drain
±
20
−
3
T
s
≤
100
°
C
note 1
I
DM
P
tot
peak drain current
−
12
5
total power dissipation
T
s
= 100
°
C
W
W
°
C
°
C
T
amb
= 25
°
C; note 2
1.65
+150
150
T
stg
T
j
storage temperature
−
65
operating junction temperature
−
Source-drain diode
I
S
source current (DC)
peak pulsed source current
T
s
≤
100
°
C
−
−
−
1.5
−
6
A
A
I
SM
note 1
Notes
1. Pulse
width and duty cycle limited by maximum junction temperature.
2. Device
mounted on an epoxy printed-circuit board, 40
×
40
×
1.5 mm; mounting pad for drain lead minimum 6 cm
2
.
MLB885
MLB835
2
2.0
−
10
handbook, halfpage
handbook, halfpage
P
tot
(W)
I
D
(A)
1.6
−
10
(1)
t
p =
10
µ
s
1.2
0.8
0.4
−
1
1 ms
t
p
DC
P
=
δ
T
−
1
−
10
t
t
p
T
−
2
−
10
−
10
0
0
−
1
2
−
1
−
10
−
10
50
100
150
200
(
°
C)
V
(V)
DS
T
amb
δ
= 0.01.
Soldering point temperature T
s
= 100
°
C.
(1) R
DSon
limitation.
Fig.2 Power
derating curve.
Fig.3 SOAR.
1997 Jun 20
3
Philips Semiconductors
Product specification
P-channel enhancement mode
vertical D-MOS transistor
BSP250
THERMAL CHARACTERISTICS
SYMBOL
PARAMETER
CONDITIONS
note 1
VALUE
UNIT
R
th j-a
R
th j-s
thermal resistance from junction to ambient
75
10
K/W
K/W
thermal resistance from junction to soldering point
Note
1. Device
mounted on an epoxy printed-circuit board, 40
×
40
×
1.5 mm; mounting pad for drain lead minimum 6 cm
2
.
CHARACTERISTICS
T
j
= 25
°
C unless otherwise specified.
SYMBOL
PARAMETER
drain-source breakdown voltage
gate-source threshold voltage
drain-source leakage current
gate leakage current
CONDITIONS
V
GS
= 0; I
D
=
−
10
µ
A
V
GS
= V
DS
; I
D
=
−
1 mA
V
GS
= 0; V
DS
=
−
24 V
V
GS
=
±
20 V; V
DS
= 0
V
GS
=
−
10 V; V
DS
=
−
1 V
MIN.
−
30
TY
P
.
M
AX. UNIT
V
(BR)DSS
V
GSth
I
DSS
−
−
V
−
1
−
−
−
2.8
−
100
±
100
−
V
−
nA
nA
A
I
GSS
−
−
I
Don
on-state drain current
−
3
−
1
−
−
V
GS
=
−
4.5 V; V
DS
=
−
5 V
V
GS
=
−
4.5 V; I
D
=
−
0.5 A
GS
=
−
10 V; I
D
=
−
1 A
V
DS
=
−
20 V; I
D
=
−
1 A
−
−
A
R
DSon
drain-source on-state resistance
0.33
0.22
2
0.4
0.25
−
Ω
V
−
Ω
y
fs
C
iss
C
oss
C
rss
Q
G
forward transfer admittance
input capacitance
1
S
V
GS
= 0; V
DS
=
−
20 V; f = 1 MHz
−
V
GS
= 0; V
DS
=
−
20 V; f = 1 MHz
−
V
GS
= 0; V
DS
=
−
20 V; f = 1 MHz
−
250
140
50
10
−
pF
pF
pF
nC
output capacitance
−
reverse transfer capacitance
total gate charge
−
V
GS
=
−
10 V; V
DS
=
−
15 V;
I
D
=
−
2.3 A
−
−
−
25
Q
GS
Q
GD
gate-source charge
gate-drain charge
V
GS
=
−
10 V; V
DS
=
−
15 V;
I
D
=
−
2.3 A
1
3
−
−
nC
nC
V
GS
=
−
10 V; V
DS
=
−
15 V;
I
D
=
−
2.3 A
Switching times
t
on
turn-on time
V
GS
= 0 to
−
10 V; V
DD
=
−
20 V;
I
D
=
−
1 A; R
L
= 20
Ω
−
−
20
50
80
ns
ns
t
off
turn-off time
V
GS
=
−
10 to 0 V; V
DD
=
−
20 V;
I
D
=
−
1 A; R
L
= 20
Ω
140
Source-drain diode
V
SD
t
rr
source-drain diode forward voltage
V
GD
= 0; I
S
=
−
1.25 A
−
−
−
−
1.6
V
reverse recovery time
I
S
=
−
1.25 A; di/dt = 100 A/
µ
s
150
200
ns
1997 Jun 20
4
Philips Semiconductors
Product specification
P-channel enhancement mode
vertical D-MOS transistor
BSP250
MBE144
MBE149
600
−
12
handbook, halfpage
handbook, halfpage
V
I
GS =
−
10 V
D
−
7.5 V
(A)
−
10
C
(pF)
−
6 V
400
−
8
−
6
−
4
−
2
−
5 V
C
iss
−
4.5 V
200
−
4 V
C
oss
−
3.5 V
C
rss
−
3 V
−
2.5 V
0
0
0
0
−
10
−
20
−
30
−
2
−
4
−
6
−
8
−
10
−
12
V
(V)
DS
V
(V)
DS
V
GS
= 0.
T
j
= 25
°
C.
T
j
= 25
°
C.
Fig.4 Capacitance
as a function of drain source
voltage; typical values.
Fig.5 Output
characteristics; typical values.
MBE150
MBE145
−
16
−
10
handbook, halfpage
handbook, halfpage
V
I
GS
D
(V)
(A)
−
8
−
12
−
6
−
4
−
8
−
4
0
−
2
0
0
−
2
−
4
−
6
−
8
Q
−
10
(nC)
0
−
2
−
4
−
6
−
8
V
(V)
GS
g
V
DD
=
−
15 V.
I
D
=
−
3 A.
V
DS
=
−
10 V.
T
j
= 25
°
C.
Fig.7 Gate-source
voltage as a function of total
gate charge.
Fig.6 Transfer
characteristic, typical values.
1997 Jun 20
5
Philips Semiconductors
Product specification
P-channel enhancement mode
vertical D-MOS transistor
BSP250
MBE148
MDA218
4
−
6
10
handbook, halfpage
handbook, halfpage
I
S
(A)
R
DSon
(m
Ω
)
(1)(2)(3) (4)
(5)
−
4
3
10
(1) (2)
(3)
−
2
2
0
10
0
−
2
−
4
−
6
−
8
V
−
10
(V)
0
−
0.5
−
1
−
1.5
−
2
V
−
2.5
(V)
GS
SD
−
V
DS
≥ −
I
D
×
R
DSon
; T
j
= 25
°
C.
(1) I
D
=
−
0.1 A.
V
GD
= 0.
(4) I
D
=
−
3 A.
(5) I
D
=
−
6 A.
(1) T
j
= 150
°
C.
(2) T
j
= 25
°
C.
(3) T
j
=
−
55
°
C.
(2) I
D
=
−
0.5 A.
(3) I
D
=
−
1 A.
Fig.9 Drain-source
on-state resistance as a
function of gate-source voltage; typical
values.
Fig.8 Source
current as a function of source-drain
diode forward voltage.
MBE138
MBE146
1.8
1.2
handbook, halfpage
handbook, halfpage
k
k
1.6
1.1
(1)
(2)
1.4
1.0
0.9
0.8
0.7
1.2
1.0
0.8
0.6
0.6
−
50
0
50
100
150
−
50
0
50
100
150
T (
°
C)
T (
°
C)
j
j
R
DSon
at T
j
k
=
—————————————
–
–
R
DSon
at 25
°
C
V
GSth
at T
j
k
=
————————————
–
–
Typical R
DSon
at:
V
GSth
at 25
°
C
(1) I
D
=
−
1 A; V
GS
=
−
10 V.
(2) I
D
=
−
0.5 A; V
GS
=
−
4.5 V.
Typical V
GSth
at I
D
=
−
1 mA; V
DS
=V
GS
= V
GSth
.
Fig.10 Temperature
coefficient of gate-source
threshold voltage.
Fig.11 Temperature
coefficient of drain-source
on-resistance.
1997 Jun 20
6
Philips Semiconductors
Product specification
P-channel enhancement mode
vertical D-MOS transistor
BSP250
MBE147
10
δ
=
0.75
R
th j-s
0.5
0.33
0.2
(K/W)
0.1
1
0.05
t
p
0.02
0.01
P
=
δ
T
0
t
t
p
T
−
1
10
−
6
−
5
−
4
−
3
−
2
−
1
10
10
10
10
10
10
1
t
(s)
p
Fig.12 Transient
thermal resistance from junction to soldering point as a function of pulse time; typical values.
1997 Jun 20
7
Philips Semiconductors
Product specification
P-channel enhancement mode
vertical D-MOS transistor
BSP250
PACKAGE OUTLINE
Plastic surface mounted package; collector pad for good heat transfer; 4 leads
SOT223
D
B
E
A
X
c
y
H
v
M
A
E
b
1
4
Q
A
A
1
L
1
2
3
p
e
b
p
w
M
B
detail X
1
e
0
2
4 mm
scale
DIMENSIONS (mm are the original dimensions)
A
UNIT
A
b
b
c
D
E
e
e
H
L
p
Q
v
w
y
p
1
1
1
E
1.8
1.5
0.10 0.80
0.01 0.60
3.1
2.9
0.32
0.22
6.7
6.3
3.7
3.3
7.3
6.7
1.1
0.7
0.95
0.85
mm
4.6
2.3
0.2
0.1
0.1
REFERENCES
JEDEC
EUROPEAN
PROJECTION
OUTLINE
VERSION
ISSUE DATE
IEC
EIAJ
96-11-11
97-02-28
SOT223
1997 Jun 20
8
Philips Semiconductors
Product specification
P-channel enhancement mode
vertical D-MOS transistor
BSP250
DEFINITIONS
Data Sheet Status
Objective specification
Preliminary specification
Product specification
This data sheet contains target or goal specifications for product development.
This data sheet contains preliminary data; supplementary data may be published later.
This data sheet contains final product specifications.
Limiting values
Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or
more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation
of the device at these or at any other conditions above those given in the Characteristics sections of the specification
is not implied. Exposure to limiting values for extended periods may affect device reliability.
Application information
Where application information is given, it is advisory and does not form part of the specification.
LIFE SUPPORT APPLICATIONS
These products are not designed for use in life support appliances, devices, or systems where malfunction of these
products can reasonably be expected to result in personal injury. Philips customers using or selling these products for
use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting from such
improper use or sale.
1997 Jun 20
9
Philips Semiconductors
Product specification
P-channel enhancement mode vertical
D-MOS transistor
BSP250
NOTES
1997 Jun 20
10
Philips Semiconductors
Product specification
P-channel enhancement mode vertical
D-MOS transistor
BSP250
NOTES
1997 Jun 20
11
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© Philips Electronics N.V. 1997
SCA54
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Printed in The Netherlands
137107/00/02/pp12
Date of release: 1997 Jun 20
Document order number:
9397 750 02331
