Nexperia-BSS123-215
| Part # | Nexperia-BSS123-215 |
| Download | Nexperia-BSS123-215 |
Important notice
Dear Customer,
On 7 February 2017 the former NXP Standard Product business became a new company with the
tradename
Nexperia
. Nexperia is an industry leading supplier of Discrete, Logic and PowerMOS
semiconductors with its focus on the automotive, industrial, computing, consumer and wearable
application markets
In data sheets and application notes which still contain NXP or Philips Semiconductors references, use
the references to Nexperia, as shown below.
salesaddresses@nexperia.com
(email)
Replace the copyright notice at the bottom of each page or elsewhere in the document, depending on
the version, as shown below:
– © NXP N.V. (year). All rights reserved or © Koninklijke Philips Electronics N.V. (year). All rights
reserved
Should be replaced with:
–
© Nexperia B.V. (year). All rights reserved
.
If you have any questions related to the data sheet, please contact our nearest sales office via e-mail
understanding,
Kind regards,
Team Nexperia
Philips Semiconductors
Product specification
N-channel TrenchMOS
transistor
Logic level FET
BSS123
FEATURES
SYMBOL
QUICK REFERENCE DATA
d
•
’Trench’
technology
• Extremely fast switching
• Logic level compatible
• Subminiature surface mounting
package
V
DSS
= 100 V
I
D
= 150 mA
g
R
DS(ON)
≤
6
Ω
(V
GS
= 10 V)
s
GENERAL DESCRIPTION
PINNING
SOT23
N-channel enhancement mode
field-effect transistor in a plastic
PIN
DESCRIPTION
3
envelope
using
’
trench
’
1
2
3
gate
technology.
Top view
source
drain
Applications:-
• Relay driver
• High-speed line driver
• Telephone ringer
1
2
The BSS123 is supplied in the
SOT23 subminiature surface
mounting package.
LIMITING VALUES
Limiting values in accordance with the Absolute Maximum System (IEC 134)
SYMBOL PARAMETER
CONDITIONS
MIN.
MAX.
UNIT
V
DSS
V
DGR
V
GS
I
D
I
DM
P
D
Drain-source voltage
Drain-gate voltage
T
j
= 25 ˚C to 150˚C
T
j
= 25 ˚C to 150˚C; R
GS
= 20 k
Ω
–
–
–
–
–
–
100
100
±
20
150
600
0.25
150
V
V
V
mA
mA
W
Gate-source voltage
Continuous drain current
Pulsed drain current
Total power dissipation
Operating junction and
storage temperature
T
a
= 25 ˚C
T
a
= 25 ˚C
T
a
= 25 ˚C
T
j
, T
stg
– 55
˚C
THERMAL RESISTANCES
SYMBOL PARAMETER
CONDITIONS
TYP.
MAX.
UNIT
R
th j-a
Thermal resistance junction
surface mounted on FR4 board
to ambient
500
–
K/W
August 2000
1
Rev 1.000
Philips Semiconductors
Product specification
N-channel TrenchMOS
transistor
Logic level FET
BSS123
ELECTRICAL CHARACTERISTICS
T
j
= 25˚C
unless otherwise specified
SYMBOL PARAMETER
CONDITIONS
MIN. TYP.
MAX. UNIT
V
(BR)DSS
Drain-source breakdown
voltage
V
GS
= 0 V; I
D
= 10
µ
A
100
130
–
V
V
GS(TO)
R
DS(ON)
Gate threshold voltage
Drain-source on-state
resistance
V
DS
= V
GS
; I
D
= 1 mA
V
GS
= 10 V; I
D
= 120 mA
1
–
2
3.5
2.8
6
V
Ω
g
fs
Forward transconductance
V
DS
= 25 V; I
D
= 120 mA
V
DS
= 60 V; V
GS
= 0 V
–
–
350
10
–
mS
nA
I
DSS
Zero gate voltage drain
current
100
I
GSS
t
on
Gate source leakage current
V
GS
=
±
20 V; V
DS
= 0 V
–
–
10
3
100
10
nA
ns
Turn-on time
V
DD
= 50 V; R
D
= 250
Ω
; V
GS
= 10 V;
R
G
= 50
Ω
; Resistive load
t
off
Turn-off time
–
12
20
ns
C
iss
C
oss
C
rss
Input capacitance
Output capacitance
Feedback capacitance
V
GS
= 0 V; V
DS
= 25 V; f = 1 MHz
–
–
–
23
6
4
40
25
10
pF
pF
pF
August 2000
2
Rev 1.000
Philips Semiconductors
Product specification
N-channel TrenchMOS
transistor
Logic level FET
BSS123
MECHANICAL DATA
Plastic surface mounted package; 3 leads
SOT23
D
B
E
A
X
H
v
M
A
E
3
Q
A
A
1
c
1
2
e
1
b
p
w
M
B
L
p
e
detail X
0
1
2 mm
scale
DIMENSIONS (mm are the original dimensions)
A
1
UNIT
b
c
D
E
e
e
H
L
Q
v
w
A
p
p
1
E
max.
1.1
0.9
0.48
0.38
0.15
0.09
3.0
2.8
1.4
1.2
2.5
2.1
0.45
0.15
0.55
0.45
mm
0.1
1.9
0.95
0.2
0.1
REFERENCES
JEDEC
EUROPEAN
PROJECTION
OUTLINE
VERSION
ISSUE DATE
IEC
EIAJ
97-02-28
SOT23
Fig.1. SOT23
surface mounting package.
Notes
1. This product is supplied in anti-static packaging. The gate-source input must be protected against static
discharge during transport or handling.
2. Refer to SMD Footprint Design and Soldering Guidelines, Data Handbook SC18.
3. Epoxy meets UL94 V0 at 1/8″.
August 2000
3
Rev 1.000
Philips Semiconductors
Product specification
N-channel TrenchMOS
transistor
Logic level FET
BSS123
DEFINITIONS
Data sheet status
Objective specification
This data sheet contains target or goal specifications for product development.
Preliminary specification
This data sheet contains preliminary data; supplementary data may be published later.
Product specification
This data sheet contains final product specifications.
Limiting values
Limiting values are given in accordance with the Absolute Maximum Rating System (IEC 134).
Stress above one
or more of the limiting values may cause permanent damage to the device.
These are stress ratings only and
operation of the device at these or at any other conditions above those given in the Characteristics sections of
this specification is not implied.
Exposure to limiting values for extended periods may affect device reliability.
Application information
Where application information is given, it is advisory and does not form part of the specification.
Philips Electronics N.V. 2000
All rights are reserved.
Reproduction in whole or in part is prohibited without the prior written consent of the
copyright owner.
The information presented in this document does not form part of any quotation or contract, it is believed to be
accurate and reliable and may be changed without notice.
No liability will be accepted by the publisher for any
consequence of its use.
Publication thereof does not convey nor imply any license under patent or other
industrial or intellectual property rights.
LIFE SUPPORT APPLICATIONS
These products are not designed for use in life support appliances, devices or systems where malfunction of these
products can be reasonably expected to result in personal injury.
Philips customers using or selling these products
for use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting
from such improper use or sale.
August 2000
4
Rev 1.000
