Nexperia-PBLS2024D-115
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Important notice
Dear Customer,
On 7 February 2017 the former NXP Standard Product business became a new company with the
tradename
Nexperia
. Nexperia is an industry leading supplier of Discrete, Logic and PowerMOS
semiconductors with its focus on the automotive, industrial, computing, consumer and wearable
application markets
In data sheets and application notes which still contain NXP or Philips Semiconductors references, use
the references to Nexperia, as shown below.
salesaddresses@nexperia.com
(email)
Replace the copyright notice at the bottom of each page or elsewhere in the document, depending on
the version, as shown below:
– © NXP N.V. (year). All rights reserved or © Koninklijke Philips Electronics N.V. (year). All rights
reserved
Should be replaced with:
–
© Nexperia B.V. (year). All rights reserved
.
If you have any questions related to the data sheet, please contact our nearest sales office via e-mail
understanding,
Kind regards,
Team Nexperia
PBLS2024D
20
V
,
1
.8 A
PNP BISS loadswitch
Rev. 02 — 6 September 2009
Product data sheet
1. Product
profile
1.1 General
description
PNP low V
CEsat
Breakthrough In Small Signal (BISS) transistor and NPN Resistor-
Equipped
T
r
ansistor (RET) in a SOT457 (SC-74) small Surface-Mounted Device (SMD)
plastic package.
1.2 Features
I
Low V
CEsat
(BISS) and resistor-equipped transistor in one package
I
Low threshold voltage (<1 V) compared to MOSFET
I
Space-saving solution
I
Reduction of component count
I
AEC-Q101 qualified
1.3 Applications
I
Supply line switches
I
Battery charger switches
I
High-side switches for LEDs, drivers and backlights
I
Portable equipment
1.4 Quick
reference data
Table 1.
Symbol
Quick reference data
Parameter
Conditions
Min
Typ
Max
Unit
TR1; PNP low V
CEsat
transistor
V
CEO
I
C
collector-emitter voltage
collector current
open base
–
–
–
–
–
–
−
20
−
1.8
−
3
V
A
A
I
CM
peak collector current
single pulse;
t
p
≤
1 ms
[1]
R
CEsat
collector-emitter saturation
I
C
=
−
1.8 A;
–
78
117
m
Ω
resistance
I
B
=
−
100 mA
TR2; NPN resistor-equipped transistor
V
CEO
I
O
collector-emitter voltage
output current
open base
–
–
50
V
–
–
100
28.6
1.2
mA
k
Ω
R1
bias resistor 1 (input)
bias resistor ratio
15.4
0.8
22
1
R2/R1
[1] Pulse
test: t
p
≤
300
µ
s;
δ ≤
0.02.
PBLS2024D
NXP Semiconductors
20
V
,
1
.8 A
PNP BISS loadswitch
2. Pinning
information
Table 2.
Pinning
Pin
1
Description
Simplified outline
Graphic symbol
base TR1
6
5
4
TR2
3
6
5
4
2
input (base) TR2
output (collector) TR2
GND (emitter) TR2
collector TR1
3
R2
R1
4
1
2
3
TR1
5
6
emitter TR1
1
2
006aab506
3. Ordering
information
Table 3.
Ordering information
Type number
Package
Name
Description
Version
SOT457
PBLS2024D
SC-74
plastic surface-mounted package (TSOP6); 6 leads
4. Marking
Table 4.
Marking codes
Type number
Marking code
PBLS2024D
KD
PBLS2024D_2
© NXP B.
V
.
2
009. All rights reserved.
Product data sheet
Rev. 02 — 6 September 2009
2 of 16
PBLS2024D
NXP Semiconductors
20
V
,
1
.8 A
PNP BISS loadswitch
5. Limiting
values
Table 5.
Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).
Symbol
Parameter
Conditions
Min
Max
Unit
TR1; PNP low V
CEsat
transistor
V
CBO
V
CEO
V
EBO
I
C
collector-base voltage
collector-emitter voltage
emitter-base voltage
collector current
open emitter
open base
–
–
–
–
–
−
20
−
20
−
5
V
V
V
A
A
open collector
−
1.8
−
3
I
CM
peak collector current
single pulse;
t
p
≤
1 ms
I
B
base current
–
–
−
300
−
1
mA
A
I
BM
peak base current
single pulse;
t
p
≤
1 ms
[1]
[2]
[3]
P
tot
total power dissipation
T
amb
≤
25
°
C
–
–
–
370
480
630
mW
mW
mW
TR2; NPN resistor-equipped transistor
V
CBO
V
CEO
V
EBO
V
I
collector-base voltage
collector-emitter voltage
emitter-base voltage
input voltage
open emitter
open base
–
–
–
50
50
10
V
V
V
open collector
positive
–
–
–
–
+40
−
10
100
100
V
negative
V
I
O
output current
mA
mA
I
CM
peak collector current
single pulse;
t
p
≤
1 ms
[1][2]
[3]
P
tot
total power dissipation
total power dissipation
T
amb
≤
25
°
C
–
200
mW
Per device
[1]
[2]
[3]
P
tot
T
amb
≤
25
°
C
–
480
mW
mW
mW
°
C
–
590
–
760
T
j
junction temperature
ambient temperature
storage temperature
–
150
T
amb
T
stg
−
55
−
65
+150
+150
°
C
°
C
[1] Device
mounted on an FR4 Printed-Circuit Board (PCB), single-sided copper, tin-plated and standard
footprint.
[2] Device
mounted on an FR4 PCB, single-sided copper, tin-plated, mounting pad for collector 1 cm
2
.
[3] Device
mounted on a ceramic PCB, Al
2
O
3
, standard footprint.
PBLS2024D_2
© NXP B.
V
.
2
009. All rights reserved.
Product data sheet
Rev. 02 — 6 September 2009
3 of 16
PBLS2024D
NXP Semiconductors
20
V
,
1
.8 A
PNP BISS loadswitch
006aab507
1000
P
tot
(mW)
(1)
(2)
800
600
400
200
0
(3)
−
75
−
25
25
75
125
175
(
°
C)
T
amb
(1) Ceramic
PCB, Al
2
O
3
, standard footprint
(2) FR4
PCB, mounting pad for collector 1 cm
2
(3) FR4
PCB, standard footprint
Fig 1.
Per device: Power derating curves
6. Thermal
characteristics
Table 6.
Thermal characteristics
Symbol
Per device
R
th(j-a)
Parameter
Conditions
Min
Typ
Max Unit
[1]
[2]
[3]
thermal resistance from
junction to ambient
in free air
–
–
–
–
–
–
–
–
260
211
165
100
K/W
K/W
K/W
K/W
R
th(j-sp)
thermal resistance from
junction to solder point
[1] Device
mounted on an FR4 PCB, single-sided copper, tin-plated and standard footprint.
[2] Device
mounted on an FR4 PCB, single-sided copper, tin-plated, mounting pad for collector 1 cm
2
.
[3] Device
mounted on a ceramic PCB, Al
2
O
3
, standard footprint.
PBLS2024D_2
© NXP B.
V
.
2
009. All rights reserved.
Product data sheet
Rev. 02 — 6 September 2009
4 of 16
PBLS2024D
NXP Semiconductors
20
V
,
1
.8 A
PNP BISS loadswitch
006aab508
3
10
Z
th(j-a)
δ
= 1
(K/W)
0.75
0.33
0.50
2
10
0.20
0.10
0.02
0.05
10
0.01
0
1
−
1
10
−
5
−
4
−
3
−
2
−
1
2
3
10
10
10
10
10
1
10
10
10
t
(s)
p
FR4 PCB, standard footprint
Fig 2.
TR1 (PNP): Transient thermal impedance from junction to ambient as a function of pulse duration;
typical values
006aab509
3
10
Z
th(j-a)
(K/W)
δ
= 1
0.75
0.33
0.50
2
10
0.20
0.05
0.10
0.02
10
0.01
0
1
−
1
10
−
5
−
4
−
3
−
2
−
1
2
3
10
10
10
10
10
1
10
10
10
t
(s)
p
FR4 PCB, mounting pad for collector 1 cm
2
Fig 3.
TR1 (PNP): Transient thermal impedance from junction to ambient as a function of pulse duration;
typical values
PBLS2024D_2
© NXP B.
V
.
2
009. All rights reserved.
Product data sheet
Rev. 02 — 6 September 2009
5 of 16
PBLS2024D
NXP Semiconductors
20
V
,
1
.8 A
PNP BISS loadswitch
006aab510
3
10
Z
th(j-a)
(K/W)
δ
= 1
0.75
0.33
2
10
0.50
0.20
0.05
0.10
0.02
10
0.01
0
1
−
1
10
−
5
−
4
−
3
−
2
−
1
2
3
10
10
10
10
10
1
10
10
10
t
(s)
p
Ceramic PCB, Al
2
O
3
, standard footprint
Fig 4.
TR1 (PNP): Transient thermal impedance from junction to ambient as a function of pulse duration;
typical values
7. Characteristics
Table 7.
Characteristics
T
amb
= 25
°
C unless otherwise specified.
Symbol Parameter
Conditions
TR1; PNP low V
CEsat
transistor
Min
Typ
Max Unit
I
CBO
collector-base cut-off
V
CB
=
−
20 V; I
E
= 0 A
–
–
–
–
−
100 nA
current
V
CB
=
−
20 V; I
E
= 0 A;
−
50
µ
A
T
j
= 150
°
C
I
CES
I
EBO
h
FE
collector-emitter
cut-off current
V
CE
=
−
16 V; V
BE
= 0 V
V
EB
=
−
5 V; I
C
= 0 A
–
–
–
–
−
100 nA
−
100 nA
emitter-base cut-off
current
DC current gain
V
CE
=
−
2 V; I
C
=
−
100 mA
V
CE
=
−
2 V; I
C
=
−
500 mA
V
CE
=
−
2 V; I
C
=
−
1 A
220
420
410
320
260
−
45
−
85
−
80
–
–
–
–
[1]
[1]
[1]
[1]
[1]
[1]
[1]
[1]
[1]
[1]
[1]
220
200
V
CE
=
−
2 V; I
C
=
−
1.8 A
I
C
=
−
0.5 A; I
B
=
−
50 mA
I
C
=
−
1 A; I
B
=
−
50 mA
I
C
=
−
1 A; I
B
=
−
100 mA
I
C
=
−
1.8 A; I
B
=
−
100 mA
I
C
=
−
1 A; I
B
=
−
100 mA
I
C
=
−
1.8 A; I
B
=
−
100 mA
I
C
=
−
0.5 A; I
B
=
−
50 mA
I
C
=
−
1.8 A; I
B
=
−
100 mA
160
V
CEsat
collector-emitter
saturation voltage
–
–
–
–
–
–
–
–
−
70
mV
−
130 mV
−
120 mV
−
140
−
210 mV
R
CEsat
collector-emitter
saturation resistance
80
78
120
117
m
Ω
m
Ω
V
V
BEsat
base-emitter
saturation voltage
−
0.85
−
1
−
0.93
−
1.1
V
PBLS2024D_2
© NXP B.
V
.
2
009. All rights reserved.
Product data sheet
Rev. 02 — 6 September 2009
6 of 16
PBLS2024D
NXP Semiconductors
20
V
,
1
.8 A
PNP BISS loadswitch
Table 7.
Characteristics
…continued
T
amb
= 25
°
C unless otherwise specified.
Symbol
Parameter
Conditions
Min
Typ
Max Unit
[1]
V
BEon
base-emitter
V
CE
=
−
10 V; I
C
=
−
1 A
–
−
0.73
−
1.1
V
turn-on voltage
t
d
t
r
delay time
V
CC
=
−
10 V; I
C
=
−
1 A;
–
–
–
–
–
–
–
17
–
–
–
–
–
–
–
ns
I
Bon
=
−
50 mA;
rise time
33
ns
I
Boff
= 50 mA
t
on
t
s
turn-on time
storage time
fall time
50
ns
270
60
ns
t
f
ns
t
off
f
T
turn-off time
transition frequency
330
130
ns
I
C
=
−
50 mA; V
CE
=
−
10 V;
MHz
f = 100 MHz
C
c
collector capacitance
V
CB
=
−
10 V; I
E
= i
e
= 0 A;
–
–
45
–
–
pF
nA
f = 1 MHz
TR2; NPN resistor-equipped transistor
I
CBO
collector-base cut-off
V
CB
= 50 V; I
E
= 0 A
100
current
I
CEO
collector-emitter
cut-off current
V
CE
= 30 V; I
B
= 0 A
–
–
–
–
1
µ
A
µ
A
V
CE
= 30 V; I
B
= 0 A;
50
T
j
= 150
°
C
I
EBO
emitter-base cut-off
current
V
EB
= 5 V; I
C
= 0 A
–
–
180
µ
A
h
FE
DC current gain
V
CE
= 5 V; I
C
= 5 mA
60
–
–
–
–
V
CEsat
collector-emitter
I
C
= 10 mA; I
B
= 0.5 mA
150
mV
saturation voltage
V
I(off)
V
I(on)
R1
off-state input voltage
V
CE
= 5 V; I
C
= 100
µ
A
on-state input voltage
V
CE
= 0.3 V; I
C
= 5 mA
bias resistor 1 (input)
–
1.1
1.7
0.8
–
V
V
2.5
15.4 22
28.6 k
Ω
R2/R1
C
c
bias resistor ratio
0.8
–
1
–
1.2
collector capacitance
V
CB
= 10 V; I
E
= i
e
= 0 A;
f = 1 MHz
2.5
pF
[1] Pulse
test: t
p
≤
300
µ
s;
δ ≤
0.02.
PBLS2024D_2
© NXP B.
V
.
2
009. All rights reserved.
Product data sheet
Rev. 02 — 6 September 2009
7 of 16
PBLS2024D
NXP Semiconductors
20
V
,
1
.8 A
PNP BISS loadswitch
006aab511
006aab512
800
−
3
I
(mA) =
−
16.0
−
12.8
B
−
14.4
−
11.2
h
FE
I
C
(1)
(2)
(A)
600
−
9.6
−
6.4
−
3.2
−
2
−
8.0
−
4.8
400
200
0
(3)
−
1
−
1.6
0
0.0
−
1
2
3
4
−
10
−
1
−
10
−
10
−
10
−
10
(mA)
−
0.5
−
1.0
−
1.5
−
2.0
I
V
(V)
CE
C
V
CE
=
−
2 V
T
amb
= 25
°
C
(1) T
amb
= 100
°
C
(2) T
amb
= 25
°
C
(3) T
amb
=
−
55
°
C
Fig 5.
TR1 (PNP): DC current gain as a function of
collector current; typical values
Fig 6.
TR1 (PNP): Collector current as a function of
collector-emitter voltage; typical values
006aab513
006aab514
−
1.2
−
1.2
V
(V)
V
BE
BEsat
(V)
−
1.0
−
1.0
−
0.8
−
0.6
−
0.4
−
0.2
(1)
(2)
(3)
(1)
(2)
(3)
−
0.8
−
0.6
−
0.4
−
0.2
−
1
2
3
4
−
1
2
3
4
−
10
−
1
−
10
−
10
−
10
−
10
(mA)
−
10
−
1
−
10
−
10
−
10
−
10
I (mA)
C
I
C
V
CE
=
−
2 V
I
C
/I
B
= 20
(1) T
amb
=
−
55
°
C
(2) T
amb
= 25
°
C
(3) T
amb
= 100
°
C
(1) T
amb
=
−
55
°
C
(2) T
amb
= 25
°
C
(3) T
amb
= 100
°
C
Fig 7.
TR1 (PNP): Base-emitter voltage as a function
of collector current; typical values
Fig 8.
TR1 (PNP): Base-emitter saturation voltage as
a function of collector current; typical values
PBLS2024D_2
© NXP B.
V
.
2
009. All rights reserved.
Product data sheet
Rev. 02 — 6 September 2009
8 of 16
PBLS2024D
NXP Semiconductors
20
V
,
1
.8 A
PNP BISS loadswitch
006aab515
006aab516
−
1
−
1
V
V
CEsat
(V)
CEsat
(V)
−
1
−
1
−
10
−
10
−
10
−
10
−
10
−
10
(1)
(2)
(1)
(2)
−
2
−
2
(3)
(3)
−
3
−
3
−
1
2
3
4
−
1
2
3
4
−
10
−
1
−
10
−
10
−
10
−
10
(mA)
−
10
−
1
−
10
−
10
−
10
−
10
I (mA)
C
I
C
I
C
/I
B
= 20
T
amb
= 25
°
C
(1) T
amb
= 100
°
C
(2) T
amb
= 25
°
C
(3) T
amb
=
−
55
°
C
(1) I
C
/I
B
= 100
(2) I
C
/I
B
= 50
(3) I
C
/I
B
= 10
Fig 9.
TR1 (PNP): Collector-emitter saturation
voltage as a function of collector current;
typical values
Fig 10.
TR1 (PNP): Collector-emitter saturation
voltage as a function of collector current;
typical values
006aab517
006aab518
3
3
10
10
R
CEsat
R
CEsat
(
Ω
)
(
Ω
)
2
2
10
10
10
10
(1)
(3)
(2)
1
1
(1)
(2)
−
1
−
1
10
10
(3)
−
2
−
2
10
10
−
1
2
3
4
−
1
2
3
4
−
10
−
1
−
10
−
10
−
10
−
10
(mA)
−
10
−
1
−
10
−
10
−
10
−
10
I (mA)
C
I
C
I
C
/I
B
= 20
T
amb
= 25
°
C
(1) T
amb
= 100
°
C
(2) T
amb
= 25
°
C
(3) T
amb
=
−
55
°
C
(1) I
C
/I
B
= 100
(2) I
C
/I
B
= 50
(3) I
C
/I
B
= 10
Fig 11.
TR1 (PNP): Collector-emitter saturation
resistance as a function of collector current;
typical values
Fig 12.
TR1 (PNP): Collector-emitter saturation
resistance as a function of collector current;
typical values
PBLS2024D_2
© NXP B.
V
.
2
009. All rights reserved.
Product data sheet
Rev. 02 — 6 September 2009
9 of 16
PBLS2024D
NXP Semiconductors
20
V
,
1
.8 A
PNP BISS loadswitch
006aaa038
3
2
10
h
FE
(1)
(2)
(3)
10
10
1
10
−
1
2
1
10
10
I
(mA)
C
V
CE
= 5 V
(1) T
amb
= 150
°
C
(2) T
amb
= 25
°
C
(3) T
amb
=
−
40
°
C
Fig 13.
TR2 (NPN): DC current gain as a function of collector current; typical values
006aaa040
006aaa041
10
10
V
I(on)
V
I(off)
(V)
(V)
(1)
(2)
(1)
(2)
(3)
1
1
(3)
−
1
−
1
10
10
−
1
2
−
2
−
1
1
10
1
10
10
10
10
1
10
I
(mA)
I (mA)
C
C
V
CE
= 0.3 V
V
CE
= 5 V
(1) T
amb
=
−
40
°
C
(2) T
amb
= 25
°
C
(3) T
amb
= 100
°
C
(1) T
amb
=
−
40
°
C
(2) T
amb
= 25
°
C
(3) T
amb
= 100
°
C
Fig 14.
TR2 (NPN): On-state input voltage as a
function of collector current; typical values
Fig 15.
TR2 (NPN): Off-state input voltage as a
function of collector current; typical values
PBLS2024D_2
© NXP B.
V
.
2
009. All rights reserved.
Product data sheet
Rev. 02 — 6 September 2009
10 of 16
PBLS2024D
NXP Semiconductors
20
V
,
1
.8 A
PNP BISS loadswitch
006aab522
006aaa039
−
1
1
10
(1)
(2)
V
V
CEsat
(V)
CEsat
(V)
(3)
−
1
10
−
2
−
2
10
10
2
2
1
10
10
1
10
10
I
(mA)
I
(mA)
C
C
I
C
/I
B
= 20
I
C
/I
B
= 70; T
amb
= 25
°
C
(1) T
amb
= 100
°
C
(2) T
amb
= 25
°
C
(3) T
amb
=
−
40
°
C
Fig 16.
TR2 (NPN): Collector-emitter saturation
voltage as a function of collector current;
typical values
Fig 17.
TR2 (NPN): Collector-emitter saturation
voltage as a function of collector current;
typical values
PBLS2024D_2
© NXP B.
V
.
2
009. All rights reserved.
Product data sheet
Rev. 02 — 6 September 2009
11 of 16
PBLS2024D
NXP Semiconductors
20
V
,
1
.8 A
PNP BISS loadswitch
8. Test
information
−
I
B
input pulse
90 %
(idealized waveform)
−
I
(100 %)
Bon
10 %
−
I
Boff
output pulse
−
(idealized waveform)
I
C
90 %
−
I
(100 %)
C
10 %
t
t
t
f
t
t
r
s
d
006aaa266
t
t
off
on
Fig 18.
TR1: BISS transistor switching time definition
V
V
CC
BB
R
B
R
C
V
o
(probe)
(probe)
oscilloscope
oscilloscope
450
Ω
450
Ω
R2
V
I
DUT
R1
mgd624
V
CC
=
−
10 V; I
C
=
−
1 A; I
Bon
=
−
50 mA; I
Boff
= 50 mA
Fig 19.
TR1: Test circuit for switching times
8.1 Quality
information
This product has been qualified in accordance with the Automotive Electronics Council
(AEC) standard
Q101 – Stress test qualification for discrete semiconductors
, and is
suitable for use in automotive applications.
PBLS2024D_2
© NXP B.
V
.
2
009. All rights reserved.
Product data sheet
Rev. 02 — 6 September 2009
12 of 16
PBLS2024D
NXP Semiconductors
20
V
,
1
.8 A
PNP BISS loadswitch
9. Package
outline
3.1
2.7
1.1
0.9
6
5
4
0.6
0.2
3.0 1.7
2.5 1.3
pin 1 index
1
2
3
0.26
0.10
0.40
0.25
0.95
1.9
Dimensions in mm
04-11-08
Fig 20.
Package outline SOT457 (SC-74)
10. Packing information
Table 8.
Packing methods
The indicated -xxx are the last three digits of the 12NC ordering code.
[1]
Type number
Package Description
Packing quantity
3000
10000
-135
[2]
[3]
PBLS2024D
SOT457 4
mm pitch, 8 mm tape and reel; T1
4 mm pitch, 8 mm tape and reel; T2
-115
-125
-165
[1] For
further information and the availability of packing methods, see
Section 13
.
[2] T1:
normal taping
[3] T2:
reverse taping
PBLS2024D_2
© NXP B.
V
.
2
009. All rights reserved.
Product data sheet
Rev. 02 — 6 September 2009
13 of 16
PBLS2024D
NXP Semiconductors
20
V
,
1
.8 A
PNP BISS loadswitch
11. Revision history
Table 9.
Revision history
Document ID
PBLS2024D_2
Modifications:
PBLS2024D_1
Release date
Data sheet status
Change notice
Supersedes
20090906
Product data sheet
–
PBLS2024D_1
T
a
ble 7 “Characteristics”
: I
CES
conditions amended
20090720
Product data sheet
–
–
PBLS2024D_2
© NXP B.
V
.
2
009. All rights reserved.
Product data sheet
Rev. 02 — 6 September 2009
14 of 16
PBLS2024D
NXP Semiconductors
20
V
,
1
.8 A
PNP BISS loadswitch
12. Legal information
12.1 Data
sheet status
Document status
[1][2]
Product status
[3]
Development
Definition
Objective [short] data sheet
This document contains data from the objective specification for product development.
This document contains data from the preliminary specification.
This document contains the product specification.
Preliminary [short] data sheet
Qualification
Product [short] data sheet
Production
[1]
[2]
[3]
Please consult the most recently issued document before initiating or completing a design.
The term ‘short data sheet’ is explained in section “Definitions”.
The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status
damage. NXP Semiconductors accepts no liability for inclusion and/or use of
NXP Semiconductors products in such equipment or applications and
therefore such inclusion and/or use is at the customer’s own risk.
12.2 Definitions
Draft —
The document is a draft version onl
y
.
T
he content is still under
internal review and subject to formal approval, which may result in
modifications or additions. NXP Semiconductors does not give any
representations or warranties as to the accuracy or completeness of
information included herein and shall have no liability for the consequences of
use of such information.
Applications —
Applications that are described herein for any of these
products are for illustrative purposes onl
y
.
N
XP Semiconductors makes no
representation or warranty that such applications will be suitable for the
specified use without further testing or modification.
Limiting values —
Stress above one or more limiting values (as defined in
the Absolute Maximum Ratings System of IEC 60134) may cause permanent
damage to the device. Limiting values are stress ratings only and operation of
the device at these or any other conditions above those given in the
Characteristics sections of this document is not implied. Exposure to limiting
values for extended periods may affect device reliabilit
y
.
Short data sheet —
A short data sheet is an extract from a full data sheet
with the same product type number(s) and title. A short data sheet is intended
for quick reference only and should not be relied upon to contain detailed and
full information. For detailed and full information see the relevant full data
sheet, which is available on request via the local NXP Semiconductors sales
office. In case of any inconsistency or conflict with the short data sheet, the
full data sheet shall prevail.
Terms and conditions of sale —
NXP Semiconductors products are sold
subject to the general terms and conditions of commercial sale, as published
explicitly otherwise agreed to in writing by NXP Semiconductors. In case of
any inconsistency or conflict between information in this document and such
terms and conditions, the latter will prevail.
12.3 Disclaimers
General —
Information in this document is believed to be accurate and
reliable. However, NXP Semiconductors does not give any representations or
warranties, expressed or implied, as to the accuracy or completeness of such
information and shall have no liability for the consequences of use of such
information.
No offer to sell or license —
Nothing in this document may be interpreted
or construed as an offer to sell products that is open for acceptance or the
grant, conveyance or implication of any license under any copyrights, patents
or other industrial or intellectual property rights.
Right to make changes —
NXP Semiconductors reserves the right to make
changes to information published in this document, including without
limitation specifications and product descriptions, at any time and without
notice. This document supersedes and replaces all information supplied prior
to the publication hereof.
Export control —
This document as well as the item(s) described herein
may be subject to export control regulations. Export might require a prior
authorization from national authorities.
Quick reference data —
The Quick reference data is an extract of the
product data given in the Limiting values and Characteristics sections of this
document, and as such is not complete, exhaustive or legally binding.
Suitability for use —
NXP Semiconductors products are not designed,
authorized or warranted to be suitable for use in medical, militar
y
,
a
ircraft,
space or life support equipment, nor in applications where failure or
malfunction of an NXP Semiconductors product can reasonably be expected
to result in personal injur
y
,
d
eath or severe property or environmental
12.4 Trademarks
Notice: All referenced brands, product names, service names and trademarks
are the property of their respective owners.
13. Contact information
PBLS2024D_2
© NXP B.
V
.
2
009. All rights reserved.
Product data sheet
Rev. 02 — 6 September 2009
15 of 16
PBLS2024D
NXP Semiconductors
20
V
,
1
.8 A
PNP BISS loadswitch
14. Contents
1
Product profile . . . . . . . . . . . . . . . . . . . . . . . . . .
1
1.1
1.2
1.3
1.4
General description. . . . . . . . . . . . . . . . . . . . . .
1
Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
1
Applications .
. . . . . . . . . . . . . . . . . . . . . . . . . .
1
Quick reference data. . . . . . . . . . . . . . . . . . . . .
1
2
Pinning informatio
n
. . . . . . . . . . . . . . . . . . . . . .
2
Ordering informatio
n
. . . . . . . . . . . . . . . . . . . . .
2
Marking . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2
Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . .
3
Thermal characteristics. . . . . . . . . . . . . . . . . . .
4
Characteristic
s
. . . . . . . . . . . . . . . . . . . . . . . . . .
6
Test informatio
n
. . . . . . . . . . . . . . . . . . . . . . . .
1
2
Quality information . . . . . . . . . . . . . . . . . . . . .
12
Package outline . . . . . . . . . . . . . . . . . . . . . . . .
13
Packing information. . . . . . . . . . . . . . . . . . . . .
13
Revision histor
y
. . . . . . . . . . . . . . . . . . . . . . . .
1
4
3
4
5
6
7
8
8.1
9
10
11
12
Legal information. . . . . . . . . . . . . . . . . . . . . . .
15
Data sheet status . . . . . . . . . . . . . . . . . . . . . .
15
Definition
s
. . . . . . . . . . . . . . . . . . . . . . . . . . . .
1
5
Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . .
15
T
r
ademark
s
. . . . . . . . . . . . . . . . . . . . . . . . . . .
1
5
12.1
12.2
12.3
12.4
13
14
Contact informatio
n
. . . . . . . . . . . . . . . . . . . . .
15
Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
16
Please be aware that important notices concerning this document and the product(s)
described herein, have been included in section ‘Legal information’.
© NXP B.
V
.
2
009.
All rights reserved.
For sales office addresses, please send an email to: salesaddresses@nxp.com
Date of release: 6 September 2009
Document identifier: PBLS2024D_2
