Nexperia-PBLS4003D-115
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Important notice
Dear Customer,
On 7 February 2017 the former NXP Standard Product business became a new company with the
tradename
Nexperia
. Nexperia is an industry leading supplier of Discrete, Logic and PowerMOS
semiconductors with its focus on the automotive, industrial, computing, consumer and wearable
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In data sheets and application notes which still contain NXP or Philips Semiconductors references, use
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(email)
Replace the copyright notice at the bottom of each page or elsewhere in the document, depending on
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reserved
Should be replaced with:
–
© Nexperia B.V. (year). All rights reserved
.
If you have any questions related to the data sheet, please contact our nearest sales office via e-mail
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Kind regards,
Team Nexperia
PBLS4003D
40 V PNP BISS loadswitch
Rev. 03 — 5 January 2009
Product data sheet
1. Product
profile
1.1 General
description
PNP low V
CEsat
Breakthrough In Small Signal (BISS) transistor and NPN Resistor-
Equipped
T
r
ansistor (RET) in a SOT457 (SC-74) small Surface-Mounted Device (SMD)
plastic package.
1.2 Features
I
Low V
CEsat
(BISS) and resistor-equipped transistor in one package
I
Low threshold voltage (<1 V) compared to MOSFET
I
Low drive power required
I
Space-saving solution
I
Reduction of component count
1.3 Applications
I
Supply line switches
I
Battery charger switches
I
High-side switches for LEDs, drivers and backlights
I
Portable equipment
1.4 Quick
reference data
Table 1.
Symbol
Quick reference data
Parameter
Conditions
Min
Typ
Max
Unit
TR1; PNP low V
CEsat
transistor
V
CEO
I
C
collector-emitter voltage
collector current
open base
–
–
–
–
−
40
−
1
V
[1]
[2]
–
A
R
CEsat
collector-emitter saturation
I
C
=
−
500 mA;
240
340
m
Ω
resistance
I
B
=
−
50 mA
TR2; NPN resistor-equipped transistor
V
CEO
I
O
collector-emitter voltage
output current
open base
–
–
50
V
–
–
100
13
mA
k
Ω
R1
bias resistor 1 (input)
bias resistor ratio
7
10
1
R2/R1
0.8
1.2
[1] Device
mounted on a ceramic Printed-Circuit Board (PCB), Al
2
O
3
, standard footprint.
[2] Pulse
test: t
p
≤
300
µ
s;
δ ≤
0.02.
PBLS4003D
NXP Semiconductors
40 V PNP BISS loadswitch
2. Pinning
information
Table 2.
Pinning
Pin
1
Description
Simplified outline
Graphic symbol
emitter TR1
6
5
4
6
5
4
2
base TR1
3
output (collector) TR2
GND (emitter) TR2
input (base) TR2
collector TR1
R1
R2
4
1
2
3
TR2
5
TR1
1
6
2
3
sym036
3. Ordering
information
Table 3.
Ordering information
Type number
Package
Name
Description
Version
PBLS4003D
SC-74
plastic surface-mounted package (TSOP6); 6 leads
SOT457
4. Marking
Table 4.
Marking codes
Type number
Marking code
PBLS4003D
R3
5. Limiting
values
Table 5.
Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).
Symbol Parameter
Conditions
Min
Max
Unit
TR1; PNP low V
CEsat
transistor
V
CBO
V
CEO
V
EBO
I
C
collector-base voltage
collector-emitter voltage
emitter-base voltage
collector current
open emitter
open base
–
–
–
–
–
–
–
–
–
−
40
−
40
−
5
V
V
V
A
A
A
A
A
A
open collector
[1]
[2]
[3]
−
0.7
−
0.85
−
1
I
CM
I
B
peak collector current
base current
single pulse; t
p
≤
1 ms
single pulse; t
p
≤
1 ms
−
2
−
0.3
−
1
I
BM
peak base current
PBLS4003D_3
© NXP B.
V
.
2
009. All rights reserved.
Product data sheet
Rev. 03 — 5 January 2009
2 of 15
PBLS4003D
NXP Semiconductors
40 V PNP BISS loadswitch
Table 5.
Limiting values
…continued
In accordance with the Absolute Maximum Rating System (IEC 60134).
Symbol Parameter
Conditions
P
tot
total power dissipation
Min
Max
250
350
400
Unit
mW
mW
mW
[1]
[2]
[3]
T
amb
≤
25
°
C
–
–
–
TR2; NPN resistor-equipped transistor
V
CBO
V
CEO
V
EBO
V
I
collector-base voltage
collector-emitter voltage
emitter-base voltage
input voltage
open emitter
open base
–
–
–
50
50
10
V
V
V
open collector
positive
–
–
–
–
–
+40
−
10
100
100
200
V
negative
V
I
O
output current
mA
mA
mW
I
CM
peak collector current
total power dissipation
single pulse; t
p
≤
1 ms
P
tot
T
amb
≤
25
°
C
Per device
P
tot
[1]
[2]
[3]
total power dissipation
–
400
mW
mW
mW
°
C
–
530
–
600
T
j
junction temperature
ambient temperature
storage temperature
–
150
T
amb
T
stg
−
65
−
65
+150
+150
°
C
°
C
[1] Device
mounted on an FR4 PCB, single-sided copper, tin-plated and standard footprint.
[2] Device
mounted on an FR4 PCB, single-sided copper, tin-plated, mounting pad for collector 1 cm
2
.
[3] Device
mounted on a ceramic PCB, Al
2
O
3
, standard footprint.
PBLS4003D_3
© NXP B.
V
.
2
009. All rights reserved.
Product data sheet
Rev. 03 — 5 January 2009
3 of 15
PBLS4003D
NXP Semiconductors
40 V PNP BISS loadswitch
006aaa461
0.8
P
tot
(W)
(1)
(2)
0.6
(3)
0.4
0.2
0
0
40
80
120
160
(
°
C)
T
amb
(1) Ceramic
PCB, Al
2
O
3
, standard footprint
(2) FR4
PCB, mounting pad for collector 1 cm
2
(3) FR4
PCB, standard footprint
Fig 1.
Power derating curves
6. Thermal
characteristics
Table 6.
Thermal characteristics
Symbol
Per device
R
th(j-a)
Parameter
Conditions
Min
Typ Max Unit
[1]
[2]
[3]
thermal resistance from
junction to ambient
in free air
–
–
–
–
–
–
312
236
210
K/W
K/W
K/W
Per TR1; PNP low V
CEsat
transistor
R
th(j-sp)
thermal resistance from
junction to solder point
–
–
105
K/W
[1] Device
mounted on an FR4 PCB, single-sided copper, tin-plated and standard footprint.
[2] Device
mounted on an FR4 PCB, single-sided copper, tin-plated, mounting pad for collector 1 cm
2
.
[3] Device
mounted on a ceramic PCB, Al
2
O
3
, standard footprint.
PBLS4003D_3
© NXP B.
V
.
2
009. All rights reserved.
Product data sheet
Rev. 03 — 5 January 2009
4 of 15
PBLS4003D
NXP Semiconductors
40 V PNP BISS loadswitch
006aaa462
3
10
δ
= 1
Z
th(j-a)
0.75
0.5
0.33
0.2
(K/W)
2
10
0.1
0.05
0.02
0.01
10
0
1
−
1
10
−
5
−
4
−
3
−
2
−
1
2
3
10
10
10
10
10
1
10
10
10
t
(s)
p
FR4 PCB, standard footprint
Fig 2.
TR1 (PNP): Transient thermal impedance from junction to ambient as a function of pulse duration; typical
values
006aaa463
3
10
Z
th(j-a)
δ
= 1
0.75
(K/W)
0.5
0.33
0.2
2
10
0.1
0.05
10
0.02
0.01
0
1
10
−
5
−
4
−
3
−
2
−
1
2
3
10
10
10
10
1
10
10
10
t
(s)
p
FR4 PCB, mounting pad for collector 1 cm
2
Fig 3.
TR1 (PNP): Transient thermal impedance from junction to ambient as a function of pulse duration; typical
values
PBLS4003D_3
© NXP B.
V
.
2
009. All rights reserved.
Product data sheet
Rev. 03 — 5 January 2009
5 of 15
PBLS4003D
NXP Semiconductors
40 V PNP BISS loadswitch
006aaa464
3
10
Z
th(j-a)
δ
= 1
0.75
(K/W)
0.5
0.33
0.2
2
10
0.1
0.05
10
0.02
0.01
0
1
10
−
5
−
4
−
3
−
2
−
1
2
3
10
10
10
10
1
10
10
10
t
(s)
p
Ceramic PCB, Al
2
O
3
, standard footprint
Fig 4.
TR1 (PNP): Transient thermal impedance from junction to ambient as a function of pulse duration; typical
values
7. Characteristics
Table 7.
Characteristics
T
amb
= 25
°
C unless otherwise specified.
Symbol Parameter
Conditions
Min Typ
Max
Unit
TR1; PNP low V
CEsat
transistor
I
CBO
collector-base cut-off
V
CB
=
−
40 V; I
E
= 0 A
–
–
–
–
−
0.1
−
50
µ
A
µ
A
current
V
CB
=
−
40 V; I
E
= 0 A;
T
j
= 150
°
C
I
CES
I
EBO
h
FE
collector-emitter
cut-off current
V
CE
=
−
30 V; V
BE
= 0 V
–
–
–
–
−
0.1
−
0.1
µ
A
µ
A
emitter-base cut-off
current
V
EB
=
−
5 V; I
C
= 0 A
DC current gain
V
CE
=
−
5 V; I
C
=
−
1 mA
V
CE
=
−
5 V; I
C
=
−
100 mA
V
CE
=
−
5 V; I
C
=
−
500 mA
V
CE
=
−
5 V; I
C
=
−
1 A
300
–
–
[1]
[1]
[1]
300
–
800
215
–
–
–
150
–
V
CEsat
collector-emitter
saturation voltage
I
C
=
−
100 mA; I
B
=
−
1 mA
I
C
=
−
500 mA; I
B
=
−
50 mA
I
C
=
−
1 A; I
B
=
−
100 mA
I
C
=
−
500 mA; I
B
=
−
50 mA
–
–
–
–
−
80
−
120
−
220
240
−
140 mV
−
170 mV
−
310 mV
[1]
[1]
[1]
R
CEsat
V
BEsat
V
BEon
collector-emitter
saturation resistance
340
−
1.1
−
1
m
Ω
[1]
[1]
base-emitter
saturation voltage
I
C
=
−
1 A; I
B
=
−
50 mA
V
CE
=
−
5 V; I
C
=
−
1 A
–
–
–
–
V
base-emitter
V
turn-on voltage
PBLS4003D_3
© NXP B.
V
.
2
009. All rights reserved.
Product data sheet
Rev. 03 — 5 January 2009
6 of 15
PBLS4003D
NXP Semiconductors
40 V PNP BISS loadswitch
Table 7.
Characteristics
…continued
T
amb
= 25
°
C unless otherwise specified.
Symbol Parameter
Conditions
Min Typ
Max
Unit
f
T
transition frequency
I
C
=
−
50 mA; V
CE
=
−
10 V;
150
–
–
MHz
f = 100 MHz
C
c
collector capacitance
V
CB
=
−
10 V; I
E
= i
e
= 0 A;
–
–
12
pF
nA
f = 1 MHz
TR2; NPN resistor-equipped transistor
I
CBO
collector-base cut-off
V
CB
= 50 V; I
E
= 0 A
–
–
100
current
I
CEO
collector-emitter
cut-off current
V
CE
= 30 V; I
B
= 0 A
–
–
–
–
1
µ
A
µ
A
V
CE
= 30 V; I
B
= 0 A;
50
T
j
= 150
°
C
I
EBO
emitter-base cut-off
current
V
EB
= 5 V; I
C
= 0 A
–
–
400
µ
A
h
FE
DC current gain
V
CE
= 5 V; I
C
= 5 mA
30
–
–
–
–
V
CEsat
collector-emitter
I
C
= 10 mA; I
B
= 0.5 mA
150
mV
saturation voltage
V
I(off)
V
I(on)
R1
off-state input voltage
V
CE
= 5 V; I
C
= 100
µ
A
on-state input voltage
V
CE
= 0.3 V; I
C
= 10 mA
bias resistor 1 (input)
–
1.1
1.8
10
1
0.8
–
V
2.5
7
V
13
1.2
2.5
k
Ω
R2/R1
C
c
bias resistor ratio
0.8
–
collector capacitance
V
CB
= 10 V; I
E
= i
e
= 0 A;
f = 1 MHz
–
pF
[1] Pulse
test: t
p
≤
300
µ
s;
δ ≤
0.02.
PBLS4003D_3
© NXP B.
V
.
2
009. All rights reserved.
Product data sheet
Rev. 03 — 5 January 2009
7 of 15
PBLS4003D
NXP Semiconductors
40 V PNP BISS loadswitch
006aaa465
006aaa469
1200
−
2.4
I
(mA) =
−
24
I
B
C
h
FE
−
21.6
(A)
−
19.2
−
16.8
−
14.4
−
12
800
−
1.6
(1)
(2)
−
9.6
−
7.2
−
4.8
−
2.4
400
−
0.8
(3)
0
−
10
0
−
1
2
3
4
−
1
−
10
−
10
−
10
−
10
(mA)
0
−
1
−
2
−
3
−
4
−
5
(V)
CE
I
V
C
V
CE
=
−
5 V
T
amb
= 25
°
C
(1) T
amb
= 100
°
C
(2) T
amb
= 25
°
C
(3) T
amb
=
−
55
°
C
Fig 5.
TR1 (PNP): DC current gain as a function of
collector current; typical values
Fig 6.
TR1 (PNP): Collector current as a function of
collector-emitter voltage; typical values
006aaa467
006aaa468
−
1.0
−
1.3
V
(V)
BE
V
BEsat
(V)
−
0.8
(1)
(2)
−
0.9
−
0.5
−
0.1
(1)
(2)
(3)
−
0.6
−
0.4
−
0.2
(3)
−
1
2
3
4
−
1
2
3
4
−
10
−
1
−
10
−
10
−
10
−
10
(mA)
−
10
−
1
−
10
−
10
−
10
−
10
I (mA)
C
I
C
V
CE
=
−
5 V
I
C
/I
B
= 20
(1) T
amb
=
−
55
°
C
(2) T
amb
= 25
°
C
(3) T
amb
= 100
°
C
(1) T
amb
=
−
55
°
C
(2) T
amb
= 25
°
C
(3) T
amb
= 100
°
C
Fig 7.
TR1 (PNP): Base-emitter voltage as a function
of collector current; typical values
Fig 8.
TR1 (PNP): Base-emitter saturation voltage as
a function of collector current; typical values
PBLS4003D_3
© NXP B.
V
.
2
009. All rights reserved.
Product data sheet
Rev. 03 — 5 January 2009
8 of 15
PBLS4003D
NXP Semiconductors
40 V PNP BISS loadswitch
006aaa466
006aaa471
−
1
−
10
V
CEsat
(V)
V
CEsat
−
1
(V)
−
1
−
1
−
2
−
10
−
10
−
10
−
10
(1)
(2)
(1)
(2)
(3)
(3)
−
2
−
3
−
10
−
1
2
3
4
−
1
2
3
4
−
10
−
1
−
10
−
10
−
10
−
10
(mA)
−
10
−
1
−
10
−
10
−
10
−
10
I (mA)
C
I
C
I
C
/I
B
= 20
T
amb
= 25
°
C
(1) T
amb
= 100
°
C
(2) T
amb
= 25
°
C
(3) T
amb
=
−
55
°
C
(1) I
C
/I
B
= 100
(2) I
C
/I
B
= 50
(3) I
C
/I
B
= 10
Fig 9.
TR1 (PNP): Collector-emitter saturation
voltage as a function of collector current;
typical values
Fig 10.
TR1 (PNP): Collector-emitter saturation
voltage as a function of collector current;
typical values
006aaa470
006aaa472
3
3
10
10
R
CEsat
R
CEsat
(
Ω
)
(
Ω
)
2
2
10
10
(1)
(2)
(3)
10
10
(1)
(2)
1
1
(3)
−
1
−
1
10
10
−
1
2
3
4
−
1
2
3
4
−
10
−
1
−
10
−
10
−
10
−
10
(mA)
−
10
−
1
−
10
−
10
−
10
−
10
I (mA)
C
I
C
I
C
/I
B
= 20
T
amb
= 25
°
C
(1) T
amb
= 100
°
C
(2) T
amb
= 25
°
C
(3) T
amb
=
−
55
°
C
(1) I
C
/I
B
= 100
(2) I
C
/I
B
= 50
(3) I
C
/I
B
= 10
Fig 11.
TR1 (PNP): Collector-emitter saturation
resistance as a function of collector current;
typical values
Fig 12.
TR1 (PNP): Collector-emitter saturation
resistance as a function of collector current;
typical values
PBLS4003D_3
© NXP B.
V
.
2
009. All rights reserved.
Product data sheet
Rev. 03 — 5 January 2009
9 of 15
PBLS4003D
NXP Semiconductors
40 V PNP BISS loadswitch
006aaa034
006aaa035
3
10
1
(1)
(2)
(3)
h
FE
V
CEsat
(V)
2
10
(1)
(2)
(3)
−
1
10
10
−
2
1
10
10
−
1
2
2
1
10
10
1
10
10
I
(mA)
I (mA)
C
C
V
CE
= 5 V
I
C
/I
B
= 20
(1) T
amb
= 150
°
C
(2) T
amb
= 25
°
C
(3) T
amb
=
−
40
°
C
(1) T
amb
= 100
°
C
(2) T
amb
= 25
°
C
(3) T
amb
=
−
40
°
C
Fig 13.
TR2 (NPN): DC current gain as a function of
collector current; typical values
Fig 14.
TR2 (NPN): Collector-emitter saturation
voltage as a function of collector current;
typical values
006aaa036
006aaa037
10
10
V
I(on)
V
I(off)
(V)
(V)
(1)
(2)
(1)
(2)
(3)
1
1
(3)
−
1
−
1
10
10
−
1
2
−
2
−
1
10
1
10
10
10
10
1
10
I
(mA)
I (mA)
C
C
V
CE
= 0.3 V
V
CE
= 5 V
(1) T
amb
=
−
40
°
C
(2) T
amb
= 25
°
C
(3) T
amb
= 100
°
C
(1) T
amb
=
−
40
°
C
(2) T
amb
= 25
°
C
(3) T
amb
= 100
°
C
Fig 15.
TR2 (NPN): On-state input voltage as a
function of collector current; typical values
Fig 16.
TR2 (NPN): Off-state input voltage as a
function of collector current; typical values
PBLS4003D_3
© NXP B.
V
.
2
009. All rights reserved.
Product data sheet
Rev. 03 — 5 January 2009
10 of 15
PBLS4003D
NXP Semiconductors
40 V PNP BISS loadswitch
8. Package
outline
3.1
2.7
1.1
0.9
6
5
4
0.6
0.2
3.0 1.7
2.5 1.3
pin 1 index
1
2
3
0.26
0.10
0.40
0.25
0.95
1.9
Dimensions in mm
04-11-08
Fig 17.
Package outline SOT457 (SC-74)
9. Packing
information
Table 8.
Packing methods
The indicated -xxx are the last three digits of the 12NC ordering code.
[1]
Type number
Package
Description
Packing quantity
3000
-115
-125
10000
-135
[2]
[3]
PBLS4003D
SOT457
4 mm pitch, 8 mm tape and reel; T1
4 mm pitch, 8 mm tape and reel; T2
-165
[1] For
further information and the availability of packing methods, see
Section 13
.
[2] T1:
normal taping
[3] T2:
reverse taping
PBLS4003D_3
© NXP B.
V
.
2
009. All rights reserved.
Product data sheet
Rev. 03 — 5 January 2009
11 of 15
PBLS4003D
NXP Semiconductors
40 V PNP BISS loadswitch
10. Soldering
3.45
1.95
0.55
(6
×
)
solder lands
solder resist
0.45
(6
×
)
0.95
0.95
3.3 2.825
solder paste
occupied area
0.7
Dimensions in mm
(6
×
)
0.8
(6
×
)
2.4
sot457_fr
Fig 18.
Reflow soldering footprint SOT457 (SC-74)
5.3
1.5
(4
×
)
solder lands
1.475
1.475
solder resist
occupied area
0.45
(2
×
)
5.05
Dimensions in mm
preferred transport
direction during soldering
1.45
(6
×
)
2.85
sot457_fw
Fig 19.
Wave soldering footprint SOT457 (SC-74)
PBLS4003D_3
© NXP B.
V
.
2
009. All rights reserved.
Product data sheet
Rev. 03 — 5 January 2009
12 of 15
PBLS4003D
NXP Semiconductors
40 V PNP BISS loadswitch
11. Revision history
Table 9.
Revision history
Document ID
PBLS4003D_3
Modifications:
Release date
Data sheet status
Change notice
Supersedes
20090105
Product data sheet
–
PBLS4003D_2
•
The format of this data sheet has been redesigned to comply with the new identity
guidelines of NXP Semiconductors.
•
Legal texts have been adapted to the new company name where appropriate.
•
Figure 5
,
9
and
10
: amended
•
Section 12 “Legal information”
: updated
PBLS4003D_2
PBLS4003D_1
20050704
Product data sheet
–
–
PBLS4003D_1
–
20041201
Objective data sheet
PBLS4003D_3
© NXP B.
V
.
2
009. All rights reserved.
Product data sheet
Rev. 03 — 5 January 2009
13 of 15
PBLS4003D
NXP Semiconductors
40 V PNP BISS loadswitch
12. Legal information
12.1 Data
sheet status
Document status
[1][2]
Product status
[3]
Development
Definition
Objective [short] data sheet
This document contains data from the objective specification for product development.
This document contains data from the preliminary specification.
This document contains the product specification.
Preliminary [short] data sheet
Qualification
Product [short] data sheet
Production
[1]
[2]
[3]
Please consult the most recently issued document before initiating or completing a design.
The term ‘short data sheet’ is explained in section “Definitions”.
The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status
damage. NXP Semiconductors accepts no liability for inclusion and/or use of
NXP Semiconductors products in such equipment or applications and
therefore such inclusion and/or use is at the customer’s own risk.
12.2 Definitions
Draft —
The document is a draft version onl
y
.
T
he content is still under
internal review and subject to formal approval, which may result in
modifications or additions. NXP Semiconductors does not give any
representations or warranties as to the accuracy or completeness of
information included herein and shall have no liability for the consequences of
use of such information.
Applications —
Applications that are described herein for any of these
products are for illustrative purposes onl
y
.
N
XP Semiconductors makes no
representation or warranty that such applications will be suitable for the
specified use without further testing or modification.
Limiting values —
Stress above one or more limiting values (as defined in
the Absolute Maximum Ratings System of IEC 60134) may cause permanent
damage to the device. Limiting values are stress ratings only and operation of
the device at these or any other conditions above those given in the
Characteristics sections of this document is not implied. Exposure to limiting
values for extended periods may affect device reliabilit
y
.
Short data sheet —
A short data sheet is an extract from a full data sheet
with the same product type number(s) and title. A short data sheet is intended
for quick reference only and should not be relied upon to contain detailed and
full information. For detailed and full information see the relevant full data
sheet, which is available on request via the local NXP Semiconductors sales
office. In case of any inconsistency or conflict with the short data sheet, the
full data sheet shall prevail.
Terms and conditions of sale —
NXP Semiconductors products are sold
subject to the general terms and conditions of commercial sale, as published
explicitly otherwise agreed to in writing by NXP Semiconductors. In case of
any inconsistency or conflict between information in this document and such
terms and conditions, the latter will prevail.
12.3 Disclaimers
General —
Information in this document is believed to be accurate and
reliable. However, NXP Semiconductors does not give any representations or
warranties, expressed or implied, as to the accuracy or completeness of such
information and shall have no liability for the consequences of use of such
information.
No offer to sell or license —
Nothing in this document may be interpreted
or construed as an offer to sell products that is open for acceptance or the
grant, conveyance or implication of any license under any copyrights, patents
or other industrial or intellectual property rights.
Right to make changes —
NXP Semiconductors reserves the right to make
changes to information published in this document, including without
limitation specifications and product descriptions, at any time and without
notice. This document supersedes and replaces all information supplied prior
to the publication hereof.
Quick reference data —
The Quick reference data is an extract of the
product data given in the Limiting values and Characteristics sections of this
document, and as such is not complete, exhaustive or legally binding.
Suitability for use —
NXP Semiconductors products are not designed,
authorized or warranted to be suitable for use in medical, militar
y
,
a
ircraft,
space or life support equipment, nor in applications where failure or
malfunction of an NXP Semiconductors product can reasonably be expected
to result in personal injur
y
,
d
eath or severe property or environmental
12.4 Trademarks
Notice: All referenced brands, product names, service names and trademarks
are the property of their respective owners.
13. Contact information
PBLS4003D_3
© NXP B.
V
.
2
009. All rights reserved.
Product data sheet
Rev. 03 — 5 January 2009
14 of 15
PBLS4003D
NXP Semiconductors
40 V PNP BISS loadswitch
14. Contents
1
Product profile . . . . . . . . . . . . . . . . . . . . . . . . . .
1
1.1
1.2
1.3
1.4
General description. . . . . . . . . . . . . . . . . . . . . .
1
Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
1
Applications .
. . . . . . . . . . . . . . . . . . . . . . . . . .
1
Quick reference data. . . . . . . . . . . . . . . . . . . . .
1
2
Pinning informatio
n
. . . . . . . . . . . . . . . . . . . . . .
2
Ordering informatio
n
. . . . . . . . . . . . . . . . . . . . .
2
Marking . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2
Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . .
2
Thermal characteristics. . . . . . . . . . . . . . . . . . .
4
Characteristic
s
. . . . . . . . . . . . . . . . . . . . . . . . . .
6
Package outline . . . . . . . . . . . . . . . . . . . . . . . .
11
Packing information. . . . . . . . . . . . . . . . . . . . .
11
Soldering .
. . . . . . . . . . . . . . . . . . . . . . . . . . . .
12
Revision histor
y
. . . . . . . . . . . . . . . . . . . . . . . .
1
3
3
4
5
6
7
8
9
10
11
12
Legal information. . . . . . . . . . . . . . . . . . . . . . .
14
Data sheet status . . . . . . . . . . . . . . . . . . . . . .
14
Definition
s
. . . . . . . . . . . . . . . . . . . . . . . . . . . .
1
4
Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . .
14
T
r
ademark
s
. . . . . . . . . . . . . . . . . . . . . . . . . . .
1
4
12.1
12.2
12.3
12.4
13
14
Contact informatio
n
. . . . . . . . . . . . . . . . . . . . .
14
Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
15
Please be aware that important notices concerning this document and the product(s)
described herein, have been included in section ‘Legal information’.
© NXP B.
V
.
2
009.
All rights reserved.
For sales office addresses, please send an email to: salesaddresses@nxp.com
Date of release: 5 January 2009
Document identifier: PBLS4003D_3
