Nexperia-PBLS6002D-115
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Important notice
Dear Customer,
On 7 February 2017 the former NXP Standard Product business became a new company with the
tradename
Nexperia
. Nexperia is an industry leading supplier of Discrete, Logic and PowerMOS
semiconductors with its focus on the automotive, industrial, computing, consumer and wearable
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(email)
Replace the copyright notice at the bottom of each page or elsewhere in the document, depending on
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– © NXP N.V. (year). All rights reserved or © Koninklijke Philips Electronics N.V. (year). All rights
reserved
Should be replaced with:
–
© Nexperia B.V. (year). All rights reserved
.
If you have any questions related to the data sheet, please contact our nearest sales office via e-mail
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Kind regards,
Team Nexperia
PBLS6002D
60 V PNP BISS loadswitch
Rev. 02 — 7 September 2009
Product data sheet
1. Product
profile
1.1 General
description
PNP low V
CEsat
Breakthrough In Small Signal (BISS) transistor and
NPN Resistor-Equipped
T
r
ansistor (RET) in a SOT457 (SC-74) small Surface Mounted
Device (SMD) plastic package.
1.2 Features
I
Low V
CEsat
(BISS) transistor and resistor-equipped transistor in one package
I
Low threshold voltage (< 1 V) compared to MOSFET
I
Low drive power required
I
Space-saving solution
I
Reduction of component count
1.3 Applications
I
Supply line switches
I
Battery charger switches
I
High-side switches for LEDs, drivers and backlights
I
Portable equipment
1.4 Quick
reference data
Table 1.
Symbol
Quick reference data
Parameter
Conditions
Min
Typ
Max
Unit
TR1; PNP low V
CEsat
transistor
V
CEO
I
C
collector-emitter voltage
collector current (DC)
open base
–
–
–
–
−
60
−
1
V
[1]
[2]
–
A
R
CEsat
collector-emitter saturation
I
C
=
−
1 A;
resistance I
B
=
−
100 mA
255
340
m
Ω
TR2; NPN resistor-equipped transistor
V
CEO
I
O
collector-emitter voltage
output current (DC)
bias resistor 1 (input)
bias resistor ratio
open base
–
–
50
V
–
–
100
6.1
1.2
mA
k
Ω
R1
3.3
0.8
4.7
1
R2/R1
[1] Device
mounted on a ceramic Printed-Circuit Board (PCB), Al
2
O
3
, standard footprint.
[2] Pulse
test: t
p
≤
300
µ
s;
δ ≤
0.02
PBLS6002D
NXP Semiconductors
60 V PNP BISS loadswitch
2. Pinning
information
Table 2.
Pinning
Pin
1
Description
Simplified outline
Symbol
emitter TR1
6
5
4
6
5
4
2
base TR1
3
output (collector) TR2
GND (emitter) TR2
input (base) TR2
collector TR1
R1
R2
4
1
2
3
TR2
5
TR1
1
6
2
3
sym036
3. Ordering
information
Table 3.
Ordering information
Type number
Package
Name
Description
Version
PBLS6002D
SC-74
plastic surface mounted package; 6 leads
SOT457
4. Marking
Table 4.
Marking codes
Type number
Marking code
PBLS6002D
F2
PBLS6002D_2
© NXP B.
V
.
2
009. All rights reserved.
Product data sheet
Rev. 02 — 7 September 2009
2 of 16
PBLS6002D
NXP Semiconductors
60 V PNP BISS loadswitch
5. Limiting
values
Table 5.
Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).
Symbol
Parameter
Conditions
Min
Max
Unit
TR1; PNP low V
CEsat
transistor
V
CBO
V
CEO
V
EBO
I
C
collector-base voltage
collector-emitter voltage
emitter-base voltage
collector current (DC)
open emitter
open base
–
–
–
–
–
–
–
−
80
−
60
−
5
V
V
open collector
V
[1]
[2]
[3]
−
700
−
850
−
1
mA
mA
A
I
CM
peak collector current
single pulse;
−
2
A
t
p
≤
1 ms
I
B
base current (DC)
peak base current
–
–
−
300
−
1
mA
A
I
BM
single pulse;
t
p
≤
1 ms
[1]
[2]
[3]
P
tot
total power dissipation
T
amb
≤
25
°
C
–
–
–
250
350
400
mW
mW
mW
TR2; NPN resistor-equipped transistor
V
CBO
V
CEO
V
EBO
V
I
collector-base voltage
collector-emitter voltage
emitter-base voltage
input voltage
open emitter
open base
–
–
–
50
50
10
V
V
V
open collector
positive
–
–
–
–
–
–
–
+30
−
10
100
100
200
200
200
V
negative
V
I
O
output current (DC)
peak collector current
total power dissipation
mA
mA
mW
mW
mW
I
CM
P
tot
[1]
[2]
[3]
T
amb
≤
25
°
C
Per device
[1]
[2]
[3]
P
tot
total power dissipation
T
amb
≤
25
°
C
–
400
mW
mW
mW
°
C
–
530
–
600
T
stg
T
j
storage temperature
junction temperature
ambient temperature
−
65
–
+150
150
°
C
T
amb
−
65
+150
°
C
[1] Device
mounted on an FR4 PCB, single-sided copper, tin-plated and standard footprint.
[2] Device
mounted on an FR4 PCB, single-sided copper, tin-plated, mounting pad for collector 1cm
2
.
[3] Device
mounted on a ceramic PCB, Al
2
O
3
, standard footprint.
PBLS6002D_2
© NXP B.
V
.
2
009. All rights reserved.
Product data sheet
Rev. 02 — 7 September 2009
3 of 16
PBLS6002D
NXP Semiconductors
60 V PNP BISS loadswitch
006aaa461
0.8
P
tot
(W)
(1)
(2)
0.6
(3)
0.4
0.2
0
0
40
80
120
160
(
°
C)
T
amb
(1) Ceramic
PCB, Al
2
O
3
, standard footprint
(2) FR4
PCB, mounting pad for collector 1cm
2
(3) FR4
PCB, standard footprint
Fig 1.
Power derating curves
6. Thermal
characteristics
Table 6.
Thermal characteristics
Parameter
Symbol
Per device
R
th(j-a)
Conditions
Min
Typ
Max
Unit
[1]
[2]
[3]
thermal resistance from
in free air
junction to ambient
–
–
–
–
–
–
312
236
208
K/W
K/W
K/W
TR1; PNP low V
CEsat
transistor
R
th(j-sp)
thermal resistance from
junction to solder point
–
–
105
K/W
[1] Device
mounted on an FR4 PCB, single-sided copper, tin-plated and standard footprint.
[2] Device
mounted on an FR4 PCB, single-sided copper, tin-plated, mounting pad for collector 1cm
2
.
[3] Device
mounted on a ceramic PCB, Al
2
O
3
, standard footprint.
PBLS6002D_2
© NXP B.
V
.
2
009. All rights reserved.
Product data sheet
Rev. 02 — 7 September 2009
4 of 16
PBLS6002D
NXP Semiconductors
60 V PNP BISS loadswitch
006aaa462
3
10
δ
= 1
Z
th(j-a)
0.75
0.5
0.33
0.2
(K/W)
2
10
0.1
0.05
0.02
0.01
10
0
1
−
1
10
−
5
−
4
−
3
−
2
−
1
2
3
10
10
10
10
10
1
10
10
10
t
(s)
p
FR4 PCB, standard footprint
Fig 2.
TR1 (PNP): Transient thermal impedance from junction to ambient as a function of pulse time;
typical values
006aaa463
3
10
Z
th(j-a)
δ
= 1
0.75
(K/W)
0.5
0.33
0.2
2
10
0.1
0.05
10
0.02
0.01
0
1
10
−
5
−
4
−
3
−
2
−
1
2
3
10
10
10
10
1
10
10
10
t
(s)
p
FR4 PCB, mounting pad for collector 1cm
2
Fig 3.
TR1 (PNP): Transient thermal impedance from junction to ambient as a function of pulse time;
typical values
PBLS6002D_2
© NXP B.
V
.
2
009. All rights reserved.
Product data sheet
Rev. 02 — 7 September 2009
5 of 16
PBLS6002D
NXP Semiconductors
60 V PNP BISS loadswitch
006aaa464
3
10
Z
th(j-a)
δ
= 1
0.75
(K/W)
0.5
0.33
0.2
2
10
0.1
0.05
10
0.02
0.01
0
1
10
−
5
−
4
−
3
−
2
−
1
2
3
10
10
10
10
1
10
10
10
t
(s)
p
Ceramic PCB, Al
2
O
3
, standard footprint
Fig 4.
TR1 (PNP): Transient thermal impedance from junction to ambient as a function of pulse time;
typical values
7. Characteristics
Table 7.
Characteristics
T
amb
= 25
°
C unless otherwise specified
Symbol Parameter
Conditions
Min
Typ
Max Unit
TR1; PNP low V
CEsat
transistor
I
CBO
collector-base cut-off
current
V
CB
=
−
60 V; I
E
= 0 A
–
–
–
–
−
100 nA
V
CB
=
−
60 V; I
E
= 0 A;
T
j
= 150
°
C
−
50
µ
A
I
CES
collector-emitter cut-off
current
V
CE
=
−
60 V; V
BE
= 0 V
–
–
−
100 nA
I
EBO
h
FE
emitter-base cut-off current
V
EB
=
−
5 V; I
C
= 0 A
–
–
−
100 nA
DC current gain
V
CE
=
−
5 V; I
C
=
−
1 mA
200
150
350
230
–
–
[1]
[1]
V
CE
=
−
5 V;
I
C
=
−
500 mA
V
CE
=
−
5 V;
100
160
–
I
C
=
−
1000 mA
V
CEsat
collector-emitter saturation
I
C
=
−
100 mA;
–
–
–
–
–
−
110
−
175 mV
−
135
−
180 mV
−
255
−
340 mV
voltage
I
B
=
−
1 mA
[1]
[1]
[1]
[1]
I
C
=
−
500 mA;
I
B
=
−
50 mA
I
C
=
−
1000 mA;
I
B
=
−
100 mA
R
CEsat
V
BEsat
collector-emitter saturation
I
C
=
−
1 A;
255
340
m
Ω
resistance
I
B
=
−
100 mA
base-emitter saturation
voltage
I
C
=
−
1 A; I
B
=
−
50 mA
−
0.95
−
1.1
V
PBLS6002D_2
© NXP B.
V
.
2
009. All rights reserved.
Product data sheet
Rev. 02 — 7 September 2009
6 of 16
PBLS6002D
NXP Semiconductors
60 V PNP BISS loadswitch
Table 7.
Characteristics
…continued
T
amb
= 25
°
C unless otherwise specified
Symbol Parameter
Conditions
Min
Typ
Max Unit
[1]
V
BEon
base-emitter turn-on
voltage
V
CE
=
−
5 V; I
C
=
−
1 A
–
−
0.82
−
0.9
V
t
d
t
r
delay time
I
C
=
−
0.5 A;
–
11
–
–
–
–
–
–
–
ns
I
Bon
=
−
25 mA;
rise time
–
30
ns
I
Boff
= 25 mA
t
on
t
s
turn-on time
storage time
fall time
–
41
ns
–
205
55
ns
t
f
–
ns
t
off
f
T
turn-off time
transition frequency
–
260
185
ns
I
C
=
−
50 mA;
CE
=
−
10 V;
150
MHz
V
f = 100 MHz
C
c
collector capacitance
V
CB
=
−
10 V;
I
E
= i
e
= 0 A; f = 1 MHz
–
–
9
–
15
pF
nA
TR2; NPN resistor-equipped transistor
I
CBO
collector-base cut-off
current
V
CB
= 50 V; I
E
= 0 A
100
I
CEO
collector-emitter cut-off
current
V
CE
= 30 V; I
B
= 0 A
–
–
–
–
1
µ
A
µ
A
V
CE
= 30 V; I
B
= 0 A;
50
T
j
= 150
°
C
I
EBO
h
FE
emitter-base cut-off current
V
EB
= 5 V; I
C
= 0 A
DC current gain
V
CE
= 5 V; I
C
= 20 mA
collector-emitter saturation
I
C
= 10 mA;
–
–
–
–
900
–
µ
A
30
–
V
CEsat
150
mV
voltage
I
B
= 0.5 mA
V
I(off)
V
I(on)
off-state input voltage
on-state input voltage
V
CE
= 5 V; I
C
= 100
µ
A
–
1.1
1.9
0.5
–
V
V
V
CE
= 0.3 V;
I
C
= 20 mA
2.5
R1
bias resistor 1 (input)
bias resistor ratio
3.3
0.8
–
4.7
1
6.1
1.2
2.5
k
Ω
R2/R1
C
c
collector capacitance
V
CB
= 10 V;
–
pF
I
E
= i
e
= 0 A; f = 1 MHz
[1] Pulse
test: t
p
≤
300
µ
s;
δ ≤
0.02
PBLS6002D_2
© NXP B.
V
.
2
009. All rights reserved.
Product data sheet
Rev. 02 — 7 September 2009
7 of 16
PBLS6002D
NXP Semiconductors
60 V PNP BISS loadswitch
006aaa474
006aaa475
600
−
1
(1)
h
FE
V
CEsat
(V)
400
(2)
(3)
−
1
−
10
(1)
(2)
(3)
200
−
2
0
−
10
−
10
−
1
2
3
4
−
1
2
3
4
−
1
−
10
−
10
−
10
−
10
(mA)
−
10
−
1
−
10
−
10
−
10
−
10
I (mA)
C
I
C
V
CE
=
−
5 V
I
C
/I
B
= 20
(1) T
amb
= 100
°
C
(2) T
amb
= 25
°
C
(3) T
amb
=
−
55
°
C
(1) T
amb
= 100
°
C
(2) T
amb
= 25
°
C
(3) T
amb
=
−
55
°
C
Fig 5.
TR1 (PNP): DC current gain as a function of
collector current; typical values
Fig 6.
TR1 (PNP): Collector-emitter saturation
voltage as a function of collector current;
typical values
006aaa476
006aaa477
−
1.0
−
1.1
V
BEsat
(V)
V
(V)
BE
−
0.9
−
0.7
−
0.5
−
0.3
−
0.1
−
0.8
(1)
(2)
(1)
(2)
(3)
−
0.6
−
0.4
−
0.2
(3)
−
1
2
3
4
−
1
2
3
4
−
10
−
1
−
10
−
10
−
10
−
10
(mA)
−
10
−
1
−
10
−
10
−
10
−
10
I (mA)
C
I
C
V
CE
=
−
5 V
I
C
/I
B
= 20
(1) T
amb
=
−
55
°
C
(2) T
amb
= 25
°
C
(3) T
amb
= 100
°
C
(1) T
amb
=
−
55
°
C
(2) T
amb
= 25
°
C
(3) T
amb
= 100
°
C
Fig 7.
TR1 (PNP): Base-emitter voltage as a function
of collector current; typical values
Fig 8.
TR1 (PNP): Base-emitter saturation voltage as
a function of collector current; typical values
PBLS6002D_2
© NXP B.
V
.
2
009. All rights reserved.
Product data sheet
Rev. 02 — 7 September 2009
8 of 16
PBLS6002D
NXP Semiconductors
60 V PNP BISS loadswitch
006aaa478
006aaa479
3
−
2.0
10
I
(mA) =
−
35.0
−
31.5
B
I
C
R
CEsat
(A)
−
28.0
(
Ω
)
−
24.5
−
21.0
−
1.6
−
17.5
−
14.0
2
10
−
10.5
−
7.0
−
1.2
−
0.8
−
0.4
0.0
10
(1)
(2)
(3)
−
3.5
1
−
1
10
−
1
2
3
4
0
−
1
−
2
−
3
−
4
−
5
(V)
−
10
−
1
−
10
−
10
−
10
−
10
I (mA)
C
V
CE
T
amb
= 25
°
C
I
C
/I
B
= 20
(1) T
amb
= 100
°
C
(2) T
amb
= 25
°
C
(3) T
amb
=
−
55
°
C
Fig 9.
TR1 (PNP): Collector current as a function of
collector-emitter voltage; typical values
Fig 10.
TR1 (PNP): Collector-emitter saturation
resistance as a function of collector current;
typical values
006aaa480
006aaa481
3
−
1
10
R
CEsat
(
Ω
)
V
CEsat
(V)
2
10
(1)
(2)
(3)
−
1
−
10
10
(1)
(2)
1
(3)
−
2
−
1
−
10
10
−
1
2
3
4
−
1
2
3
4
−
10
−
1
−
10
−
10
−
10
−
10
(mA)
−
10
−
1
−
10
−
10
−
10
−
10
I (mA)
C
I
C
T
amb
= 25
°
C
T
amb
= 25
°
C
(1) I
C
/I
B
= 100
(2) I
C
/I
B
= 50
(3) I
C
/I
B
= 10
(1) I
C
/I
B
= 100
(2) I
C
/I
B
= 50
(3) I
C
/I
B
= 10
Fig 11.
TR1 (PNP): Collector-emitter saturation
voltage as a function of collector current;
typical values
Fig 12.
TR1 (PNP): Collector-emitter saturation
resistance as a function of collector current;
typical values
PBLS6002D_2
© NXP B.
V
.
2
009. All rights reserved.
Product data sheet
Rev. 02 — 7 September 2009
9 of 16
PBLS6002D
NXP Semiconductors
60 V PNP BISS loadswitch
006aaa030
006aaa031
3
10
1
h
FE
(1)
(2)
(3)
V
CEsat
(V)
2
10
(1)
(2)
(3)
−
1
10
10
−
2
1
10
10
−
1
2
2
1
10
10
1
10
10
I
(mA)
I (mA)
C
C
V
CE
= 5 V
I
C
/I
B
= 20
(1) T
amb
= 150
°
C
(2) T
amb
= 25
°
C
(3) T
amb
=
−
40
°
C
(1) T
amb
= 100
°
C
(2) T
amb
= 25
°
C
(3) T
amb
=
−
40
°
C
Fig 13.
TR2 (NPN): DC current gain as a function of
collector current; typical values
Fig 14.
TR2 (NPN): Collector-emitter saturation
voltage as a function of collector current;
typical values
006aaa032
006aaa033
10
10
V
I(on)
V
I(off)
(V)
(V)
(1)
(1)
(2)
(2)
(3)
1
1
(3)
−
1
−
1
10
10
−
1
2
−
2
−
1
10
1
10
10
10
10
1
10
I
(mA)
I (mA)
C
C
V
CE
= 0.3 V
V
CE
= 5 V
(1) T
amb
=
−
40
°
C
(2) T
amb
= 25
°
C
(3) T
amb
= 100
°
C
(1) T
amb
=
−
40
°
C
(2) T
amb
= 25
°
C
(3) T
amb
= 100
°
C
Fig 15.
TR2 (NPN): On-state input voltage as a
function of collector current; typical values
Fig 16.
TR2 (NPN): Off-state input voltage as a
function of collector current; typical values
PBLS6002D_2
© NXP B.
V
.
2
009. All rights reserved.
Product data sheet
Rev. 02 — 7 September 2009
10 of 16
PBLS6002D
NXP Semiconductors
60 V PNP BISS loadswitch
8. Test
information
−
I
B
input pulse
90 %
(idealized waveform)
−
I
(100 %)
Bon
10 %
−
I
Boff
output pulse
−
(idealized waveform)
I
C
90 %
−
I
(100 %)
C
10 %
t
t
t
f
t
t
r
s
d
006aaa266
t
t
off
on
Fig 17.
BISS transistor switching time definition
V
V
CC
BB
R
B
R
C
V
o
(probe)
(probe)
oscilloscope
oscilloscope
450
Ω
450
Ω
R2
V
I
DUT
R1
mgd624
I
C
=
−
0.5 A; I
Bon
=
−
25 mA; I
Boff
= 25 mA; R1 = open; R2 = 100
Ω
; R
B
= 300
Ω
; R
C
= 20
Ω
Fig 18.
Test circuit for switching times
PBLS6002D_2
© NXP B.
V
.
2
009. All rights reserved.
Product data sheet
Rev. 02 — 7 September 2009
11 of 16
PBLS6002D
NXP Semiconductors
60 V PNP BISS loadswitch
9. Package
outline
3.1
2.7
1.1
0.9
6
5
4
0.6
0.2
3.0 1.7
2.5 1.3
pin 1 index
1
2
3
0.26
0.10
0.40
0.25
0.95
1.9
Dimensions in mm
04-11-08
Fig 19.
Package outline SOT457 (SC-74)
10. Packing information
Table 8.
Packing methods
The indicated -xxx are the last three digits of the 12NC ordering code.
[1]
Type number
Package
Description
Packing quantity
3000
-115
-125
10000
-135
[2]
[3]
PBLS6002D
SOT457
4 mm pitch, 8 mm tape and reel; T1
4 mm pitch, 8 mm tape and reel; T2
-165
[1] For
further information and the availability of packing methods, see
Section 14
.
[2] T1:
normal taping
[3] T2:
reverse taping
PBLS6002D_2
© NXP B.
V
.
2
009. All rights reserved.
Product data sheet
Rev. 02 — 7 September 2009
12 of 16
PBLS6002D
NXP Semiconductors
60 V PNP BISS loadswitch
11. Soldering
3.45
1.95
solder lands
solder resist
occupied area
solder paste
0.95
0.45 0.55
2.825
3.30
1.60
1.70
3.10
3.20
msc422
Dimensions in mm
Fig 20.
Reflow soldering footprint
5.30
solder lands
solder resist
occupied area
5.05
0.45 1.45 4.45
msc423
1.40
4.30
Dimensions in mm
Fig 21.
Wave soldering footprint
PBLS6002D_2
© NXP B.
V
.
2
009. All rights reserved.
Product data sheet
Rev. 02 — 7 September 2009
13 of 16
PBLS6002D
NXP Semiconductors
60 V PNP BISS loadswitch
12. Revision history
Table 9.
Revision history
Document ID
PBLS6002D_2
Modifications:
Release date
Data sheet status
Change notice
Supersedes
20090907
Product data sheet
–
PBLS6002D_1
•
This data sheet was changed to reflect the new company name NXP Semiconductors,
including new legal definitions and disclaimers. No changes were made to the technical
content.
•
Figure 6 “TR1 (PNP): Collector-emitter saturation voltage as a function of collector current;
typical values”
: V
CEsat
unit amended from mV to V
•
Figure 20 “Reflow soldering footprint”
: updated
•
Figure 21 “Wave soldering footprint”
: updated
PBLS6002D_1
20050623
Product data sheet
–
–
PBLS6002D_2
© NXP B.
V
.
2
009. All rights reserved.
Product data sheet
Rev. 02 — 7 September 2009
14 of 16
PBLS6002D
NXP Semiconductors
60 V PNP BISS loadswitch
13. Legal information
13.1 Data
sheet status
Document status
[1][2]
Product status
[3]
Development
Definition
Objective [short] data sheet
This document contains data from the objective specification for product development.
This document contains data from the preliminary specification.
This document contains the product specification.
Preliminary [short] data sheet
Qualification
Product [short] data sheet
Production
[1]
[2]
[3]
Please consult the most recently issued document before initiating or completing a design.
The term ‘short data sheet’ is explained in section “Definitions”.
The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status
damage. NXP Semiconductors accepts no liability for inclusion and/or use of
NXP Semiconductors products in such equipment or applications and
therefore such inclusion and/or use is at the customer’s own risk.
13.2 Definitions
Draft —
The document is a draft version onl
y
.
T
he content is still under
internal review and subject to formal approval, which may result in
modifications or additions. NXP Semiconductors does not give any
representations or warranties as to the accuracy or completeness of
information included herein and shall have no liability for the consequences of
use of such information.
Applications —
Applications that are described herein for any of these
products are for illustrative purposes onl
y
.
N
XP Semiconductors makes no
representation or warranty that such applications will be suitable for the
specified use without further testing or modification.
Limiting values —
Stress above one or more limiting values (as defined in
the Absolute Maximum Ratings System of IEC 60134) may cause permanent
damage to the device. Limiting values are stress ratings only and operation of
the device at these or any other conditions above those given in the
Characteristics sections of this document is not implied. Exposure to limiting
values for extended periods may affect device reliabilit
y
.
Short data sheet —
A short data sheet is an extract from a full data sheet
with the same product type number(s) and title. A short data sheet is intended
for quick reference only and should not be relied upon to contain detailed and
full information. For detailed and full information see the relevant full data
sheet, which is available on request via the local NXP Semiconductors sales
office. In case of any inconsistency or conflict with the short data sheet, the
full data sheet shall prevail.
Terms and conditions of sale —
NXP Semiconductors products are sold
subject to the general terms and conditions of commercial sale, as published
explicitly otherwise agreed to in writing by NXP Semiconductors. In case of
any inconsistency or conflict between information in this document and such
terms and conditions, the latter will prevail.
13.3 Disclaimers
General —
Information in this document is believed to be accurate and
reliable. However, NXP Semiconductors does not give any representations or
warranties, expressed or implied, as to the accuracy or completeness of such
information and shall have no liability for the consequences of use of such
information.
No offer to sell or license —
Nothing in this document may be interpreted
or construed as an offer to sell products that is open for acceptance or the
grant, conveyance or implication of any license under any copyrights, patents
or other industrial or intellectual property rights.
Right to make changes —
NXP Semiconductors reserves the right to make
changes to information published in this document, including without
limitation specifications and product descriptions, at any time and without
notice. This document supersedes and replaces all information supplied prior
to the publication hereof.
Export control —
This document as well as the item(s) described herein
may be subject to export control regulations. Export might require a prior
authorization from national authorities.
Quick reference data —
The Quick reference data is an extract of the
product data given in the Limiting values and Characteristics sections of this
document, and as such is not complete, exhaustive or legally binding.
Suitability for use —
NXP Semiconductors products are not designed,
authorized or warranted to be suitable for use in medical, militar
y
,
a
ircraft,
space or life support equipment, nor in applications where failure or
malfunction of an NXP Semiconductors product can reasonably be expected
to result in personal injur
y
,
d
eath or severe property or environmental
13.4 Trademarks
Notice: All referenced brands, product names, service names and trademarks
are the property of their respective owners.
14. Contact information
PBLS6002D_2
© NXP B.
V
.
2
009. All rights reserved.
Product data sheet
Rev. 02 — 7 September 2009
15 of 16
PBLS6002D
NXP Semiconductors
60 V PNP BISS loadswitch
15. Contents
1
Product profile . . . . . . . . . . . . . . . . . . . . . . . . . .
1
1.1
1.2
1.3
1.4
General description. . . . . . . . . . . . . . . . . . . . . .
1
Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
1
Applications .
. . . . . . . . . . . . . . . . . . . . . . . . . .
1
Quick reference data. . . . . . . . . . . . . . . . . . . . .
1
2
Pinning informatio
n
. . . . . . . . . . . . . . . . . . . . . .
2
Ordering informatio
n
. . . . . . . . . . . . . . . . . . . . .
2
Marking . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2
Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . .
3
Thermal characteristics. . . . . . . . . . . . . . . . . . .
4
Characteristic
s
. . . . . . . . . . . . . . . . . . . . . . . . . .
6
Test informatio
n
. . . . . . . . . . . . . . . . . . . . . . . .
1
1
Package outline . . . . . . . . . . . . . . . . . . . . . . . .
12
Packing information. . . . . . . . . . . . . . . . . . . . .
12
Soldering .
. . . . . . . . . . . . . . . . . . . . . . . . . . . .
13
Revision histor
y
. . . . . . . . . . . . . . . . . . . . . . . .
1
4
3
4
5
6
7
8
9
10
11
12
13
Legal information. . . . . . . . . . . . . . . . . . . . . . .
15
Data sheet status . . . . . . . . . . . . . . . . . . . . . .
15
Definition
s
. . . . . . . . . . . . . . . . . . . . . . . . . . . .
1
5
Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . .
15
T
r
ademark
s
. . . . . . . . . . . . . . . . . . . . . . . . . . .
1
5
13.1
13.2
13.3
13.4
14
15
Contact informatio
n
. . . . . . . . . . . . . . . . . . . . .
15
Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
16
Please be aware that important notices concerning this document and the product(s)
described herein, have been included in section ‘Legal information’.
© NXP B.
V
.
2
009.
All rights reserved.
For sales office addresses, please send an email to: salesaddresses@nxp.com
Date of release: 7 September 2009
Document identifier: PBLS6002D_2
