Nexperia-PBSS302PD-115
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Important notice
Dear Customer,
On 7 February 2017 the former NXP Standard Product business became a new company with the
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Nexperia
. Nexperia is an industry leading supplier of Discrete, Logic and PowerMOS
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Replace the copyright notice at the bottom of each page or elsewhere in the document, depending on
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Should be replaced with:
–
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.
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Team Nexperia
PBSS302PD
40
V
, 4 A
P
NP low V
CEsat
(BISS) transistor
Rev. 02 — 6 December 2007
Product data sheet
1. Product
profile
1.1 General
description
PNP low V
CEsat
Breakthrough In Small Signal (BISS) transistor in a SOT457 (SC-74)
small Surface-Mounted Device (SMD) plastic package.
NPN complement: PBSS302ND.
1.2 Features
I
Ultra low collector-emitter saturation voltage V
CEsat
I
4 A continuous collector current capability I
C
I
Up to 15 A peak current
I
Very low collector-emitter saturation resistance
I
High efficiency due to less heat generation
1.3 Applications
I
Power management functions
I
Charging circuits
I
DC-to-DC conversion
I
MOSFET gate driving
I
Power switches (e.g. motors, fans)
I
Thin Film
T
r
ansistor (TFT) backlight inverter
1.4 Quick
reference data
Table 1.
Symbol
V
CEO
I
C
Quick reference data
Parameter
Conditions
Min
Typ
Max
−
40
−
4
Unit
V
collector-emitter voltage
open base
collector current
–
–
–
–
–
–
[1]
[2]
A
I
CM
peak collector current
single pulse;
t
p
≤
1 ms
−
15
A
R
CEsat
collector-emitter
I
C
=
−
6 A;
–
55
75
m
Ω
saturation resistance
I
B
=
−
600 mA
[1] Device
mounted on a ceramic Printed-Circuit Board (PCB), Al
2
O
3
, standard footprint.
[2] Pulse
test: t
p
≤
300
µ
s;
δ ≤
0.02.
PBSS302PD
NXP Semiconductors
40
V
, 4 A
P
NP low V
CEsat
(BISS) transistor
2. Pinning
information
Table 2.
Pinning
Pin
1
Description
collector
collector
base
Simplified outline
Symbol
6
5
4
1, 2, 5, 6
2
3
3
4
emitter
1
2
3
4
5
collector
collector
sym030
6
3. Ordering
information
Table 3.
Ordering information
Type number
Package
Name
Description
Version
PBSS302PD
SC-74
plastic surface-mounted package (TSOP6); 6 leads
SOT457
4. Marking
Table 4.
Marking codes
Type number
Marking code
PBSS302PD
C9
5. Limiting
values
Table 5.
Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).
Symbol
V
CBO
V
CEO
V
EBO
I
C
Parameter
Conditions
Min
Max
−
40
−
40
−
5
Unit
V
collector-base voltage
open emitter
–
–
–
–
–
collector-emitter voltage
open base
V
emitter-base voltage
collector current
open collector
V
[1]
−
4
A
I
CM
peak collector current
single pulse;
−
15
A
t
p
≤
1 ms
I
B
base current
–
–
−
0.8
−
2
A
A
I
BM
peak base current
single pulse;
t
p
≤
1 ms
[2]
[3]
P
tot
total power dissipation
T
amb
≤
25
°
C
–
–
–
–
–
360
600
750
1.1
mW
mW
mW
W
[4]
[1]
[2][5]
2.5
W
PBSS302PD_2
© NXP B.
V
.
2
007. All rights reserved.
Product data sheet
Rev. 02 — 6 December 2007
2 of 14
PBSS302PD
NXP Semiconductors
40
V
, 4 A
P
NP low V
CEsat
(BISS) transistor
Table 5.
Limiting values
…continued
In accordance with the Absolute Maximum Rating System (IEC 60134).
Symbol
T
j
Parameter
Conditions
Min
–
Max
150
Unit
°
C
junction temperature
ambient temperature
storage temperature
T
amb
T
stg
−
65
−
65
+150
+150
°
C
°
C
[1] Device
mounted on a ceramic PCB, Al
2
O
3
, standard footprint.
[2] Device
mounted on an FR4 PCB, single-sided copper, tin-plated and standard footprint.
[3] Device
mounted on an FR4 PCB, single-sided copper, tin-plated, mounting pad for collector 1 cm
2
.
[4] Device
mounted on an FR4 PCB, single-sided copper, tin-plated, mounting pad for collector 6 cm
2
.
[5] Operated
under pulsed conditions: duty cycle
δ ≤
10 % and pulse width t
p
≤
10 ms.
006aaa270
1600
P
tot
(mW)
1200
(1)
(2)
(3)
800
400
0
(4)
−
75
−
25
25
75
125
175
(
°
C)
T
amb
(1) Ceramic
PCB, Al
2
O
3
, standard footprint
(2) FR4
PCB, mounting pad for collector 6 cm
2
(3) FR4
PCB, mounting pad for collector 1 cm
2
(4) FR4
PCB, standard footprint
Fig 1.
Power derating curves
PBSS302PD_2
© NXP B.
V
.
2
007. All rights reserved.
Product data sheet
Rev. 02 — 6 December 2007
3 of 14
PBSS302PD
NXP Semiconductors
40
V
, 4 A
P
NP low V
CEsat
(BISS) transistor
6. Thermal
characteristics
Table 6.
Thermal characteristics
Symbol Parameter
Conditions
Min
Typ
Max
350
208
167
113
50
Unit
K/W
K/W
K/W
K/W
K/W
K/W
[1]
[2]
R
th(j-a)
thermal resistance from
in free air
–
–
–
–
–
–
–
–
–
–
–
–
junction to ambient
[3]
[4]
[1][5]
R
th(j-sp)
thermal resistance from
junction to solder point
45
[1] Device
mounted on an FR4 PCB, single-sided copper, tin-plated and standard footprint.
[2] Device
mounted on an FR4 PCB, single-sided copper, tin-plated, mounting pad for collector 1 cm
2
.
[3] Device
mounted on an FR4 PCB, single-sided copper, tin-plated, mounting pad for collector 6 cm
2
.
[4] Device
mounted on a ceramic PCB, Al
2
O
3
, standard footprint.
[5] Operated
under pulsed conditions: duty cycle
δ ≤
10 % and pulse width t
p
≤
10 ms.
006aaa271
3
10
duty cycle =
Z
th(j-a)
1
(K/W)
0.75
0.5
2
0.33
10
0.2
0.1
0.05
10
0.02
0.01
1
0
−
1
10
−
5
−
4
−
3
−
2
−
1
2
3
10
10
10
10
10
1
10
10
10
t
(s)
p
FR4 PCB, standard footprint
Fig 2.
Transient thermal impedance from junction to ambient as a function of pulse duration; typical values
PBSS302PD_2
© NXP B.
V
.
2
007. All rights reserved.
Product data sheet
Rev. 02 — 6 December 2007
4 of 14
PBSS302PD
NXP Semiconductors
40
V
, 4 A
P
NP low V
CEsat
(BISS) transistor
006aaa272
3
10
Z
th(j-a)
duty cycle =
(K/W)
1
0.75
2
10
0.5
0.33
0.2
0.1
10
0.05
0.02
0.01
1
0
−
1
10
−
5
−
4
−
3
−
2
−
1
2
3
10
10
10
10
10
1
10
10
10
t
(s)
p
FR4 PCB, mounting pad for collector 1 cm
2
Fig 3.
Transient thermal impedance from junction to ambient as a function of pulse duration; typical values
006aaa273
3
10
Z
th(j-a)
(K/W)
duty cycle =
1
2
10
0.75
0.5
0.33
0.2
0.1
10
0.05
0.02
0.01
1
0
−
1
10
−
5
−
4
−
3
−
2
−
1
2
3
10
10
10
10
10
1
10
10
10
t
(s)
p
FR4 PCB, mounting pad for collector 6 cm
2
Fig 4.
Transient thermal impedance from junction to ambient as a function of pulse duration; typical values
PBSS302PD_2
© NXP B.
V
.
2
007. All rights reserved.
Product data sheet
Rev. 02 — 6 December 2007
5 of 14
PBSS302PD
NXP Semiconductors
40
V
, 4 A
P
NP low V
CEsat
(BISS) transistor
7. Characteristics
Table 7.
Characteristics
T
amb
= 25
°
C unless otherwise specified.
Symbol Parameter
Conditions
collector-bas
e
c
ut-off V
CB
=
−
30 V; I
E
= 0 A
Min
Typ
Max
−
0.1
−
50
Unit
µ
A
I
CBO
–
–
–
–
current
V
CB
=
−
30 V; I
E
= 0 A;
T
j
= 150
°
C
µ
A
I
CES
I
EBO
h
FE
collector-emitter
cut-off current
V
CE
=
−
30 V; V
BE
= 0 V
–
–
–
–
−
0.1
−
0.1
µ
A
µ
A
emitter-base cut-off
V
EB
=
−
5 V; I
C
= 0 A
current
DC current gain
V
CE
=
−
2 V; I
C
=
−
0.5 A
V
CE
=
−
2 V; I
C
=
−
1 A
V
CE
=
−
2 V; I
C
=
−
2 A
V
CE
=
−
2 V; I
C
=
−
4 A
V
CE
=
−
2 V; I
C
=
−
6 A
I
C
=
−
0.5 A; I
B
=
−
50 mA
I
C
=
−
1 A; I
B
=
−
50 mA
I
C
=
−
2 A; I
B
=
−
200 mA
I
C
=
−
4 A; I
B
=
−
400 mA
I
C
=
−
6 A; I
B
=
−
600 mA
I
C
=
−
6 A; I
B
=
−
600 mA
200
–
–
[1]
[1]
[1]
[1]
200
–
–
175
–
–
80
30
–
–
–
–
–
V
CEsat
collector-emitter
saturation voltage
−
46
−
70
−
120
−
220
−
320
55
−
60
−
110
−
180
−
300
−
450
75
mV
mV
mV
mV
mV
m
Ω
–
–
[1]
[1]
[1]
–
–
R
CEsat
V
BEsat
collector-emitter
saturation resistance
–
base-emitter
saturation voltage
I
C
=
−
0.5 A; I
B
=
−
50 mA
I
C
=
−
1 A; I
B
=
−
50 mA
I
C
=
−
1 A; I
B
=
−
100 mA
I
C
=
−
4 A; I
B
=
−
400 mA
–
–
–
–
–
−
0.8
−
0.85
V
V
V
V
V
−
0.84
−
0.9
−
0.84
−
1
[1]
[1]
−
1.0
−
0.8
−
1.1
−
1.0
V
BEon
base-emitter turn-on
V
CE
=
−
2 V; I
C
=
−
2 A
voltage
t
d
t
r
delay time
rise time
V
CC
=
−
10 V; I
C
=
−
2 A;
–
–
–
–
–
–
–
12
–
–
–
–
–
–
–
ns
I
Bon
=
−
0.1 A;
43
ns
I
Boff
= 0.1 A
t
on
t
s
turn-on time
storage time
fall time
55
ns
241
80
ns
t
f
ns
t
off
f
T
turn-off time
321
110
ns
transition frequency
V
CE
=
−
10 V;
I
C
=
−
0.1 A; f = 100 MHz
MHz
C
c
collector capacitance
V
CB
=
−
10 V;
I
E
= i
e
= 0 A; f = 1 MHz
–
50
–
pF
[1] Pulse
test: t
p
≤
300
µ
s;
δ ≤
0.02.
PBSS302PD_2
© NXP B.
V
.
2
007. All rights reserved.
Product data sheet
Rev. 02 — 6 December 2007
6 of 14
PBSS302PD
NXP Semiconductors
40
V
, 4 A
P
NP low V
CEsat
(BISS) transistor
006aaa288
006aaa282
−
12
600
(1)
I
(mA) =
−
400
B
I
h
FE
C
−
360
−
320
−
280
−
240
−
200
(A)
−
8
400
(2)
−
160
−
120
−
80
−
40
(3)
−
4
200
0
0
−
10
−
1
2
3
4
5
0
−
0.4
−
0.8
−
1.2
−
1.6
−
2.0
(V)
−
1
−
10
−
10
−
10
−
10
−
10
(mA)
V
I
CE
C
V
CE
=
−
2 V
T
amb
= 25
°
C
(1) T
amb
= 100
°
C
(2) T
amb
= 25
°
C
(3) T
amb
=
−
55
°
C
Fig 5.
DC current gain as a function of collector
current; typical values
Fig 6.
Collector current as a function of
collector-emitter voltage; typical values
006aaa287
006aaa283
−
1.3
−
1.6
V
BE
V
BEsat
(V)
(V)
−
1.2
−
0.9
−
0.5
−
0.1
(1)
(2)
(3)
−
0.8
−
0.4
0
−
1
2
3
4
5
−
1
2
3
4
5
−
10
−
1
−
10
−
10
−
10
−
10
−
10
(mA)
−
10
−
1
−
10
−
10
−
10
−
10
−
10
(mA)
I
I
C
C
V
CE
=
−
2 V; T
amb
= 25
°
C
I
C
/I
B
= 20
(1) T
amb
=
−
55
°
C
(2) T
amb
= 25
°
C
(3) T
amb
= 100
°
C
Fig 7.
Base-emitter voltage as a function of collector
current; typical values
Fig 8.
Base-emitter saturation voltage as a function of
collector current; typical values
PBSS302PD_2
© NXP B.
V
.
2
007. All rights reserved.
Product data sheet
Rev. 02 — 6 December 2007
7 of 14
PBSS302PD
NXP Semiconductors
40
V
, 4 A
P
NP low V
CEsat
(BISS) transistor
006aaa284
006aaa285
−
1
−
1
V
V
CEsat
(V)
CEsat
(V)
(1)
(2)
(3)
−
1
−
1
−
10
−
10
−
10
−
10
−
10
−
10
(1)
(2)
−
2
−
2
(3)
−
3
−
3
−
1
2
3
4
−
1
2
3
4
5
−
10
−
1
−
10
−
10
−
10
−
10
(mA)
−
10
−
1
−
10
−
10
−
10
−
10
−
10
(mA)
I
I
C
C
I
C
/I
B
= 20
T
amb
= 25
°
C
(1) T
amb
= 100
°
C
(2) T
amb
= 25
°
C
(3) T
amb
=
−
55
°
C
(1) I
C
/I
B
= 100
(2) I
C
/I
B
= 50
(3) I
C
/I
B
= 10
Fig 9.
Collector-emitter saturation voltage as a
function of collector current; typical values
Fig 10. Collector-emitter saturation voltage as a
function of collector current; typical values
006aaa289
006aaa327
2
3
10
10
R
CEsat
R
CEsat
(
Ω
)
(
Ω
)
2
10
(1)
10
(2)
(3)
10
1
1
(1)
(2)
(3)
−
1
10
−
1
10
−
2
−
2
10
10
−
1
2
3
4
−
1
2
3
4
−
10
−
1
−
10
−
10
−
10
−
10
(mA)
−
10
−
1
−
10
−
10
−
10
−
10
(A)
I
I
C
C
I
C
/I
B
= 20
T
amb
= 25
°
C
(1) T
amb
= 100
°
C
(2) T
amb
= 25
°
C
(3) T
amb
=
−
55
°
C
(1) I
C
/I
B
= 100
(2) I
C
/I
B
= 50
(3) I
C
/I
B
= 10
Fig 11. Collector-emitter saturation resistance as a
function of collector current; typical values
Fig 12. Collector-emitter saturation resistance as a
function of collector current; typical values
PBSS302PD_2
© NXP B.
V
.
2
007. All rights reserved.
Product data sheet
Rev. 02 — 6 December 2007
8 of 14
PBSS302PD
NXP Semiconductors
40
V
, 4 A
P
NP low V
CEsat
(BISS) transistor
8. Test
information
−
I
B
input pulse
90 %
(idealized waveform)
−
I
(100 %)
Bon
10 %
−
I
Boff
output pulse
−
(idealized waveform)
I
C
90 %
−
I
(100 %)
C
10 %
t
t
t
f
t
t
r
s
d
006aaa266
t
t
off
on
Fig 13. BISS transistor switching time definition
V
V
CC
BB
R
B
R
C
V
o
(probe)
(probe)
oscilloscope
oscilloscope
450
Ω
450
Ω
R2
V
I
DUT
R1
mgd624
V
CC
=
−
10 V; I
C
=
−
2 A; I
Bon
=
−
0.1 A; I
Boff
= 0.1 A
Fig 14. Test circuit for switching times
PBSS302PD_2
© NXP B.
V
.
2
007. All rights reserved.
Product data sheet
Rev. 02 — 6 December 2007
9 of 14
PBSS302PD
NXP Semiconductors
40
V
, 4 A
P
NP low V
CEsat
(BISS) transistor
9. Package
outline
3.1
2.7
1.1
0.9
6
5
4
0.6
0.2
3.0 1.7
2.5 1.3
pin 1 index
1
2
3
0.26
0.10
0.40
0.25
0.95
1.9
Dimensions in mm
04-11-08
Fig 15. Package outline SOT457 (SC-74)
10. Packing information
Table 8.
Packing methods
The indicated -xxx are the last three digits of the 12NC ordering code.
[1]
Type number
Package
Description
Packing quantity
3000
10000
-135
[2]
[3]
PBSS302PD SOT457
4 mm pitch, 8 mm tape and reel; T1
4 mm pitch, 8 mm tape and reel; T2
-115
-125
-165
[1] For
further information and the availability of packing methods, see
Section 14
.
[2] T1:
normal taping
[3] T2:
reverse taping
PBSS302PD_2
© NXP B.
V
.
2
007. All rights reserved.
Product data sheet
Rev. 02 — 6 December 2007
10 of 14
PBSS302PD
NXP Semiconductors
40
V
, 4 A
P
NP low V
CEsat
(BISS) transistor
11. Soldering
3.45
1.95
solder lands
0.95
solder resist
0.45 0.55
2.825
3.30
occupied area
solder paste
1.60
1.70
3.10
3.20
msc422
Dimensions in mm
Fig 16. Reflow soldering footprint SOT457 (SC-74)
5.30
solder lands
solder resist
occupied area
5.05
0.45 1.45 4.45
msc423
1.40
4.30
Dimensions in mm
Fig 17. Wave soldering footprint SOT457 (SC-74)
PBSS302PD_2
© NXP B.
V
.
2
007. All rights reserved.
Product data sheet
Rev. 02 — 6 December 2007
11 of 14
PBSS302PD
NXP Semiconductors
40
V
, 4 A
P
NP low V
CEsat
(BISS) transistor
12. Revision history
Table 9.
Revision history
Document ID
PBSS302PD_2
Modifications:
Release date
Data sheet status
Change notice
Supersedes
20071206
Product data sheet
–
PBSS302PD_1
•
The format of this data sheet has been redesigned to comply with the new identity
guidelines of NXP Semiconductors.
•
Legal texts have been adapted to the new company name where appropriate.
•
Section 1.1 “General description”
: amended
•
Section 1.4 “Quick reference data”
: I
CM
conditions amended
•
Figure 2
,
3
,
4
and
6
: amended
•
T
a
ble 5
: I
CM
conditions amended
•
T
a
ble 5
: I
BM
conditions amended
•
T
a
ble 6
: typing error for maximum value on 6 cm
2
footprint amended
•
Section 11 “Soldering”
: added
•
Section 13 “Legal information”
: updated
PBSS302PD_1
20050418
Product data sheet
–
–
PBSS302PD_2
© NXP B.
V
.
2
007. All rights reserved.
Product data sheet
Rev. 02 — 6 December 2007
12 of 14
PBSS302PD
NXP Semiconductors
40
V
, 4 A
P
NP low V
CEsat
(BISS) transistor
13. Legal information
13.1 Data
sheet status
Document status
[1][2]
Product status
[3]
Development
Definition
Objective [short] data sheet
This document contains data from the objective specification for product development.
This document contains data from the preliminary specification.
This document contains the product specification.
Preliminary [short] data sheet
Qualification
Product [short] data sheet
Production
[1]
[2]
[3]
Please consult the most recently issued document before initiating or completing a design.
The term ‘short data sheet’ is explained in section “Definitions”.
The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status
malfunction of an NXP Semiconductors product can reasonably be expected
13.2 Definitions
to result in personal injur
y
,
d
eath or severe property or environmental
damage. NXP Semiconductors accepts no liability for inclusion and/or use of
NXP Semiconductors products in such equipment or applications and
therefore such inclusion and/or use is at the customer’s own risk.
Draft —
The document is a draft version onl
y
.
T
he content is still under
internal review and subject to formal approval, which may result in
modifications or additions. NXP Semiconductors does not give any
representations or warranties as to the accuracy or completeness of
information included herein and shall have no liability for the consequences of
use of such information.
Applications —
Applications that are described herein for any of these
products are for illustrative purposes onl
y
.
N
XP Semiconductors makes no
representation or warranty that such applications will be suitable for the
specified use without further testing or modification.
Short data sheet —
A short data sheet is an extract from a full data sheet
with the same product type number(s) and title. A short data sheet is intended
for quick reference only and should not be relied upon to contain detailed and
full information. For detailed and full information see the relevant full data
sheet, which is available on request via the local NXP Semiconductors sales
office. In case of any inconsistency or conflict with the short data sheet, the
full data sheet shall prevail.
Limiting values —
Stress above one or more limiting values (as defined in
the Absolute Maximum Ratings System of IEC 60134) may cause permanent
damage to the device. Limiting values are stress ratings only and operation of
the device at these or any other conditions above those given in the
Characteristics sections of this document is not implied. Exposure to limiting
values for extended periods may affect device reliabilit
y
.
Terms and conditions of sale —
NXP Semiconductors products are sold
subject to the general terms and conditions of commercial sale, as published
explicitly otherwise agreed to in writing by NXP Semiconductors. In case of
any inconsistency or conflict between information in this document and such
terms and conditions, the latter will prevail.
13.3 Disclaimers
General —
Information in this document is believed to be accurate and
reliable. However, NXP Semiconductors does not give any representations or
warranties, expressed or implied, as to the accuracy or completeness of such
information and shall have no liability for the consequences of use of such
information.
No offer to sell or license —
Nothing in this document may be interpreted
or construed as an offer to sell products that is open for acceptance or the
grant, conveyance or implication of any license under any copyrights, patents
or other industrial or intellectual property rights.
Right to make changes —
NXP Semiconductors reserves the right to make
changes to information published in this document, including without
limitation specifications and product descriptions, at any time and without
notice. This document supersedes and replaces all information supplied prior
to the publication hereof.
13.4 Trademarks
Notice: All referenced brands, product names, service names and trademarks
are the property of their respective owners.
Suitability for use —
NXP Semiconductors products are not designed,
authorized or warranted to be suitable for use in medical, militar
y
,
a
ircraft,
space or life support equipment, nor in applications where failure or
14. Contact information
PBSS302PD_2
© NXP B.
V
.
2
007. All rights reserved.
Product data sheet
Rev. 02 — 6 December 2007
13 of 14
PBSS302PD
NXP Semiconductors
40
V
, 4 A
P
NP low V
CEsat
(BISS) transistor
15. Contents
1
Product profile . . . . . . . . . . . . . . . . . . . . . . . . . .
1
1.1
1.2
1.3
1.4
General description. . . . . . . . . . . . . . . . . . . . . .
1
Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
1
Applications .
. . . . . . . . . . . . . . . . . . . . . . . . . .
1
Quick reference data. . . . . . . . . . . . . . . . . . . . .
1
2
Pinning informatio
n
. . . . . . . . . . . . . . . . . . . . . .
2
Ordering informatio
n
. . . . . . . . . . . . . . . . . . . . .
2
Marking . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2
Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . .
2
Thermal characteristics. . . . . . . . . . . . . . . . . . .
4
Characteristic
s
. . . . . . . . . . . . . . . . . . . . . . . . . .
6
Test informatio
n
. . . . . . . . . . . . . . . . . . . . . . . . .
9
Package outline . . . . . . . . . . . . . . . . . . . . . . . .
10
Packing information. . . . . . . . . . . . . . . . . . . . .
10
Soldering .
. . . . . . . . . . . . . . . . . . . . . . . . . . . .
11
Revision histor
y
. . . . . . . . . . . . . . . . . . . . . . . .
1
2
3
4
5
6
7
8
9
10
11
12
13
Legal information. . . . . . . . . . . . . . . . . . . . . . .
13
Data sheet status . . . . . . . . . . . . . . . . . . . . . .
13
Definition
s
. . . . . . . . . . . . . . . . . . . . . . . . . . . .
1
3
Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . .
13
T
r
ademark
s
. . . . . . . . . . . . . . . . . . . . . . . . . . .
1
3
13.1
13.2
13.3
13.4
14
15
Contact informatio
n
. . . . . . . . . . . . . . . . . . . . .
13
Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
14
Please be aware that important notices concerning this document and the product(s)
described herein, have been included in section ‘Legal information’.
© NXP B.
V
.
2
007.
All rights reserved.
For sales office addresses, please send an email to: salesaddresses@nxp.com
Date of release: 6 December 2007
Document identifier: PBSS302PD_2
