Nexperia-PBSS4032SPN-115
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PBSS4032SPN
30 V NPN/PNP low V
CEsat
(BISS) transistor
Rev. 2 — 14 October 2010
Product data sheet
1. Product
profile
1.1 General
description
NPN/PNP low V
CEsat
Breakthrough In Small Signal (BISS) transistor in a SOT96-1 (SO8)
medium power Surface-Mounted Device (SMD) plastic package.
Table 1.
Product overview
Type number
Package
N
experia
SOT96-1
NPN/NPN
complement
PNP/PNP
complement
Name
SO8
PBSS4032SN
PBSS4032SP
PBSS4032SPN
1.2 Features
and benefits
Low collector-emitter saturation voltage V
CEsat
Optimized switching time
High collector current capability I
C
and I
CM
High collector current gain (h
FE
) at high I
C
High efficiency due to less heat generation
Smaller required Printed-Circuit Board (PCB) area than for conventional transistors
1.3 Applications
DC-to-DC conversion
Battery-driven devices
Power management
Charging circuits
1.4 Quick
reference data
Table 2.
Quick reference data
Symbol Parameter
Conditions
Min
Typ
Max Unit
TR1; NPN low V
CEsat
transistor
V
CEO
I
C
collector-emitter voltage
collector current
open base
–
–
–
–
–
30
5.7
10
V
A
A
–
I
CM
peak collector current
single pulse; t
p
≤
1 ms
–
[1]
R
CEsat
collector-emitter
saturation resistance
I
C
= 4 A; I
B
= 0.4 A
45
62.5 m
Ω
PBSS4032SPN
Nexperia
30 V NPN/PNP low V
CEsat
(BISS) transistor
Table 2.
Quick reference data
…continued
Symbol Parameter
Conditions
Min
Typ
Max Unit
TR2; PNP low V
CEsat
transistor
V
CEO
I
C
collector-emitter voltage
collector current
open base
–
–
–
–
–
−
30
−
4.8
−
10
98
V
–
A
I
CM
peak collector current
single pulse; t
p
≤
1 ms
I
C
=
−
4 A; I
B
=
−
0.4 A
–
A
[1]
R
CEsat
collector-emitter
saturation resistance
65
m
Ω
[1] Pulse
test: t
p
≤
300
μ
s;
δ ≤
0.02.
2. Pinning
information
Table 3.
Pinning
Pin
1
Description
emitter TR1
base TR1
Simplified outline
Graphic symbol
8
7
6
5
8
5
2
3
emitter TR2
base TR2
TR1
1
TR2
3
4
5
collector TR2
collector TR2
collector TR1
collector TR1
1
4
2
4
006aaa985
6
7
8
3. Ordering
information
Table 4.
Ordering information
Type number
Package
Name
Description
Version
PBSS4032SPN SO8
plastic small outline package; 8 leads; body width 3.9 mm
SOT96-1
4. Marking
Table 5.
Marking codes
Type number
PBSS4032SPN
Marking code
4032SPN
PBSS4032SPN
All information provided in this document is subject to legal disclaimers.
©
Nexperia B.V. 2017. All rights reserved
Product data sheet
Rev. 2 — 14 October 2010
2 of 20
PBSS4032SPN
Nexperia
30 V NPN/PNP low V
CEsat
(BISS) transistor
5. Limiting
values
Table 6.
Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).
Symbol
TR1 (NPN)
I
C
Parameter
Conditions
Min
Max
5.7
Unit
A
collector current
collector current
–
–
TR2 (PNP)
I
C
−
4.8
A
Per transistor; for the PNP transistor with negative polarity
V
CBO
V
CEO
V
EBO
I
CM
collector-base voltage
collector-emitter voltage
emitter-base voltage
peak collector current
base current
open emitter
–
–
–
–
–
–
–
–
30
30
5
V
open base
V
open collector
single pulse; t
p
≤
1 ms
V
10
1
A
I
B
A
[1]
[2]
[3]
P
tot
total power dissipation
T
amb
≤
25
°
C
0.73
1
W
W
W
1.7
Per device
[1]
[2]
[3]
P
tot
total power dissipation
T
amb
≤
25
°
C
–
0.86
1.4
W
W
W
°
C
°
C
°
C
–
–
2.3
T
j
junction temperature
ambient temperature
storage temperature
–
150
+150
+150
T
amb
T
stg
−
55
−
65
[1] Device
mounted on an FR4 PCB, single-sided copper, tin-plated and standard footprint.
[2] Device
mounted on an FR4 PCB, single-sided copper, tin-plated, mounting pad for collector 1 cm
2
.
[3] Device
mounted on a ceramic PCB, Al
2
O
3
, standard footprint.
PBSS4032SPN
All information provided in this document is subject to legal disclaimers.
©
Nexperia B.V. 2017. All rights reserved
Product data sheet
Rev. 2 — 14 October 2010
3 of 20
PBSS4032SPN
Nexperia
30 V NPN/PNP low V
CEsat
(BISS) transistor
006aac302
3.0
P
(W)
tot
(1)
2.0
(2)
(3)
1.0
0.0
−
75
−
25
25
75
125
175
(
°
C)
T
amb
(1) Ceramic
PCB, Al
2
O
3
, standard footprint
(2) FR4
PCB, mounting pad for collector 1 cm
2
(3) FR4
PCB, standard footprint
Fig 1.
Per device: Power derating curves
6. Thermal
characteristics
Table 7.
Thermal characteristics
Symbol Parameter
Per transistor
Conditions
Min
Typ
Max
Unit
[1]
R
th(j-a)
thermal resistance from
junction to ambient
in free air
–
–
–
–
–
–
–
–
170
125
75
K/W
K/W
K/W
K/W
[2]
[3]
R
th(j-sp)
thermal resistance from
junction to solder point
40
Per device
[1]
[2]
[3]
R
th(j-a)
thermal resistance from
junction to ambient
in free air
–
–
–
–
–
–
145
90
K/W
K/W
K/W
55
[1] Device
mounted on an FR4 PCB, single-sided copper, tin-plated and standard footprint.
[2] Device
mounted on an FR4 PCB, single-sided copper, tin-plated, mounting pad for collector 1 cm
2
.
[3] Device
mounted on a ceramic PCB, Al
2
O
3
, standard footprint.
PBSS4032SPN
All information provided in this document is subject to legal disclaimers.
©
Nexperia B.V. 2017. All rights reserved
Product data sheet
Rev. 2 — 14 October 2010
4 of 20
PBSS4032SPN
Nexperia
30 V NPN/PNP low V
CEsat
(BISS) transistor
006aac303
3
10
Z
th(j-a)
(K/W)
duty cycle = 1
0.75
0.5
0.33
2
10
0.2
0.1
10
0.05
0.02
0.01
1
0
−
1
10
10
−
5
−
4
−
3
−
2
−
1
2
3
10
10
10
10
1
10
10
10
t
p
(s)
FR4 PCB, standard footprint
Fig 2.
Per transistor: Transient thermal impedance from junction to ambient as a function of pulse duration;
typical values
006aac304
3
10
Z
th(j-a)
(K/W)
duty cycle = 1
2
10
0.75
0.5
0.33
0.2
0.1
10
0.05
0.02
0.01
1
0
−
1
10
10
−
5
−
4
−
3
−
2
−
1
2
3
10
10
10
10
1
10
10
10
t
p
(s)
FR4 PCB, mounting pad for collector 1 cm
2
Fig 3.
Per transistor: Transient thermal impedance from junction to ambient as a function of pulse duration;
typical values
PBSS4032SPN
All information provided in this document is subject to legal disclaimers.
©
Nexperia B.V. 2017. All rights reserved
Product data sheet
Rev. 2 — 14 October 2010
5 of 20
PBSS4032SPN
Nexperia
30 V NPN/PNP low V
CEsat
(BISS) transistor
006aac305
2
10
duty cycle = 1
0.75
0.5
0.33
Z
th(j-a)
(K/W)
0.2
10
0.1
0.05
0.02
0.01
1
0
−
1
10
10
−
5
−
4
−
3
−
2
−
1
2
3
10
10
10
10
1
10
10
10
t
p
(s)
Ceramic PCB, Al
2
O
3
, standard footprint
Fig 4.
Per transistor: Transient thermal impedance from junction to ambient as a function of pulse duration;
typical values
PBSS4032SPN
All information provided in this document is subject to legal disclaimers.
©
Nexperia B.V. 2017. All rights reserved
Product data sheet
Rev. 2 — 14 October 2010
6 of 20
PBSS4032SPN
Nexperia
30 V NPN/PNP low V
CEsat
(BISS) transistor
7. Characteristics
Table 8.
Characteristics
T
amb
= 25
°
C unless otherwise specified.
Symbol Parameter
Conditions
Min
Typ
Max
Unit
TR1; NPN low V
CEsat
transistor
I
CBO
collector-base
cut-off current
V
CB
= 30 V; I
E
= 0 A
–
–
–
–
100
50
nA
V
CB
= 30 V; I
E
= 0 A;
T
j
= 150
°
C
μ
A
I
CES
I
EBO
h
FE
collector-emitter
cut-off current
V
CE
= 24 V; V
BE
= 0 V
–
–
–
–
100
100
nA
nA
emitter-base
cut-off current
V
EB
= 5 V; I
C
= 0 A
[1]
DC current gain
V
CE
= 2 V
I
C
= 500 mA
I
C
= 1 A
300
300
250
200
150
500
500
450
400
300
–
–
–
–
–
I
C
= 2 A
I
C
= 4 A
I
C
= 6 A
[1]
V
CEsat
collector-emitter
saturation voltage
I
C
= 1 A; I
B
= 50 mA
I
C
= 1 A; I
B
= 10 mA
I
C
= 2 A; I
B
= 40 mA
I
C
= 4 A; I
B
= 400 mA
I
C
= 4 A; I
B
= 40 mA
I
C
= 6 A; I
B
= 300 mA
I
C
= 4 A; I
B
= 400 mA
–
–
–
–
–
–
–
90
125
180
210
250
375
450
62.5
mV
mV
mV
mV
mV
mV
m
Ω
130
150
185
250
300
45
[1]
[1]
R
CEsat
V
BEsat
collector-emitter
saturation resistance
base-emitter
saturation voltage
I
C
= 1 A; I
B
= 100 mA
I
C
= 4 A; I
B
= 400 mA
V
CE
= 2 V; I
C
= 2 A
–
–
–
0.76
0.91
0.77
0.9
V
V
V
1.05
0.85
[1]
V
BEon
base-emitter
turn-on voltage
t
d
t
r
delay time
rise time
V
CC
= 12.5 V; I
C
= 1 A;
I
Bon
= 0.05 A; I
Boff
=
−
0.05 A
–
–
–
–
–
–
–
35
–
–
–
–
–
–
–
ns
30
ns
t
on
t
s
turn-on time
storage time
fall time
65
ns
150
65
ns
t
f
ns
t
off
f
T
turn-off time
215
140
ns
transition frequency
V
CE
= 10 V; I
C
= 100 mA;
f = 100 MHz
MHz
C
c
collector capacitance
V
CB
= 10 V; I
E
= i
e
= 0 A;
f = 1 MHz
–
65
–
pF
PBSS4032SPN
All information provided in this document is subject to legal disclaimers.
©
Nexperia B.V. 2017. All rights reserved
Product data sheet
Rev. 2 — 14 October 2010
7 of 20
PBSS4032SPN
Nexperia
30 V NPN/PNP low V
CEsat
(BISS) transistor
Table 8.
Characteristics
…continued
T
amb
= 25
°
C unless otherwise specified.
Symbol Parameter
Conditions
Min
Typ
Max
Unit
TR2; PNP low V
CEsat
transistor
I
CBO
collector-base
cut-off current
V
CB
=
−
30 V; I
E
= 0 A
–
–
–
–
−
100
−
50
nA
V
CB
=
−
30 V; I
E
= 0 A;
T
j
= 150
°
C
μ
A
I
CES
I
EBO
h
FE
collector-emitter
cut-off current
V
CE
=
−
24 V; V
BE
= 0 V
–
–
–
–
−
100
−
100
nA
nA
emitter-base
cut-off current
V
EB
=
−
5 V; I
C
= 0 A
[1]
DC current gain
V
CE
=
−
2 V
I
C
=
−
500 mA
I
C
=
−
1 A
200
200
150
60
380
330
250
100
60
–
–
–
–
–
I
C
=
−
2 A
I
C
=
−
4 A
I
C
=
−
5 A
40
[1]
V
CEsat
collector-emitter
saturation voltage
I
C
=
−
1 A; I
B
=
−
50 mA
I
C
=
−
1 A; I
B
=
−
10 mA
I
C
=
−
2 A; I
B
=
−
40 mA
I
C
=
−
4 A; I
B
=
−
400 mA
I
C
=
−
4 A; I
B
=
−
200 mA
I
C
=
−
5 A; I
B
=
−
250 mA
I
C
=
−
4 A; I
B
=
−
400 mA
–
–
–
–
–
–
–
−
115
−
170
−
210
−
260
−
300
−
340
65
−
165
−
240
−
300
−
390
−
450
−
510
98
mV
mV
mV
mV
mV
mV
m
Ω
[1]
[1]
R
CEsat
V
BEsat
collector-emitter
saturation resistance
base-emitter
saturation voltage
I
C
=
−
1 A; I
B
=
−
100 mA
I
C
=
−
4 A; I
B
=
−
400 mA
V
CE
=
−
2 V; I
C
=
−
2 A
–
–
–
−
0.8
−
0.9
V
V
V
−
0.99
−
1.1
−
0.81
−
0.9
[1]
V
BEon
base-emitter
turn-on voltage
t
d
t
r
delay time
rise time
V
CC
=
−
12.5 V; I
C
=
−
1 A;
–
–
–
–
–
–
–
30
–
–
–
–
–
–
–
ns
I
Bon
=
−
0.05 A; I
Boff
= 0.05 A
60
ns
t
on
t
s
turn-on time
storage time
fall time
90
ns
140
80
ns
t
f
ns
t
off
f
T
turn-off time
220
115
ns
transition frequency
V
CE
=
−
10 V; I
C
=
−
100 mA;
MHz
f = 100 MHz
C
c
collector capacitance
V
CB
=
−
10 V; I
E
= i
e
= 0 A;
–
85
–
pF
f = 1 MHz
[1] Pulse
test: t
p
≤
300
μ
s;
δ ≤
0.02.
PBSS4032SPN
All information provided in this document is subject to legal disclaimers.
©
Nexperia B.V. 2017. All rights reserved
Product data sheet
Rev. 2 — 14 October 2010
8 of 20
PBSS4032SPN
Nexperia
30 V NPN/PNP low V
CEsat
(BISS) transistor
006aac306
006aac307
1000
12.0
h
FE
I
(mA) = 70
B
I
C
63
49
(1)
(2)
(A)
56
42
800
35
21
8.0
28
14
600
400
200
0
(3)
4.0
7
0.0
0.0
−
1
2
3
4
10
1
10
10
10
10
(mA)
1.0
2.0
3.0
4.0
5.0
(V)
I
V
CE
C
V
CE
= 2 V
T
amb
= 25
°
C
(1) T
amb
= 100
°
C
(2) T
amb
= 25
°
C
(3)
T
amb
=
−
55
°
C
Fig 5.
TR1 (NPN): DC current gain as a function of
collector current; typical values
Fig 6.
TR1 (NPN): Collector current as a function of
collector-emitter voltage; typical values
006aac308
006aac309
1.2
1.2
V
BEsat
(V)
V
BE
(V)
1.0
0.8
0.6
0.4
0.2
(1)
(2)
(3)
0.8
(1)
(2)
(3)
0.4
0.0
−
1
2
3
4
−
1
2
3
4
10
1
10
10
10
10
(mA)
10
1
10
10
10
10
I (mA)
C
I
C
V
CE
= 2 V
amb
=
−
55
°
C
I
C
/I
B
= 20
(1) T
amb
=
−
55
°
C
(1)
T
(2) T
amb
= 25
°
C
(3) T
amb
= 100
°
C
(2) T
amb
= 25
°
C
(3) T
amb
= 100
°
C
Fig 7.
TR1 (NPN): Base-emitter voltage as a function
of collector current; typical values
Fig 8.
TR1 (NPN): Base-emitter saturation voltage as
a function of collector current; typical values
PBSS4032SPN
All information provided in this document is subject to legal disclaimers.
©
Nexperia B.V. 2017. All rights reserved
Product data sheet
Rev. 2 — 14 October 2010
9 of 20
PBSS4032SPN
Nexperia
30 V NPN/PNP low V
CEsat
(BISS) transistor
006aac310
006aac311
1
1
V
V
CEsat
(V)
CEsat
(V)
(1)
(2)
−
1
−
1
10
10
(1)
(2)
(3)
(3)
−
2
10
−
2
10
10
10
−
1
2
3
4
−
1
2
3
4
1
10
10
10
10
(mA)
1
10
10
10
10
I (mA)
C
I
C
I
C
/I
B
= 20
(1) T
amb
= 100
°
C
(2)
amb
= 25
°
C
(3) T
amb
=
−
55
°
C
T
amb
= 25
°
C
(1) I
C
/I
B
= 100
(2) I
C
/I
B
= 50
(3) I
C
/I
B
= 10
T
Fig 9.
TR1 (NPN): Collector-emitter saturation
voltage as a function of collector current;
typical values
Fig 10.
TR1 (NPN): Collector-emitter saturation
voltage as a function of collector current;
typical values
006aac312
006aac313
3
3
10
10
R
CEsat
R
CEsat
(
Ω
)
(
Ω
)
2
2
10
10
10
10
1
1
(1)
(2)
(1)
(2)
−
1
−
1
10
10
(3)
3
(3)
−
2
10
−
2
10
10
10
−
1
2
4
−
1
2
3
4
1
10
10
10
10
(mA)
1
10
10
10
10
I (mA)
C
I
C
I
C
/I
B
= 20
amb
= 100
°
C
T
amb
= 25
°
C
(1)
T
(1) I
C
/I
B
= 100
(2) I
C
/I
B
= 50
(3) I
C
/I
B
= 10
(2) T
amb
= 25
°
C
(3) T
amb
=
−
55
°
C
Fig 11.
TR1 (NPN): Collector-emitter saturation
resistance as a function of collector current;
typical values
Fig 12.
TR1 (NPN): Collector-emitter saturation
resistance as a function of collector current;
typical values
PBSS4032SPN
All information provided in this document is subject to legal disclaimers.
©
Nexperia B.V. 2017. All rights reserved
Product data sheet
Rev. 2 — 14 October 2010
10 of 20
PBSS4032SPN
Nexperia
30 V NPN/PNP low V
CEsat
(BISS) transistor
006aac314
006aac315
800
−
12.0
h
FE
I
B
(mA) =
−
600
I
C
(1)
(2)
−
540
−
420
(A)
−
480
−
360
600
−
300
−
8.0
−
240
−
180
−
120
400
200
0
−
60
−
4.0
(3)
0.0
0.0
−
1
2
3
4
−
10
−
1
−
10
−
10
−
10
−
10
(mA)
−
1.0
−
2.0
−
3.0
−
4.0
−
5.0
(V)
I
V
CE
C
V
CE
=
−
2 V
T
amb
= 25
°
C
(1) T
amb
= 100
°
C
(2) T
amb
= 25
°
C
(3)
T
amb
=
−
55
°
C
Fig 13.
TR2 (PNP): DC current gain as a function of
collector current; typical values
Fig 14.
TR2 (PNP): Collector current as a function of
collector-emitter voltage; typical values
006aac316
006aac317
−
1.4
−
1.4
V
(V)
V
BEsat
(V)
BE
−
1.0
−
1.0
−
0.6
(1)
(2)
(3)
(1)
(2)
(3)
−
0.6
−
0.2
−
0.2
−
1
2
3
4
−
1
2
3
4
−
10
−
1
−
10
−
10
−
10
−
10
(mA)
−
10
−
1
−
10
−
10
−
10
−
10
I (mA)
C
I
C
V
CE
=
−
2 V
amb
=
−
55
°
C
I
C
/I
B
= 20
(1) T
amb
=
−
55
°
C
(1)
T
(2) T
amb
= 25
°
C
(3) T
amb
= 100
°
C
(2) T
amb
= 25
°
C
(3) T
amb
= 100
°
C
Fig 15.
TR2 (PNP): Base-emitter voltage as a function
of collector current; typical values
Fig 16.
TR2 (PNP): Base-emitter saturation voltage as
a function of collector current; typical values
PBSS4032SPN
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Nexperia B.V. 2017. All rights reserved
Product data sheet
Rev. 2 — 14 October 2010
11 of 20
PBSS4032SPN
Nexperia
30 V NPN/PNP low V
CEsat
(BISS) transistor
006aac318
006aac319
−
1
−
1
V
V
CEsat
(V)
CEsat
(V)
(1)
(2)
−
1
−
1
−
10
−
10
(1)
(2)
(3)
(3)
−
2
−
10
−
2
−
10
−
10
−
10
−
1
2
3
4
−
1
2
3
4
−
1
−
10
−
10
−
10
−
10
(mA)
−
1
−
10
−
10
−
10
−
10
I (mA)
C
I
C
I
C
/I
B
= 20
(1) T
amb
= 100
°
C
(2)
amb
= 25
°
C
(3) T
amb
=
−
55
°
C
T
amb
= 25
°
C
(1) I
C
/I
B
= 100
(2) I
C
/I
B
= 50
(3) I
C
/I
B
= 10
T
Fig 17.
TR2 (PNP): Collector-emitter saturation
voltage as a function of collector current;
typical values
Fig 18.
TR2 (PNP): Collector-emitter saturation
voltage as a function of collector current;
typical values
006aac320
006aac321
3
3
10
10
R
CEsat
R
CEsat
(
Ω
)
(
Ω
)
2
2
10
10
10
10
1
(1)
(2)
1
(1)
(2)
−
1
−
1
10
10
(3)
(3)
3
−
2
−
10
−
2
−
10
10
10
−
1
2
3
4
−
1
2
4
−
1
−
10
−
10
−
10
−
10
(mA)
−
1
−
10
−
10
−
10
−
10
(mA)
I
I
C
C
I
C
/I
B
= 20
amb
= 100
°
C
T
amb
= 25
°
C
(1)
T
(1) I
C
/I
B
= 100
(2) I
C
/I
B
= 50
(3) I
C
/I
B
= 10
(2) T
amb
= 25
°
C
(3) T
amb
=
−
55
°
C
Fig 19.
TR2 (PNP): Collector-emitter saturation
resistance as a function of collector current;
typical values
Fig 20.
TR2 (PNP): Collector-emitter saturation
resistance as a function of collector current;
typical values
PBSS4032SPN
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Nexperia B.V. 2017. All rights reserved
Product data sheet
Rev. 2 — 14 October 2010
12 of 20
PBSS4032SPN
Nexperia
30 V NPN/PNP low V
CEsat
(BISS) transistor
8. Test
information
I
B
input pulse
90 %
(idealized waveform)
I
(100 %)
Bon
10 %
I
Boff
output pulse
(idealized waveform)
I
C
90 %
I
(100 %)
C
10 %
t
t
t
f
t
t
r
s
d
t
t
off
on
006aaa003
Fig 21.
TR1 (NPN): BISS transistor switching time definition
V
V
CC
BB
R
R
C
B
V
o
(probe)
(probe)
oscilloscope
oscilloscope
450
Ω
450
Ω
R2
V
I
DUT
R1
mlb826
V
CC
= 12.5 V; I
C
= 1 A; I
Bon
= 0.05 A; I
Boff
=
−
0.05 A
Fig 22.
TR1 (NPN): Test circuit for switching times
PBSS4032SPN
All information provided in this document is subject to legal disclaimers.
©
Nexperia B.V. 2017. All rights reserved
Product data sheet
Rev. 2 — 14 October 2010
13 of 20
PBSS4032SPN
Nexperia
30 V NPN/PNP low V
CEsat
(BISS) transistor
−
I
B
input pulse
90 %
(idealized waveform)
−
I
(100 %)
Bon
10 %
−
I
Boff
output pulse
−
(idealized waveform)
I
C
90 %
−
I
(100 %)
C
10 %
t
t
t
f
t
t
r
s
d
006aaa266
t
t
off
on
Fig 23.
TR2 (PNP): BISS transistor switching time definition
V
V
CC
BB
R
R
C
B
V
o
(probe)
(probe)
oscilloscope
oscilloscope
450
Ω
450
Ω
R2
V
I
DUT
R1
mgd624
V
CC
=
−
12.5 V; I
C
=
−
1 A; I
Bon
=
−
0.05 A; I
Boff
= 0.05 A
Fig 24.
TR2 (PNP): Test circuit for switching times
PBSS4032SPN
All information provided in this document is subject to legal disclaimers.
©
Nexperia B.V. 2017. All rights reserved
Product data sheet
Rev. 2 — 14 October 2010
14 of 20
PBSS4032SPN
Nexperia
30 V NPN/PNP low V
CEsat
(BISS) transistor
9. Package
outline
5.0
4.8
1.75
1.0
0.4
6.2 4.0
5.8 3.8
pin 1 index
0.49
0.36
0.25
0.19
1.27
Dimensions in mm
03-02-18
Fig 25.
Package outline SOT96-1 (SO8)
10. Packing information
Table 9.
Packing methods
The indicated -xxx are the last three digits of the 12NC ordering code.
[1]
Type number
Package Description
Packing quantity
1000
2500
PBSS4032SPN SOT96-1 8
mm pitch, 12 mm tape and reel
-115
-118
[1] For
further information and the availability of packing methods, see
Section 14
.
PBSS4032SPN
All information provided in this document is subject to legal disclaimers.
©
Nexperia B.V. 2017. All rights reserved
Product data sheet
Rev. 2 — 14 October 2010
15 of 20
PBSS4032SPN
Nexperia
30 V NPN/PNP low V
CEsat
(BISS) transistor
11. Soldering
5.50
0.60 (8
×
)
1.30
4.00 6.60 7.00
1.27 (6
×
)
solder lands
sot096-1_fr
placement accuracy
±
0.25
Dimensions in mm
occupied area
Fig 26.
Reflow soldering footprint SOT96-1 (SO8)
1.20 (2
×
)
enlarged solder land
0.60 (6
×
)
0.3 (2
×
)
1.30
4.00 6.60 7.00
1.27 (6
×
)
5.50
board direction
solder lands
solder resist
placement accurracy
± ±
0.25
sot096-1_fw
occupied area
Dimensions in mm
Fig 27.
Wave soldering footprint SOT96-1 (SO8)
PBSS4032SPN
All information provided in this document is subject to legal disclaimers.
©
Nexperia B.V. 2017. All rights reserved
Product data sheet
Rev. 2 — 14 October 2010
16 of 20
PBSS4032SPN
Nexperia
30 V NPN/PNP low V
CEsat
(BISS) transistor
12. Revision history
Table 10.
Revision history
Document ID
Release date
20101014
Data sheet status
Change notice
Supersedes
PBSS4032SPN v.2
Modifications:
Product data sheet
–
PBSS4032SPN v.1
•
Figure 1 “Per device: Power derating curves”
: updated.
20100714 Product
data sheet
PBSS4032SPN v.1
–
–
PBSS4032SPN
All information provided in this document is subject to legal disclaimers.
©
Nexperia B.V. 2017. All rights reserved
Product data sheet
Rev. 2 — 14 October 2010
17 of 20
PBSS4032SPN
Nexperia
30 V NPN/PNP low V
CEsat
(BISS) transistor
13. Legal information
13.1 Data
sheet status
Document status
[1][2]
Product status
[3]
Development
Definition
Objective [short] data sheet
This document contains data from the objective specification for product development.
This document contains data from the preliminary specification.
This document contains the product specification.
Preliminary [short] data sheet
Qualification
Product [short] data sheet
Production
[1]
[2]
[3]
Please consult the most recently issued document before initiating or completing a design.
The term ‘short data sheet’ is explained in section “Definitions”.
The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status
malfunction of a Nexperia product can reasonably be expected
13.2 Definitions
to result in personal injury, death or severe property or environmental
damage. Nexperia accepts no liability for inclusion and/or use of
Nexperia products in such equipment or applications and
Draft —
The document is a draft version only. The content is still under
internal review and subject to formal approval, which may result in
modifications or additions. Nexperia does not give any
therefore such inclusion and/or use is at the customer’s own risk.
Applications —
Applications that are described herein for any of these
products are for illustrative purposes only. Nexperia makes no
representation or warranty that such applications will be suitable for the
specified use without further testing or modification.
representations or warranties as to the accuracy or completeness of
information included herein and shall have no liability for the consequences of
use of such information.
Short data sheet —
A short data sheet is an extract from a full data sheet
with the same product type number(s) and title. A short data sheet is intended
for quick reference only and should not be relied upon to contain detailed and
full information. For detailed and full information see the relevant full data
sheet, which is available on request via the local Nexperia sales
office. In case of any inconsistency or conflict with the short data sheet, the
full data sheet shall prevail.
Customers are responsible for the design and operation of their applications
and products using Nexperia products, and Nexperia
accepts no liability for any assistance with applications or customer product
design. It is customer’s sole responsibility to determine whether the Nexperia
product is suitable and fit for the customer’s applications and
products planned, as well as for the planned application and use of
customer’s third party customer(s). Customers should provide appropriate
design and operating safeguards to minimize the risks associated with their
applications and products.
Product specification —
The information and data provided in a Product
data sheet shall define the specification of the product as agreed between
Nexperia and its customer, unless Nexperia and
customer have explicitly agreed otherwise in writing. In no event however,
shall an agreement be valid in which the Nexperia product is
deemed to offer functions and qualities beyond those described in the
Product data sheet.
Nexperia does not accept any liability related to any default,
damage, costs or problem which is based on any weakness or default in the
customer’s applications or products, or the application or use by customer’s
third party customer(s). Customer is responsible for doing all necessary
testing for the
customer’s applications and products using Nexperia
products in order to avoid a default of the applications and
the products or of the application or use by customer’s third party
customer(s). Nexperia does not accept any liability in this respect.
13.3 Disclaimers
Limiting values —
Stress above one or more limiting values (as defined in
the Absolute Maximum Ratings System of IEC 60134) will cause permanent
damage to the device. Limiting values are stress ratings only and (proper)
operation of the device at these or any other conditions above those given in
the Recommended operating conditions section (if present) or the
Characteristics sections of this document is not warranted. Constant or
repeated exposure to limiting values will permanently and irreversibly affect
the quality and reliability of the device.
Limited warranty and liability —
Information in this document is believed to
be accurate and reliable. However, Nexperia does not give any
representations or warranties, expressed or implied, as to the accuracy or
completeness of such information and shall have no liability for the
consequences of use of such information.
In no event shall Nexperia be liable for any indirect, incidental,
punitive, special or consequential damages (including – without limitation – lost
profits, lost savings, business interruption, costs related to the removal or
replacement of any products or rework charges) whether or not such
damages are based on tort (including negligence), warranty, breach of
contract or any other legal theory.
Terms and conditions of commercial sale —
Nexperia
products are sold subject to the general terms and conditions of commercial
agreed in a valid written individual agreement. In case an individual
agreement is concluded only the terms and conditions of the respective
agreement shall apply. Nexperia hereby expressly objects to
applying the customer’s general terms and conditions with regard to the
purchase of Nexperia products by customer.
Notwithstanding any damages that customer might incur for any reason
whatsoever,
Nexperia’s
aggregate and cumulative liability towards
customer for the products described herein shall be limited in accordance
with the
Terms and conditions of commercial sale
of Nexperia.
Right to make changes —
Nexperia reserves the right to make
changes to information published in this document, including without
limitation specifications and product descriptions, at any time and without
notice. This document supersedes and replaces all information supplied prior
to the publication hereof.
No offer to sell or license —
Nothing in this document may be interpreted or
construed as an offer to sell products that is open for acceptance or the grant,
conveyance or implication of any license under any copyrights, patents or
other industrial or intellectual property rights.
Export control —
This document as well as the item(s) described herein
may be subject to export control regulations. Export might require a prior
authorization from national authorities.
Suitability for use —
Nexperia products are not designed,
authorized or warranted to be suitable for use in life support, life-critical or
safety-critical systems or equipment, nor in applications where failure or
PBSS4032SPN
All information provided in this document is subject to legal disclaimers.
©
Nexperia B.V. 2017. All rights reserved
Product data sheet
Rev. 2 — 14 October 2010
18 of 20
PBSS4032SPN
Nexperia
30 V NPN/PNP low V
CEsat
(BISS) transistor
Quick reference data —
The Quick reference data is an extract of the
product data given in the Limiting values and Characteristics sections of this
document, and as such is not complete, exhaustive or legally binding.
13.4 Trademarks
Notice: All referenced brands, product names, service names and trademarks
are the property of their respective owners.
14. Contact information
For sales office addresses, please send an email to:
salesaddresses@
nexperia.com
PBSS4032SPN
All information provided in this document is subject to legal disclaimers.
©
Nexperia B.V. 2017. All rights reserved
Product data sheet
Rev. 2 — 14 October 2010
19 of 20
PBSS4032SPN
Nexperia
30 V NPN/PNP low V
CEsat
(BISS) transistor
15. Contents
1
Product profile . . . . . . . . . . . . . . . . . . . . . . . . . .
1
1.1
1.2
1.3
1.4
General description
. . . . . . . . . . . . . . . . . . . . .
1
Features and benefit
s
. . . . . . . . . . . . . . . . . . . .
1
Applications .
. . . . . . . . . . . . . . . . . . . . . . . . . .
1
Quick reference data
. . . . . . . . . . . . . . . . . . . .
1
2
Pinning informatio
n
. . . . . . . . . . . . . . . . . . . . . .
2
Ordering informatio
n
. . . . . . . . . . . . . . . . . . . . .
2
Markin
g
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2
Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . .
3
Thermal characteristics
. . . . . . . . . . . . . . . . . .
4
Characteristic
s
. . . . . . . . . . . . . . . . . . . . . . . . . .
7
Test informatio
n
. . . . . . . . . . . . . . . . . . . . . . . .
1
3
Package outline . . . . . . . . . . . . . . . . . . . . . . . .
15
Packing information
. . . . . . . . . . . . . . . . . . . .
15
Soldering .
. . . . . . . . . . . . . . . . . . . . . . . . . . . .
16
Revision histor
y
. . . . . . . . . . . . . . . . . . . . . . . .
1
7
3
4
5
6
7
8
9
10
11
12
13
Legal information. . . . . . . . . . . . . . . . . . . . . . .
18
Data sheet status . . . . . . . . . . . . . . . . . . . . . .
18
Definition
s
. . . . . . . . . . . . . . . . . . . . . . . . . . . .
1
8
Disclaimer
s
. . . . . . . . . . . . . . . . . . . . . . . . . . .
1
8
Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . .
19
13.1
13.2
13.3
13.4
14
15
Contact information. . . . . . . . . . . . . . . . . . . . .
19
Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
20
©
Nexperia B.V. 2017. All rights reserved
For sales office addresses, please send an email to: salesaddresses@nexperia.com
Date of release:
14 October 2010
