Nexperia-PBSS4160DPN-115
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. Nexperia is an industry leading supplier of Discrete, Logic and PowerMOS
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Should be replaced with:
–
© Nexperia B.V. (year). All rights reserved
.
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Team Nexperia
PBSS4160DPN
60
V
, 1 A
N
PN/PNP low V
CEsat
(BISS) transistor
Rev. 03 — 11 December 2009
Product data sheet
1. Product
profile
1.1 General
description
NPN/PNP low V
CEsat
Breakthrough in Small Signal (BISS) transistor pair in a SOT457
(SC-74) Surface Mounted Device (SMD) plastic package.
1.2 Features
Low collector-emitter saturation voltage V
CEsat
High collector current capability: I
C
and I
CM
High collector current gain (h
FE
) at high I
C
High efficiency due to less heat generation
Smaller required Printed-Circuit Board (PCB) area than for conventional transistors
1.3 Applications
Complementary MOSFET driver
Half and full bridge motor drivers
Dual low power switches (e.g. motors, fans)
Automotive applications
1.4 Quick
reference data
Table 1.
Quick reference data
Symbol Parameter
TR1 (NPN)
Conditions
Min
Typ
Max Unit
V
CEO
I
C
collector-emitter voltage
open base
–
–
–
–
–
60
1
V
[1]
[2]
collector current (DC)
peak collector current
–
A
I
CM
single pulse; t
p
≤
1 ms
–
2
A
R
CEsat
collector-emitter saturation
I
C
= 1 A; I
B
= 100 mA
resistance
200
250
m
Ω
TR2 (PNP)
V
CEO
I
C
collector-emitter voltage
collector current (DC)
peak collector current
open base
–
–
–
–
–
−
60
V
[1]
[2]
–
−
900 mA
I
CM
single pulse; t
p
≤
1 ms
–
−
2
A
R
CEsat
collector-emitter saturation
I
C
=
−
1 A; I
B
=
−
100 mA
250
330
m
Ω
resistance
[1] Device
mounted on an FR4 PCB, single-sided copper, tin-plated, mounting pad for collector 1 cm
2
.
[2] Pulse
test: t
p
≤
300
μ
s;
δ ≤
0.02.
PBSS4160DPN
NXP Semiconductors
60 V, 1 A NPN/PNP low V
CEsat
(BISS) transistor
2. Pinning
information
Table 2.
Pinning
Pin
1
Description
emitter TR1
base TR1
Simplified outline
Symbol
6
5
4
6
5
2
4
2
3
collector TR2
emitter TR2
base TR2
TR2
TR1
1
4
1
2
3
5
3
6
collector TR1
sym019
3. Ordering
information
Table 3.
Ordering information
Type number
Package
Name
Description
Version
PBSS4160DPN SC-74
plastic surface mounted package; 6 leads
SOT457
4. Marking
Table 4.
Marking codes
Type number
Marking code
PBSS4160DPN
B4
5. Limiting
values
Table 5.
Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).
Symbol Parameter
Conditions Min
Max
Unit
Per transistor unless otherwise specified; for the PNP transistor with negative polarity
V
CBO
V
CEO
V
EBO
I
C
collector-base voltage
collector-emitter voltage
emitter-base voltage
collector current (DC)
open emitter
open base
open collector
NPN
–
–
–
–
–
–
–
–
–
–
–
80
60
5
V
V
V
[1]
[2]
[1]
[2]
[3]
870
1
mA
A
PNP
770
900
1
mA
mA
A
both
I
CM
I
B
peak collector current
base current (DC)
peak base current
single pulse; t
p
≤
1 ms
2
A
300
1
mA
A
I
BM
single pulse; t
p
≤
1 ms
PBSS4160DPN_3
© NXP B.
V
. 2009. All rights reserved.
Product data sheet
Rev. 03 — 11 December 2009
2 of 18
PBSS4160DPN
NXP Semiconductors
60 V, 1 A NPN/PNP low V
CEsat
(BISS) transistor
Table 5.
Limiting values
…continued
In accordance with the Absolute Maximum Rating System (IEC 60134).
Symbol Parameter
Conditions
Min
Max
290
370
450
Unit
mW
mW
mW
[1]
[2]
[3]
P
tot
total power dissipation
T
amb
≤
25
°
C
–
–
–
Per device
[1]
[2]
[3]
P
tot
total power dissipation
T
amb
≤
25
°
C
–
420
mW
mW
mW
°
C
–
560
–
700
T
j
junction temperature
ambient temperature
storage temperature
–
150
T
amb
T
stg
−
65
−
65
+150
+150
°
C
°
C
[1] Device
mounted on an FR4 PCB, single-sided copper, tin-plated and standard footprint.
[2] Device
mounted on an FR4 PCB, single-sided copper, tin-plated, mounting pad for collector 1 cm
2
.
[3] Device
mounted on a ceramic PCB, Al
2
O
3
, standard footprint.
006aaa493
800
(1)
P
tot
(mW)
600
(2)
(3)
400
200
0
0
40
80
120
160
(
°
C)
T
amb
(1) Ceramic
PCB, Al
2
O
3
, standard footprint
(2) FR4
PCB, mounting pad for collector 1 cm
2
(3) FR4
PCB, standard footprint
Fig 1.
Power derating curves
PBSS4160DPN_3
© NXP B.
V
. 2009. All rights reserved.
Product data sheet
Rev. 03 — 11 December 2009
3 of 18
PBSS4160DPN
NXP Semiconductors
60 V, 1 A NPN/PNP low V
CEsat
(BISS) transistor
6. Thermal
characteristics
Table 6.
Thermal characteristics
Symbol Parameter
Conditions
Min
Typ
Max
431
338
278
105
Unit
K/W
K/W
K/W
K/W
[1]
[2]
[3]
R
th(j-a)
thermal resistance from
in free air
–
–
–
–
–
–
–
–
junction to ambient
R
th(j-sp)
thermal resistance from
junction to solder point
[1] Device
mounted on an FR4 PCB, single-sided copper, tin-plated and standard footprint.
[2] Device
mounted on an FR4 PCB, single-sided copper, tin-plated, mounting pad for collector 1 cm
2
.
[3] Device
mounted on a ceramic PCB, Al
2
O
3
, standard footprint.
006aaa494
3
10
δ
= 1
Z
th(j-a)
0.75
0.33
(K/W)
0.50
2
10
0.20
0.10
0.05
0.02
0.01
10
0
1
10
−
5
−
4
−
3
−
2
−
1
2
3
10
10
10
10
1
10
10
10
t
p
(s)
FR4 PCB, standard footprint
Fig 2.
Transient thermal impedance from junction to ambient as a function of pulse time; typical values
PBSS4160DPN_3
© NXP B.
V
. 2009. All rights reserved.
Product data sheet
Rev. 03 — 11 December 2009
4 of 18
PBSS4160DPN
NXP Semiconductors
60 V, 1 A NPN/PNP low V
CEsat
(BISS) transistor
006aaa495
3
10
Z
th(j-a)
δ
= 1
(K/W)
0.75
0.33
0.50
0.20
0.10
0.05
2
10
10
0.02
0.01
0
1
10
−
5
−
4
−
3
−
2
−
1
2
3
10
10
10
10
1
10
10
10
t
p
(s)
FR4 PCB, mounting pad for collector 1 cm
2
Fig 3.
Transient thermal impedance from junction to ambient as a function of pulse time; typical values
006aaa496
3
10
Z
th(j-a)
δ
= 1
(K/W)
0.75
0.33
0.50
0.20
0.10
0.05
2
10
10
0.02
0.01
0
1
10
−
5
−
4
−
3
−
2
−
1
2
3
10
10
10
10
1
10
10
10
t
p
(s)
Ceramic PCB, Al
2
O
3
, standard footprint
Fig 4.
Transient thermal impedance from junction to ambient as a function of pulse time; typical values
PBSS4160DPN_3
© NXP B.
V
. 2009. All rights reserved.
Product data sheet
Rev. 03 — 11 December 2009
5 of 18
PBSS4160DPN
NXP Semiconductors
60 V, 1 A NPN/PNP low V
CEsat
(BISS) transistor
7. Characteristics
Table 7.
Characteristics
T
amb
= 25
°
C unless otherwise specified.
Symbol Parameter
Per transistor unless otherwise specified; for the PNP transistor with negative polarity
Conditions
Min
Typ
Max Unit
I
CBO
collector-base cut-off
current
V
CB
= 60 V; I
E
= 0 A
–
–
–
–
100
50
nA
V
CB
= 60 V; I
E
= 0 A;
μ
A
T
j
= 150
°
C
I
CES
collector-emitter cut-off
current
V
CE
= 60 V; V
BE
= 0 V
–
–
–
100
100
nA
I
EBO
emitter-base cut-off current
V
EB
= 5 V; I
C
= 0 A
–
–
nA
V
[1]
[1]
V
BEsat
base-emitter saturation
voltage
I
C
= 1 A; I
B
= 50 mA
0.95 1.1
V
BEon
base-emitter turn-on
voltage
V
CE
= 5 V; I
C
= 1 A
–
0.82 0.9
V
TR1 (NPN)
h
FE
DC current gain
V
CE
= 5 V; I
C
= 1 mA
V
CE
= 5 V; I
C
= 500 mA
V
CE
= 5 V; I
C
= 1 A
250
200
100
–
500
420
180
90
–
[1]
[1]
–
–
V
CEsat
collector-emitter saturation
I
C
= 100 mA; I
B
= 1 mA
voltage
110
140
mV
mV
I
C
= 500 mA;
–
115
I
B
= 50 mA
[1]
[1]
I
C
= 1 A; I
B
= 100 mA
–
–
200
200
250
250
mV
R
CEsat
collector-emitter saturation
I
C
= 1 A; I
B
= 100 mA
resistance
m
Ω
t
d
t
r
delay time
I
C
= 0.5 A;
I
Bon
= 25 mA;
I
Boff
=
−
25 mA
–
11
–
–
–
–
–
–
–
ns
rise time
–
78
ns
t
on
t
s
turn-on time
storage time
fall time
–
90
ns
–
340
160
500
220
ns
t
f
–
ns
t
off
f
T
turn-off time
transition frequency
–
ns
V
CE
= 10 V;
I
C
= 50 mA;
f = 100 MHz
150
MHz
C
c
collector capacitance
DC current gain
V
CB
= 10 V;
I
E
= i
e
= 0 A; f = 1 MHz
–
5.5
10
pF
TR2 (PNP)
h
FE
V
CE
=
−
5 V; I
C
=
−
1 mA
200
150
350
250
–
–
[1]
[1]
V
CE
=
−
5 V;
I
C
=
−
500 mA
V
CE
=
−
5 V; I
C
=
−
1 A
100
160
–
PBSS4160DPN_3
© NXP B.
V
. 2009. All rights reserved.
Product data sheet
Rev. 03 — 11 December 2009
6 of 18
PBSS4160DPN
NXP Semiconductors
60 V, 1 A NPN/PNP low V
CEsat
(BISS) transistor
Table 7.
Characteristics
…continued
T
amb
= 25
°
C unless otherwise specified.
Symbol Parameter
Conditions
Min
Typ
Max Unit
V
CEsat
collector-emitter saturation
I
C
=
−
100 mA;
–
−
110
−
165 mV
−
120
−
175 mV
−
250
−
330 mV
voltage
I
B
=
−
1 mA
I
C
=
−
500 mA;
I
B
=
−
50 mA
–
[1]
[1]
I
C
=
−
1 A; I
B
=
−
100 mA
–
–
R
CEsat
collector-emitter saturation
I
C
=
−
1 A; I
B
=
−
100 mA
250
330
m
Ω
resistance
t
d
t
r
delay time
I
C
=
−
0.5 A;
I
Bon
=
−
25 mA;
–
11
–
–
–
–
–
–
–
ns
rise time
–
30
ns
I
Boff
= 25 mA
t
on
t
s
turn-on time
storage time
fall time
–
41
ns
–
205
55
ns
t
f
–
ns
t
off
f
T
turn-off time
transition frequency
–
260
185
ns
V
CE
=
−
10 V;
I
C
=
−
50 mA;
f = 100 MHz
150
MHz
C
c
collector capacitance
V
CB
=
−
10 V;
–
9
15
pF
I
E
= i
e
= 0 A; f = 1 MHz
[1] Pulse
test: t
p
≤
300
μ
s;
δ ≤
0.02.
PBSS4160DPN_3
© NXP B.
V
. 2009. All rights reserved.
Product data sheet
Rev. 03 — 11 December 2009
7 of 18
PBSS4160DPN
NXP Semiconductors
60 V, 1 A NPN/PNP low V
CEsat
(BISS) transistor
006aaa505
006aaa506
800
1.2
V
(V)
BE
h
FE
(1)
(2)
1.0
0.8
0.6
0.4
0.2
600
(1)
(2)
(3)
400
200
0
(3)
−
1
2
3
4
−
1
2
3
4
10
1
10
10
10
10
(mA)
10
1
10
10
10
10
I (mA)
C
I
C
V
CE
= 5 V
V
CE
= 5 V
(1) T
amb
= 100
°
C
(2) T
amb
= 25
°
C
(3) T
amb
=
−
55
°
C
(1) T
amb
=
−
55
°
C
(2) T
amb
= 25
°
C
(3) T
amb
= 100
°
C
Fig 5.
TR1 (NPN): DC current gain as a function of
collector current; typical values
Fig 6.
TR1 (NPN): Base-emitter voltage as a function
of collector current; typical values
006aaa513
006aaa514
1
1
V
CEsat
(V)
V
CEsat
(V)
−
1
10
(1)
(2)
−
1
10
(1)
(2)
(3)
(3)
−
2
10
−
2
10
−
3
10
10
10
−
1
2
3
4
−
1
2
3
4
1
10
10
10
10
(mA)
1
10
10
10
10
I (mA)
C
I
C
I
C
/I
B
= 20
T
amb
= 25
°
C
(1) T
amb
= 100
°
C
(2) T
amb
= 25
°
C
(3) T
amb
=
−
55
°
C
(1) I
C
/I
B
= 100
(2) I
C
/I
B
= 50
(3) I
C
/I
B
= 10
Fig 7.
TR1 (NPN): Collector-emitter saturation
voltage as a function of collector current;
typical values
Fig 8.
TR1 (NPN): Collector-emitter saturation
voltage as a function of collector current;
typical values
PBSS4160DPN_3
© NXP B.
V
. 2009. All rights reserved.
Product data sheet
Rev. 03 — 11 December 2009
8 of 18
PBSS4160DPN
NXP Semiconductors
60 V, 1 A NPN/PNP low V
CEsat
(BISS) transistor
006aaa509
006aaa515
3
1.2
10
V
BEsat
(V)
R
CEsat
(
Ω
)
1.0
0.8
0.6
0.4
0.2
2
10
(1)
(2)
(3)
10
(1)
(2)
(3)
1
−
1
10
10
−
1
2
3
4
−
1
2
3
4
10
1
10
10
10
10
(mA)
1
10
10
10
10
I (mA)
C
I
C
I
C
/I
B
= 20
I
C
/I
B
= 20
(1) T
amb
=
−
55
°
C
(2) T
amb
= 25
°
C
(3) T
amb
= 100
°
C
(1) T
amb
= 100
°
C
(2) T
amb
= 25
°
C
(3) T
amb
=
−
55
°
C
Fig 9.
TR1 (NPN): Base-emitter saturation voltage as
a function of collector current; typical values
Fig 10.
TR1 (NPN): Collector-emitter saturation
resistance as a function of collector current;
typical values
006aaa511
006aaa516
3
2.0
10
I
B
(mA) = 65.0
58.5
45.5
I
C
(A)
R
CEsat
52.0
39.0
(
Ω
)
1.6
32.5
19.5
2
10
26.0
13.0
6.5
1.2
0.8
0.4
0
10
(1)
(2)
1
(3)
−
1
10
10
−
1
2
3
4
0
1
2
3
4
5
1
10
10
10
10
(mA)
C
V
(V)
I
CE
T
amb
= 25
°
C
T
amb
= 25
°
C
(1) I
C
/I
B
= 100
(2) I
C
/I
B
= 50
(3) I
C
/I
B
= 10
Fig 11.
TR1 (NPN): Collector current as a function of
collector-emitter voltage; typical values
Fig 12.
TR1 (NPN): Collector-emitter saturation
resistance as a function of collector current;
typical values
PBSS4160DPN_3
© NXP B.
V
. 2009. All rights reserved.
Product data sheet
Rev. 03 — 11 December 2009
9 of 18
PBSS4160DPN
NXP Semiconductors
60 V, 1 A NPN/PNP low V
CEsat
(BISS) transistor
006aaa474
006aaa476
600
−
1.0
(1)
V
BE
h
FE
(V)
−
0.8
−
0.6
−
0.4
−
0.2
(1)
(2)
400
(2)
(3)
200
(3)
0
−
10
−
1
2
3
4
−
1
2
3
4
−
1
−
10
−
10
−
10
−
10
(mA)
−
10
−
1
−
10
−
10
−
10
−
10
I (mA)
C
I
C
V
CE
=
−
5 V
V
CE
=
−
5 V
(1) T
amb
= 100
°
C
(2) T
amb
= 25
°
C
(3) T
amb
=
−
55
°
C
(1) T
amb
=
−
55
°
C
(2) T
amb
= 25
°
C
(3) T
amb
= 100
°
C
Fig 13.
TR2 (PNP): DC current gain as a function of
collector current; typical values
Fig 14.
TR2 (PNP): Base-emitter voltage as a function
of collector current; typical values
006aaa489
006aaa490
−
1
−
1
V
(V)
V
CEsat
CEsat
(V)
−
1
−
1
−
10
−
10
(1)
(2)
(1)
(2)
(3)
(3)
−
2
−
10
−
2
−
10
−
10
−
10
−
1
2
3
4
−
1
2
3
4
−
1
−
10
−
10
−
10
−
10
(mA)
−
1
−
10
−
10
−
10
−
10
I (mA)
C
I
C
I
C
/I
B
= 20
T
amb
= 25
°
C
(1) T
amb
= 100
°
C
(2) T
amb
= 25
°
C
(3) T
amb
=
−
55
°
C
(1) I
C
/I
B
= 100
(2) I
C
/I
B
= 50
(3) I
C
/I
B
= 10
Fig 15.
TR2 (PNP): Collector-emitter saturation
voltage as a function of collector current;
typical values
Fig 16.
TR2 (PNP): Collector-emitter saturation
voltage as a function of collector current;
typical values
PBSS4160DPN_3
© NXP B.
V
. 2009. All rights reserved.
Product data sheet
Rev. 03 — 11 December 2009
10 of 18
PBSS4160DPN
NXP Semiconductors
60 V, 1 A NPN/PNP low V
CEsat
(BISS) transistor
006aaa477
006aaa491
3
−
1.1
10
V
BEsat
(V)
R
CEsat
(
Ω
)
−
0.9
−
0.7
−
0.5
−
0.3
−
0.1
2
10
(1)
(2)
(3)
10
(1)
(2)
(3)
1
−
1
−
10
10
−
1
2
3
4
−
1
2
3
4
−
10
−
1
−
10
−
10
−
10
−
10
(mA)
−
1
−
10
−
10
−
10
−
10
I (mA)
C
I
C
I
C
/I
B
= 20
I
C
/I
B
= 20
(1) T
amb
=
−
55
°
C
(2) T
amb
= 25
°
C
(3) T
amb
= 100
°
C
(1) T
amb
= 100
°
C
(2) T
amb
= 25
°
C
(3) T
amb
=
−
55
°
C
Fig 17.
TR2 (PNP): Base-emitter saturation voltage as
a function of collector current; typical values
Fig 18.
TR2 (PNP): Collector-emitter saturation
resistance as a function of collector current;
typical values
006aaa478
006aaa492
3
−
2.0
10
I
B
(mA) =
−
35.0
−
31.5
I
C
R
CEsat
(A)
−
28.0
(
Ω
)
−
24.5
−
21.0
−
1.6
−
17.5
−
14.0
2
10
−
10.5
−
7.0
−
1.2
−
0.8
−
0.4
0.0
10
(1)
−
3.5
(2)
(3)
1
−
1
10
−
1
2
3
4
0
−
1
−
2
−
3
−
4
−
5
(V)
−
10
−
1
−
10
−
10
−
10
−
10
I (mA)
C
V
CE
T
amb
= 25
°
C
T
amb
= 25
°
C
(1) I
C
/I
B
= 100
(2) I
C
/I
B
= 50
(3) I
C
/I
B
= 10
Fig 19.
TR2 (PNP): Collector current as a function of
collector-emitter voltage; typical values
Fig 20.
TR2 (PNP): Collector-emitter saturation
resistance as a function of collector current;
typical values
PBSS4160DPN_3
© NXP B.
V
. 2009. All rights reserved.
Product data sheet
Rev. 03 — 11 December 2009
11 of 18
PBSS4160DPN
NXP Semiconductors
60 V, 1 A NPN/PNP low V
CEsat
(BISS) transistor
8. Test
information
I
B
input pulse
90 %
(idealized waveform)
I
(100 %)
Bon
10 %
I
Boff
output pulse
(idealized waveform)
I
C
90 %
I
(100 %)
C
10 %
t
t
t
f
t
t
r
s
d
t
t
off
on
006aaa003
Fig 21.
TR1 (NPN): BISS transistor switching time definition
V
V
CC
BB
R
R
C
B
V
o
(probe)
(probe)
oscilloscope
oscilloscope
450
Ω
450
Ω
R2
V
I
DUT
R1
mlb826
I
C
= 0.5 A; I
Bon
= 25 mA; I
Boff
=
−
25 mA; R1 = open; R2 = 100
Ω
; R
B
= 300
Ω
; R
C
= 20
Ω
Fig 22.
TR1 (NPN): Test circuit for switching times
PBSS4160DPN_3
© NXP B.
V
. 2009. All rights reserved.
Product data sheet
Rev. 03 — 11 December 2009
12 of 18
PBSS4160DPN
NXP Semiconductors
60 V, 1 A NPN/PNP low V
CEsat
(BISS) transistor
−
I
B
input pulse
90 %
(idealized waveform)
−
I
(100 %)
Bon
10 %
−
I
Boff
output pulse
−
(idealized waveform)
I
C
90 %
−
I
(100 %)
C
10 %
t
t
t
f
t
t
r
s
d
006aaa266
t
t
off
on
Fig 23.
TR2 (PNP): BISS transistor switching time definition
V
V
CC
BB
R
R
C
B
V
o
(probe)
(probe)
oscilloscope
oscilloscope
450
Ω
450
Ω
R2
V
I
DUT
R1
mgd624
I
C
=
−
0.5 A; I
Bon
=
−
25 mA; I
Boff
= 25 mA; R1 = open; R2 = 100
Ω
; R
B
= 300
Ω
; R
C
= 20
Ω
Fig 24.
TR2 (PNP): Test circuit for switching times
PBSS4160DPN_3
© NXP B.
V
. 2009. All rights reserved.
Product data sheet
Rev. 03 — 11 December 2009
13 of 18
PBSS4160DPN
NXP Semiconductors
60 V, 1 A NPN/PNP low V
CEsat
(BISS) transistor
9. Package
outline
3.1
2.7
1.1
0.9
6
5
4
0.6
0.2
3.0 1.7
2.5 1.3
pin 1 index
1
2
3
0.26
0.10
0.40
0.25
0.95
1.9
Dimensions in mm
04-11-08
Fig 25.
Package outline SOT457 (SC-74)
10. Packing information
Table 8.
Packing methods
The indicated -xxx are the last three digits of the 12NC ordering code.
[1]
Type number
Package
Description
Packing quantity
3000
-115
-125
10000
-135
[2]
[3]
PBSS4160DPN SOT457
4 mm pitch, 8 mm tape and reel; T1
4 mm pitch, 8 mm tape and reel; T2
-165
[1] For
further information and the availability of packing methods, see
Section 14
.
[2] T1:
normal taping
[3] T2:
reverse taping
PBSS4160DPN_3
© NXP B.
V
. 2009. All rights reserved.
Product data sheet
Rev. 03 — 11 December 2009
14 of 18
PBSS4160DPN
NXP Semiconductors
60 V, 1 A NPN/PNP low V
CEsat
(BISS) transistor
11. Soldering
3.45
1.95
solder lands
0.95
solder resist
0.45 0.55
2.825
3.30
occupied area
solder paste
1.60
1.70
3.10
3.20
msc422
Dimensions in mm
Fig 26.
Reflow soldering footprint
5.30
solder lands
5.05
0.45 1.45 4.45
solder resist
occupied area
msc423
1.40
4.30
Dimensions in mm
Fig 27.
Wave soldering footprint
PBSS4160DPN_3
© NXP B.
V
. 2009. All rights reserved.
Product data sheet
Rev. 03 — 11 December 2009
15 of 18
PBSS4160DPN
NXP Semiconductors
60 V, 1 A NPN/PNP low V
CEsat
(BISS) transistor
12. Revision history
Table 9.
Revision history
Document ID
Release date
Data sheet status
Change notice
Supersedes
PBSS4160DPN_3
Modifications:
20091211
Product data sheet
–
PBSS4160DPN_2
•
This data sheet was changed to reflect the new company name NXP Semiconductors,
including new legal definitions and disclaimers. No changes were made to the technical
content.
•
Figure 1
,
7
and
15
: updated
PBSS4160DPN_2
PBSS4160DPN_1
20050714
Product data sheet
–
–
PBSS4160DPN_1
–
20040603
Objective data sheet
PBSS4160DPN_3
© NXP B.
V
. 2009. All rights reserved.
Product data sheet
Rev. 03 — 11 December 2009
16 of 18
PBSS4160DPN
NXP Semiconductors
60 V, 1 A NPN/PNP low V
CEsat
(BISS) transistor
13. Legal information
13.1 Data
sheet status
Document status
[1][2]
Product status
[3]
Development
Definition
Objective [short] data sheet
This document contains data from the objective specification for product development.
This document contains data from the preliminary specification.
This document contains the product specification.
Preliminary [short] data sheet
Qualification
Product [short] data sheet
Production
[1]
[2]
[3]
Please consult the most recently issued document before initiating or completing a design.
The term ‘short data sheet’ is explained in section “Definitions”.
The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status
damage. NXP Semiconductors accepts no liability for inclusion and/or use of
NXP Semiconductors products in such equipment or applications and
therefore such inclusion and/or use is at the customer’s own risk.
13.2 Definitions
Draft —
The document is a draft version only. The content is still under
internal review and subject to formal approval, which may result in
modifications or additions. NXP Semiconductors does not give any
representations or warranties as to the accuracy or completeness of
information included herein and shall have no liability for the consequences of
use of such information.
Applications —
Applications that are described herein for any of these
products are for illustrative purposes only. NXP Semiconductors makes no
representation or warranty that such applications will be suitable for the
specified use without further testing or modification.
Limiting values —
Stress above one or more limiting values (as defined in
the Absolute Maximum Ratings System of IEC 60134) may cause permanent
damage to the device. Limiting values are stress ratings only and operation of
the device at these or any other conditions above those given in the
Characteristics sections of this document is not implied. Exposure to limiting
values for extended periods may affect device reliability.
Short data sheet —
A short data sheet is an extract from a full data sheet
with the same product type number(s) and title. A short data sheet is intended
for quick reference only and should not be relied upon to contain detailed and
full information. For detailed and full information see the relevant full data
sheet, which is available on request via the local NXP Semiconductors sales
office. In case of any inconsistency or conflict with the short data sheet, the
full data sheet shall prevail.
Terms and conditions of sale —
NXP Semiconductors products are sold
subject to the general terms and conditions of commercial sale, as published
intellectual property rights infringement and limitation of liability, unless
explicitly otherwise agreed to in writing by NXP Semiconductors. In case of
any inconsistency or conflict between information in this document and such
terms and conditions, the latter will prevail.
13.3 Disclaimers
General —
Information in this document is believed to be accurate and
reliable. However, NXP Semiconductors does not give any representations or
warranties, expressed or implied, as to the accuracy or completeness of such
information and shall have no liability for the consequences of use of such
information.
No offer to sell or license —
Nothing in this document may be interpreted or
construed as an offer to sell products that is open for acceptance or the grant,
conveyance or implication of any license under any copyrights, patents or
other industrial or intellectual property rights.
Right to make changes —
NXP Semiconductors reserves the right to make
changes to information published in this document, including without
limitation specifications and product descriptions, at any time and without
notice. This document supersedes and replaces all information supplied prior
to the publication hereof.
Export control —
This document as well as the item(s) described herein
may be subject to export control regulations. Export might require a prior
authorization from national authorities.
Quick reference data —
The Quick reference data is an extract of the
product data given in the Limiting values and Characteristics sections of this
document, and as such is not complete, exhaustive or legally binding.
Suitability for use —
NXP Semiconductors products are not designed,
authorized or warranted to be suitable for use in medical, military, aircraft,
space or life support equipment, nor in applications where failure or
malfunction of an NXP Semiconductors product can reasonably be expected
to result in personal injury, death or severe property or environmental
13.4 Trademarks
Notice: All referenced brands, product names, service names and trademarks
are the property of their respective owners.
14. Contact information
PBSS4160DPN_3
© NXP B.
V
. 2009. All rights reserved.
Product data sheet
Rev. 03 — 11 December 2009
17 of 18
PBSS4160DPN
NXP Semiconductors
60 V, 1 A NPN/PNP low V
CEsat
(BISS) transistor
15. Contents
1
Product profile . . . . . . . . . . . . . . . . . . . . . . . . . .
1
1.1
1.2
1.3
1.4
General description
. . . . . . . . . . . . . . . . . . . . .
1
Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
1
Applications .
. . . . . . . . . . . . . . . . . . . . . . . . . .
1
Quick reference data
. . . . . . . . . . . . . . . . . . . .
1
2
Pinning informatio
n
. . . . . . . . . . . . . . . . . . . . . .
2
Ordering informatio
n
. . . . . . . . . . . . . . . . . . . . .
2
Markin
g
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2
Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . .
2
Thermal characteristics
. . . . . . . . . . . . . . . . . .
4
Characteristic
s
. . . . . . . . . . . . . . . . . . . . . . . . . .
6
Test informatio
n
. . . . . . . . . . . . . . . . . . . . . . . .
1
2
Package outline . . . . . . . . . . . . . . . . . . . . . . . .
14
Packing information
. . . . . . . . . . . . . . . . . . . .
14
Soldering .
. . . . . . . . . . . . . . . . . . . . . . . . . . . .
15
Revision histor
y
. . . . . . . . . . . . . . . . . . . . . . . .
1
6
3
4
5
6
7
8
9
10
11
12
13
Legal information. . . . . . . . . . . . . . . . . . . . . . .
17
Data sheet status . . . . . . . . . . . . . . . . . . . . . .
17
Definition
s
. . . . . . . . . . . . . . . . . . . . . . . . . . . .
1
7
Disclaimer
s
. . . . . . . . . . . . . . . . . . . . . . . . . . .
1
7
Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . .
17
13.1
13.2
13.3
13.4
14
15
Contact information. . . . . . . . . . . . . . . . . . . . .
17
Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
18
Please be aware that important notices concerning this document and the product(s)
described herein, have been included in section ‘Legal information’.
© NXP B.V.
2009.
All rights reserved.
For sales office addresses, please send an email to: salesaddresses@nxp.com
Date of release: 11 December 2009
Document identifier: PBSS4160DPN_3
