Nexperia-PBSS9110D-115
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Dear Customer,
On 7 February 2017 the former NXP Standard Product business became a new company with the
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Nexperia
. Nexperia is an industry leading supplier of Discrete, Logic and PowerMOS
semiconductors with its focus on the automotive, industrial, computing, consumer and wearable
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In data sheets and application notes which still contain NXP or Philips Semiconductors references, use
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(email)
Replace the copyright notice at the bottom of each page or elsewhere in the document, depending on
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– © NXP N.V. (year). All rights reserved or © Koninklijke Philips Electronics N.V. (year). All rights
reserved
Should be replaced with:
–
© Nexperia B.V. (year). All rights reserved
.
If you have any questions related to the data sheet, please contact our nearest sales office via e-mail
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Team Nexperia
PBSS9110D
100 V, 1 A PNP low V
CEsat
(BISS) transistor
Rev. 03 — 22 November 2009
Product data sheet
1. Product
profile
1.1 General
description
PNP low V
CEsat
Breakthrough In Small Signal (BISS) transistor in a SOT457 (SC-74)
small Surface-Mounted Device (SMD) plastic package.
NPN complement: PBSS8110D.
1.2 Features
Low collector-emitter saturation voltage V
CEsat
High collector current capability I
C
and I
CM
High collector current gain (h
FE
) at high I
C
High efficiency due to less heat generation
Smaller required Printed-Circuit Board (PCB) area than for conventional transistors
1.3 Applications
High-voltage DC-to-DC conversion
High-voltage MOSFET gate driving
High-voltage motor control
High-voltage power switches (e.g. motors, fans)
Automotive applications
1.4 Quick
reference data
Table 1.
Quick reference data
Symbol Parameter
Conditions
Min
Typ
Max
−
100
−
1
Unit
V
V
CEO
I
C
collector-emitter voltage
open base
collector current
–
–
–
–
–
–
A
I
CM
peak collector current
single pulse;
−
3
A
t
p
≤
1 ms
[1]
R
CEsat
collector-emitter
I
C
=
−
1 A;
–
170
320
m
Ω
saturation resistance
I
B
=
−
100 mA
[1] Pulse
test: t
p
≤
300
μ
s;
δ ≤
0.02.
PBSS9110D
NXP Semiconductors
100 V, 1 A PNP low V
CEsat
(BISS) transistor
2. Pinning
information
Table 2.
Pinning
Pin
Description
collector
base
Simplified outline
Symbol
1, 2, 5, 6
6
5
4
1, 2, 5, 6
3
4
emitter
3
1
2
3
4
sym030
3. Ordering
information
Table 3.
Ordering information
Type number
Package
Name
Description
Version
PBSS9110D
SC-74
plastic surface-mounted package (TSOP6); 6 leads
SOT457
4. Marking
Table 4.
Marking codes
Type number
Marking code
PBSS9110D
A7
5. Limiting
values
Table 5.
Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).
Symbol
V
CBO
V
CEO
V
EBO
I
C
Parameter
Conditions
Min
Max
−
120
−
100
−
5
Unit
V
collector-base voltage
open emitter
–
–
–
–
–
collector-emitter voltage
open base
V
emitter-base voltage
collector current
open collector
V
−
1
A
I
CM
peak collector current
single pulse;
−
3
A
t
p
≤
1 ms
I
B
base current
–
–
–
–
−
0.3
300
550
700
A
[1]
[2]
[3]
P
tot
total power dissipation
T
amb
≤
25
°
C
mW
mW
mW
PBSS9110D_3
© NXP B.
V
. 2009. All rights reserved.
Product data sheet
Rev. 03 — 22 November 2009
2 of 13
PBSS9110D
NXP Semiconductors
100 V, 1 A PNP low V
CEsat
(BISS) transistor
Table 5.
Limiting values
…continued
In accordance with the Absolute Maximum Rating System (IEC 60134).
Symbol
T
j
Parameter
Conditions
Min
–
Max
150
Unit
°
C
junction temperature
ambient temperature
storage temperature
T
amb
T
stg
−
65
−
65
+150
+150
°
C
°
C
[1] Device
mounted on an FR4 PCB, single-sided copper, tin-plated and standard footprint.
[2] Device
mounted on an FR4 PCB, single-sided copper, tin-plated, mounting pad for collector 1cm
2
.
[3] Device
mounted on an FR4 PCB, single-sided copper, tin-plated, mounting pad for collector 6cm
2
.
001aaa493
800
P
tot
(mW)
600
(1)
(2)
400
200
0
(3)
0
40
80
120
160
(
°
C)
T
amb
(1) FR4
PCB, mounting pad for collector 6cm
2
(2) FR4
PCB, mounting pad for collector 1cm
2
(3) FR4
PCB, standard footprint
Fig 1.
Power derating curves
6. Thermal
characteristics
Table 6.
Thermal characteristics
Symbol Parameter
Conditions
Min
Typ
Max
416
227
178
83
Unit
K/W
K/W
K/W
K/W
[1]
[2]
[3]
R
th(j-a)
thermal resistance from
in free air
–
–
–
–
–
–
–
–
junction to ambient
R
th(j-sp)
thermal resistance from
junction to solder point
[1] Device
mounted on an FR4 PCB, single-sided copper, tin-plated and standard footprint.
[2] Device
mounted on an FR4 PCB, single-sided copper, tin-plated, mounting pad for collector 1cm
2
.
[3] Device
mounted on an FR4 PCB, single-sided copper, tin-plated, mounting pad for collector 6cm
2
.
PBSS9110D_3
© NXP B.
V
. 2009. All rights reserved.
Product data sheet
Rev. 03 — 22 November 2009
3 of 13
PBSS9110D
NXP Semiconductors
100 V, 1 A PNP low V
CEsat
(BISS) transistor
001aaa818
3
10
duty cycle =
Z
th(j-a)
1
0.75
0.33
(K/W)
0.5
2
10
0.2
0.1
0.05
10
0.02
0.01
0
1
−
1
10
10
−
5
−
4
−
3
−
2
−
1
2
3
10
10
10
10
1
10
10
10
t
p
(s)
FR4 PCB, standard footprint
Fig 2.
Transient thermal impedance from junction to ambient as a function of pulse duration; typical values
001aaa819
3
10
Z
th(j-a)
duty cycle =
(K/W)
1
0.75
2
0.5
10
0.33
0.2
0.1
0.05
10
0.02
0.01
0
1
−
1
10
10
−
5
−
4
−
3
−
2
−
1
2
3
10
10
10
10
1
10
10
10
t
p
(s)
FR4 PCB, mounting pad for collector 1cm
2
Fig 3.
Transient thermal impedance from junction to ambient as a function of pulse duration; typical values
PBSS9110D_3
© NXP B.
V
. 2009. All rights reserved.
Product data sheet
Rev. 03 — 22 November 2009
4 of 13
PBSS9110D
NXP Semiconductors
100 V, 1 A PNP low V
CEsat
(BISS) transistor
7. Characteristics
Table 7.
Characteristics
T
amb
= 25
°
C unless otherwise specified.
Symbol Parameter
Conditions
Min
Typ
Max
−
100
−
50
Unit
nA
I
CBO
collector-base cut-off
current
V
CB
=
−
80 V; I
E
= 0 A
–
–
–
–
V
CB
=
−
80 V
;
I
E
= 0 A;
T
j
= 150
°
C
μ
A
I
CES
I
EBO
h
FE
collector-emitter cut-off
V
CE
=
−
80 V;
–
–
–
–
–
–
−
100
−
100
–
nA
nA
current
V
BE
= 0 V
emitter-base cut-off
current
V
EB
=
−
4 V; I
C
= 0 A
–
DC current gain
V
CE
=
−
5 V;
I
C
=
−
1 mA
150
150
150
V
CE
=
−
5 V;
–
I
C
=
−
250 mA
[1]
[1]
V
CE
=
−
5 V;
I
C
=
−
0.5 A
450
V
CE
=
−
5 V; I
C
=
−
1 A
125
–
–
–
–
V
CEsat
collector-emitter
saturation voltage
I
C
=
−
250 mA;
I
B
=
−
25 mA
−
120
mV
mV
mV
m
Ω
V
[1]
[1]
[1]
[1]
I
C
=
−
0.5 A;
I
B
=
−
50 mA
–
–
–
–
–
–
−
180
−
320
320
I
C
=
−
1 A;
I
B
=
−
100 mA
–
R
CEsat
V
BEsat
V
BEon
collector-emitter
I
C
=
−
1 A;
170
saturation resistance
I
B
=
−
100 mA
base-emitter saturation
I
C
=
−
1 A;
–
–
−
1.1
−
1.0
voltage
I
B
=
−
100 mA
base-emitter turn-on
voltage
V
CE
=
−
5 V; I
C
=
−
1 A
V
t
d
t
r
delay time
V
CC
=
−
10 V;
I
C
=
−
0.5 A;
I
Bon
=
−
0.025 A;
I
Boff
= 0.025 A
–
20
–
–
–
–
–
–
–
ns
rise time
–
60
ns
t
on
t
s
turn-on time
storage time
fall time
–
80
ns
–
290
120
410
–
ns
t
f
–
ns
t
off
f
T
turn-off time
transition frequency
–
ns
V
CE
=
−
10 V;
I
C
=
−
50 mA;
f = 100 MHz
100
MHz
C
c
collector capacitance
V
CB
=
−
10 V;
I
E
= i
e
= 0 A;
f = 1 MHz
–
–
17
pF
[1] Pulse
test: t
p
≤
300
μ
s;
δ ≤
0.02.
PBSS9110D_3
© NXP B.
V
. 2009. All rights reserved.
Product data sheet
Rev. 03 — 22 November 2009
5 of 13
PBSS9110D
NXP Semiconductors
100 V, 1 A PNP low V
CEsat
(BISS) transistor
001aaa376
001aaa384
600
−
2
I
(mA) =
−
45
−
40.5
B
I
C
(1)
(A)
h
FE
−
36
−
1.6
−
31.5
−
27
400
(2)
−
1.2
−
0.8
−
0.4
0
−
22.5
−
18
−
13.5
−
9
−
4.5
(3)
200
0
−
10
−
1
2
3
4
−
1
−
10
−
10
−
10
−
10
(mA)
0
−
1
−
2
−
3
−
4
−
5
I
C
V
(V)
CE
V
CE
=
−
10 V
(1) T
amb
= 100
°
C
(2) T
amb
= 25
°
C
(3) T
amb
=
−
55
°
C
T
amb
= 25
°
C
Fig 4.
DC current gain as a function of collector
current; typical values
Fig 5.
Collector current as a function of
collector-emitter voltage; typical values
001aaa377
001aaa381
−
1.2
−
10
V
BE
(V)
V
BEsat
(V)
(1)
(2)
(3)
−
0.8
−
1
(1)
(2)
(3)
−
0.4
−
1
−
10
0
−
10
−
10
−
1
2
3
4
−
1
2
3
4
−
1
−
10
−
10
−
10
−
10
(mA)
−
1
−
10
−
10
−
10
−
10
I (mA)
C
I
C
V
CE
=
−
10 V
I
C
/I
B
= 10
(1) T
amb
=
−
55
°
C
(2) T
amb
= 25
°
C
(3) T
amb
= 100
°
C
(1) T
amb
=
−
55
°
C
(2) T
amb
= 25
°
C
(3) T
amb
= 100
°
C
Fig 6.
Base-emitter voltage as a function of collector
current; typical values
Fig 7.
Base-emitter saturation voltage as a function
of collector current; typical values
PBSS9110D_3
© NXP B.
V
. 2009. All rights reserved.
Product data sheet
Rev. 03 — 22 November 2009
6 of 13
PBSS9110D
NXP Semiconductors
100 V, 1 A PNP low V
CEsat
(BISS) transistor
001aaa378
001aaa380
−
1
−
1
V
V
CEsat
(V)
CEsat
(V)
−
1
−
1
−
10
−
10
(1)
(2)
(1)
(2)
(3)
−
2
−
10
−
2
−
10
−
10
−
10
−
1
2
3
4
−
1
2
3
4
−
1
−
10
−
10
−
10
−
10
(mA)
−
1
−
10
−
10
−
10
−
10
I (mA)
C
I
C
I
C
/I
B
= 10
T
amb
= 25
°
C
(1) I
C
/I
B
= 50
(2) I
C
/I
B
= 20
(1) T
amb
= 100
°
C
(2) T
amb
= 25
°
C
(3) T
amb
=
−
55
°
C
Fig 8.
Collector-emitter saturation voltage as a
function of collector current; typical values
Fig 9.
Collector-emitter saturation voltage as a
function of collector current; typical values
001aaa382
001aaa383
3
3
10
10
R
CEsat
R
CEsat
(
Ω
)
(
Ω
)
2
2
10
10
10
10
(1)
(2)
(3)
(1)
(2)
1
1
−
1
−
10
−
1
−
10
10
10
−
1
2
3
4
−
1
2
3
4
−
1
−
10
−
10
−
10
−
10
(mA)
−
1
−
10
−
10
−
10
−
10
I (mA)
C
I
C
I
C
/I
B
= 10
T
amb
= 25
°
C
(1) T
amb
=
−
55
°
C
(2) T
amb
= 25
°
C
(3) T
amb
= 100
°
C
(1) I
C
/I
B
= 50
(2) I
C
/I
B
= 20
Fig 10.
Collector-emitter saturation resistance as a
function of collector current; typical values
Fig 11.
Collector-emitter saturation resistance as a
function of collector current; typical values
PBSS9110D_3
© NXP B.
V
. 2009. All rights reserved.
Product data sheet
Rev. 03 — 22 November 2009
7 of 13
PBSS9110D
NXP Semiconductors
100 V, 1 A PNP low V
CEsat
(BISS) transistor
8. Test
information
−
I
B
input pulse
90 %
(idealized waveform)
−
I
(100 %)
Bon
10 %
−
I
Boff
output pulse
−
(idealized waveform)
I
C
90 %
−
I
(100 %)
C
10 %
t
t
t
f
t
t
r
s
d
006aaa266
t
t
off
on
Fig 12.
BISS transistor switching time definition
V
V
CC
BB
R
R
C
B
V
o
(probe)
(probe)
oscilloscope
oscilloscope
450
Ω
450
Ω
R2
V
I
DUT
R1
mgd624
V
CC
=
−
10 V; I
C
=
−
0.5 A; I
Bon
=
−
0.025 A; I
Boff
= 0.025 A
Fig 13.
Test circuit for switching times
PBSS9110D_3
© NXP B.
V
. 2009. All rights reserved.
Product data sheet
Rev. 03 — 22 November 2009
8 of 13
PBSS9110D
NXP Semiconductors
100 V, 1 A PNP low V
CEsat
(BISS) transistor
9. Package
outline
3.1
2.7
1.1
0.9
6
5
4
0.6
0.2
3.0 1.7
2.5 1.3
pin 1 index
1
2
3
0.26
0.10
0.40
0.25
0.95
1.9
Dimensions in mm
04-11-08
Fig 14.
Package outline SOT457 (SC-74)
10. Packing information
Table 8.
Packing methods
The indicated -xxx are the last three digits of the 12NC ordering code.
[1]
Type number
Package Description
Packing quantity
3000
10000
-135
[2]
[3]
PBSS9110D
SOT457
4 mm pitch, 8 mm tape and reel; T1
4 mm pitch, 8 mm tape and reel; T2
-115
-125
-165
[1] For
further information and the availability of packing methods, see
Section 14
.
[2] T1:
normal taping
[3] T2:
reverse taping
PBSS9110D_3
© NXP B.
V
. 2009. All rights reserved.
Product data sheet
Rev. 03 — 22 November 2009
9 of 13
PBSS9110D
NXP Semiconductors
100 V, 1 A PNP low V
CEsat
(BISS) transistor
11. Soldering
3.45
1.95
solder lands
0.95
solder resist
0.45 0.55
2.825
3.30
occupied area
solder paste
1.60
1.70
3.10
3.20
msc422
Dimensions in mm
Fig 15.
Reflow soldering footprint SOT457 (SC-74)
5.30
solder lands
solder resist
occupied area
5.05
0.45 1.45 4.45
msc423
1.40
4.30
Dimensions in mm
Fig 16.
Wave soldering footprint SOT457 (SC-74)
PBSS9110D_3
© NXP B.
V
. 2009. All rights reserved.
Product data sheet
Rev. 03 — 22 November 2009
10 of 13
PBSS9110D
NXP Semiconductors
100 V, 1 A PNP low V
CEsat
(BISS) transistor
12. Revision history
Table 9.
Revision history
Document ID
PBSS9110D_3
Modifications:
Release date
Data sheet status
Change notice
Supersedes
20091122
Product data sheet
–
PBSS9110D_2
•
This data sheet was changed to reflect the new company name NXP Semiconductors,
including new legal definitions and disclaimers. No changes were made to the technical
content.
•
Figure 16 “Wave soldering footprint SOT457 (SC-74)”
: updated
PBSS9110D_2
PBSS9110D_1
20060713
Product data sheet
–
PBSS9110D_1
–
20040611
Objective data sheet
–
PBSS9110D_3
© NXP B.
V
. 2009. All rights reserved.
Product data sheet
Rev. 03 — 22 November 2009
11 of 13
PBSS9110D
NXP Semiconductors
100 V, 1 A PNP low V
CEsat
(BISS) transistor
13. Legal information
13.1 Data
sheet status
Document status
[1][2]
Product status
[3]
Development
Definition
Objective [short] data sheet
This document contains data from the objective specification for product development.
This document contains data from the preliminary specification.
This document contains the product specification.
Preliminary [short] data sheet
Qualification
Product [short] data sheet
Production
[1]
[2]
[3]
Please consult the most recently issued document before initiating or completing a design.
The term ‘short data sheet’ is explained in section “Definitions”.
The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status
damage. NXP Semiconductors accepts no liability for inclusion and/or use of
NXP Semiconductors products in such equipment or applications and
therefore such inclusion and/or use is at the customer’s own risk.
13.2 Definitions
Draft —
The document is a draft version only. The content is still under
internal review and subject to formal approval, which may result in
modifications or additions. NXP Semiconductors does not give any
representations or warranties as to the accuracy or completeness of
information included herein and shall have no liability for the consequences of
use of such information.
Applications —
Applications that are described herein for any of these
products are for illustrative purposes only. NXP Semiconductors makes no
representation or warranty that such applications will be suitable for the
specified use without further testing or modification.
Limiting values —
Stress above one or more limiting values (as defined in
the Absolute Maximum Ratings System of IEC 60134) may cause permanent
damage to the device. Limiting values are stress ratings only and operation of
the device at these or any other conditions above those given in the
Characteristics sections of this document is not implied. Exposure to limiting
values for extended periods may affect device reliability.
Short data sheet —
A short data sheet is an extract from a full data sheet
with the same product type number(s) and title. A short data sheet is intended
for quick reference only and should not be relied upon to contain detailed and
full information. For detailed and full information see the relevant full data
sheet, which is available on request via the local NXP Semiconductors sales
office. In case of any inconsistency or conflict with the short data sheet, the
full data sheet shall prevail.
Terms and conditions of sale —
NXP Semiconductors products are sold
subject to the general terms and conditions of commercial sale, as published
intellectual property rights infringement and limitation of liability, unless
explicitly otherwise agreed to in writing by NXP Semiconductors. In case of
any inconsistency or conflict between information in this document and such
terms and conditions, the latter will prevail.
13.3 Disclaimers
General —
Information in this document is believed to be accurate and
reliable. However, NXP Semiconductors does not give any representations or
warranties, expressed or implied, as to the accuracy or completeness of such
information and shall have no liability for the consequences of use of such
information.
No offer to sell or license —
Nothing in this document may be interpreted or
construed as an offer to sell products that is open for acceptance or the grant,
conveyance or implication of any license under any copyrights, patents or
other industrial or intellectual property rights.
Right to make changes —
NXP Semiconductors reserves the right to make
changes to information published in this document, including without
limitation specifications and product descriptions, at any time and without
notice. This document supersedes and replaces all information supplied prior
to the publication hereof.
Export control —
This document as well as the item(s) described herein
may be subject to export control regulations. Export might require a prior
authorization from national authorities.
Quick reference data —
The Quick reference data is an extract of the
product data given in the Limiting values and Characteristics sections of this
document, and as such is not complete, exhaustive or legally binding.
Suitability for use —
NXP Semiconductors products are not designed,
authorized or warranted to be suitable for use in medical, military, aircraft,
space or life support equipment, nor in applications where failure or
malfunction of an NXP Semiconductors product can reasonably be expected
to result in personal injury, death or severe property or environmental
13.4 Trademarks
Notice: All referenced brands, product names, service names and trademarks
are the property of their respective owners.
14. Contact information
PBSS9110D_3
© NXP B.
V
. 2009. All rights reserved.
Product data sheet
Rev. 03 — 22 November 2009
12 of 13
PBSS9110D
NXP Semiconductors
100 V, 1 A PNP low V
CEsat
(BISS) transistor
15. Contents
1
Product profile . . . . . . . . . . . . . . . . . . . . . . . . . .
1
1.1
1.2
1.3
1.4
General description
. . . . . . . . . . . . . . . . . . . . .
1
Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
1
Applications .
. . . . . . . . . . . . . . . . . . . . . . . . . .
1
Quick reference data
. . . . . . . . . . . . . . . . . . . .
1
2
Pinning informatio
n
. . . . . . . . . . . . . . . . . . . . . .
2
Ordering informatio
n
. . . . . . . . . . . . . . . . . . . . .
2
Markin
g
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2
Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . .
2
Thermal characteristics
. . . . . . . . . . . . . . . . . .
3
Characteristic
s
. . . . . . . . . . . . . . . . . . . . . . . . . .
5
Test informatio
n
. . . . . . . . . . . . . . . . . . . . . . . . .
8
Package outline . . . . . . . . . . . . . . . . . . . . . . . . .
9
Packing information
. . . . . . . . . . . . . . . . . . . . .
9
Soldering .
. . . . . . . . . . . . . . . . . . . . . . . . . . . .
10
Revision histor
y
. . . . . . . . . . . . . . . . . . . . . . . .
1
1
3
4
5
6
7
8
9
10
11
12
13
Legal information. . . . . . . . . . . . . . . . . . . . . . .
12
Data sheet status . . . . . . . . . . . . . . . . . . . . . .
12
Definition
s
. . . . . . . . . . . . . . . . . . . . . . . . . . . .
1
2
Disclaimer
s
. . . . . . . . . . . . . . . . . . . . . . . . . . .
1
2
Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . .
12
13.1
13.2
13.3
13.4
14
15
Contact information. . . . . . . . . . . . . . . . . . . . .
12
Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
13
Please be aware that important notices concerning this document and the product(s)
described herein, have been included in section ‘Legal information’.
© NXP B.V.
2009.
All rights reserved.
For sales office addresses, please send an email to: salesaddresses@nxp.com
Date of release: 22 November 2009
Document identifier: PBSS9110D_3
