Nexperia-PHPT61006PY-115
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Important notice
Dear Customer,
On 7 February 2017 the former NXP Standard Product business became a new company with the
tradename
Nexperia
. Nexperia is an industry leading supplier of Discrete, Logic and PowerMOS
semiconductors with its focus on the automotive, industrial, computing, consumer and wearable
application markets
In data sheets and application notes which still contain NXP or Philips Semiconductors references, use
the references to Nexperia, as shown below.
salesaddresses@nexperia.com
(email)
Replace the copyright notice at the bottom of each page or elsewhere in the document, depending on
the version, as shown below:
– © NXP N.V. (year). All rights reserved or © Koninklijke Philips Electronics N.V. (year). All rights
reserved
Should be replaced with:
–
© Nexperia B.V. (year). All rights reserved
.
If you have any questions related to the data sheet, please contact our nearest sales office via e-mail
understanding,
Kind regards,
Team Nexperia
PIMZ2; PUMZ2
NPN/PNP general-purpose double transistors
Rev. 06 — 17 November 2009
Product data sheet
1. Product
profile
1.1 General
description
NPN/PNP general-purpose double transistors.
Table 1.
Product overview
Type number
Package
NXP
Configuration
JEITA
SC-74
SC-88
PIMZ2
SOT457
SOT363
NPN/PNP double transistors
NPN/PNP double transistors
PUMZ2
1.2 Features
Simplified circuit design
Reduced component count
Reduced pick and place costs
1.3 Applications
General-purpose switching and amplification
1.4 Quick
reference data
Table 2.
Symbol
V
CEO
Quick reference data
Parameter
Conditions
Min
Typ
Max
50
Unit
V
collector-emitter voltage
collector current (DC)
open base
–
–
–
–
I
C
150
mA
PIMZ2; PUMZ2
NXP Semiconductors
NPN/PNP general-purpose double transistors
2. Pinning
information
Table 3.
Pin
Pinning
Description
Simplified outline
Symbol
PIMZ2 (SOT457)
1
2
3
4
5
6
collector TR2
6
1
5
2
4
3
6
5
4
emitter TR2
collector TR1
emitter TR1
base TR1
TR1
TR2
base TR2
1
6
2
5
3
sym082
PUMZ2 (SOT363)
1
2
3
4
5
6
emitter TR1
4
6
1
5
2
4
base TR1
TR2
base TR2
TR1
1
collector TR2
emitter TR2
collector TR1
3
2
3
sym083
3. Ordering
information
Table 4.
Ordering information
Type number
Package
Name
Description
Version
SOT457
SOT363
PIMZ2
SC-74
SC-88
plastic surface mounted package; 6 leads
plastic surface mounted package; 6 leads
PUMZ2
4. Marking
Table 5.
Marking codes
Type number
PIMZ2
M6
PUMZ2
GZ*
[1] *
= -: made in Hong Kong
* = t: made in Malaysia
* = W: made in China
PIMZ2_PUMZ2_6
© NXP B.
V
. 2009. All rights reserved.
Product data sheet
Rev. 06 — 17 November 2009
2 of 9
PIMZ2; PUMZ2
NXP Semiconductors
NPN/PNP general-purpose double transistors
5. Limiting
values
Table 6.
Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).
Symbol
Parameter
Conditions
Min
Max
Unit
Per transistor; for the PNP transistor with negative polarity
V
CBO
V
CEO
V
EBO
I
C
collector-base voltage
collector-emitter voltage
emitter-base voltage
collector current (DC)
peak collector current
peak base current
total power dissipation
SOT457
open emitter
open base
–
–
–
–
–
–
60
V
50
V
open collector
7
V
150
200
100
mA
mA
mA
I
CM
I
BM
P
tot
T
amb
≤
25
°
C
–
200
mW
mW
°
C
SOT363
–
180
T
stg
storage temperature
junction temperature
ambient temperature
−
65
–
+150
150
T
j
°
C
T
amb
−
65
+150
°
C
Per device
P
tot
total power dissipation
SOT457
T
amb
≤
25
°
C
–
–
300
300
mW
mW
SOT363
[1] Device
mounted on an FR4 printed-circuit board.
6. Thermal
characteristics
Table 7.
Thermal characteristics
Symbol Parameter
Per transistor
Conditions
Min
Typ
Max Unit
R
th(j-a)
thermal resistance from
T
amb
≤
25
°
C
junction to ambient
SOT457
–
–
–
–
625
694
K/W
K/W
SOT363
Per device
R
th(j-a)
thermal resistance from
junction to ambient
T
amb
≤
25
°
C
SOT457
SOT363
–
–
–
–
417
417
K/W
K/W
[1] Device
mounted on an FR4 printed-circuit board.
PIMZ2_PUMZ2_6
© NXP B.
V
. 2009. All rights reserved.
Product data sheet
Rev. 06 — 17 November 2009
3 of 9
PIMZ2; PUMZ2
NXP Semiconductors
NPN/PNP general-purpose double transistors
7. Characteristics
Table 8.
Characteristics
T
amb
= 25
°
C unless otherwise specified.
Symbol Parameter
Conditions
Min
Typ
Max
Unit
Per transistor; for the PNP transistor with negative polarity; unless otherwise specified
I
CBO
collector-base cut-off current
V
CB
= 60 V; I
E
= 0 A
V
CB
= 60 V; I
E
= 0 A; T
j
= 150
°
C
emitter-base cut-off current
V
EB
= 7 V; I
C
= 0 A
–
–
100
50
nA
μ
A
nA
–
–
I
EBO
h
FE
TR1 (PNP)
–
–
100
560
DC current gain
V
CE
= 6 V; I
C
= 1 mA
120
250
V
CEsat
collector-emitter saturation
I
C
=
−
50 mA; I
B
=
−
5 mA
–
–
−
500
mV
voltage
f
T
transition frequency
collector capacitance
I
E
=
−
2 mA; V
CE
=
−
12 V; f = 100 MHz
I
E
= i
e
= 0 A; V
CB
=
−
12 V; f = 1 MHz
–
–
190
2.3
–
MHz
pF
C
c
5
TR2 (NPN)
V
CEsat
collector-emitter saturation
I
C
= 50 mA; I
B
= 5 mA
–
–
250
mV
voltage
f
T
transition frequency
collector capacitance
I
E
= 2 mA; V
CE
= 12 V; f = 100 MHz
I
E
= i
e
= 0 A; V
CB
= 12 V; f = 1 MHz
100
–
–
–
–
MHz
pF
C
c
3
PIMZ2_PUMZ2_6
© NXP B.
V
. 2009. All rights reserved.
Product data sheet
Rev. 06 — 17 November 2009
4 of 9
PIMZ2; PUMZ2
NXP Semiconductors
NPN/PNP general-purpose double transistors
8. Package
outline
Plastic surface-mounted package (TSOP6); 6 leads
SOT457
D
B
E
A
X
y
H
v
M
A
E
6
5
4
Q
pin 1
index
A
A
1
c
1
2
3
L
p
e
b
p
w
M
B
detail X
0
1
2 mm
scale
DIMENSIONS (mm are the original dimensions)
UNIT
A
A
b
c
D
E
e
H
L
Q
v
w
y
p
1
p
E
0.1
0.013
0.40
0.25
1.1
0.9
0.26
0.10
3.1
2.7
1.7
1.3
3.0
2.5
0.6
0.2
0.33
0.23
mm
0.95
0.2
0.2
0.1
REFERENCES
JEDEC JEITA
EUROPEAN
PROJECTION
OUTLINE
VERSION
ISSUE DATE
IEC
05-11-07
06-03-16
SOT457
SC-74
Fig 1.
Package outline SOT457 (SC-74)
PIMZ2_PUMZ2_6
© NXP B.
V
. 2009. All rights reserved.
Product data sheet
Rev. 06 — 17 November 2009
5 of 9
PIMZ2; PUMZ2
NXP Semiconductors
NPN/PNP general-purpose double transistors
Plastic surface-mounted package; 6 leads
SOT363
D
B
E
A
X
y
H
v
M
A
E
6
5
4
Q
pin 1
index
A
A
1
1
2
3
c
e
1
b
L
p
w
M
B
p
e
detail X
0
1
2 mm
scale
DIMENSIONS (mm are the original dimensions)
A
1
UNIT
A
b
c
D
E
e
e
H
L
Q
v
w
y
p
p
1
E
max
0.30
0.20
1.1
0.8
0.25
0.10
2.2
1.8
1.35
1.15
2.2
2.0
0.45
0.15
0.25
0.15
mm
0.1
1.3
0.65
0.2
0.2
0.1
REFERENCES
JEDEC JEITA
EUROPEAN
PROJECTION
OUTLINE
VERSION
ISSUE DATE
IEC
04-11-08
06-03-16
SOT363
SC-88
Fig 2.
Package outline SOT363 (SC-88)
PIMZ2_PUMZ2_6
© NXP B.
V
. 2009. All rights reserved.
Product data sheet
Rev. 06 — 17 November 2009
6 of 9
PIMZ2; PUMZ2
NXP Semiconductors
NPN/PNP general-purpose double transistors
9. Revision
history
Table 9.
Revision history
Document ID
PIMZ2_PUMZ2_6
Modifications:
Release date
Data sheet status
Change notice
Supersedes
20091117
Product data sheet
–
PIMZ2_PUMZ2_5
•
This data sheet was changed to reflect the new company name NXP Semiconductors,
including new legal definitions and disclaimers. No changes were made to the technical
content.
PIMZ2_PUMZ2_5
PIMZ2_PUMZ2_4
PIMZ2_2
20041124
20031217
20030714
20030602
Product data sheet
Product specification
Product specification
Objective specification
–
–
–
–
PIMZ2_PUMZ2_4
PIMZ2_2
PIMZ2_1
–
PIMZ2_1
PIMZ2_PUMZ2_6
© NXP B.
V
. 2009. All rights reserved.
Product data sheet
Rev. 06 — 17 November 2009
7 of 9
PIMZ2; PUMZ2
NXP Semiconductors
NPN/PNP general-purpose double transistors
10. Legal information
10.1 Data
sheet status
Document status
[1][2]
Product status
[3]
Development
Definition
Objective [short] data sheet
This document contains data from the objective specification for product development.
This document contains data from the preliminary specification.
This document contains the product specification.
Preliminary [short] data sheet
Qualification
Product [short] data sheet
Production
[1]
[2]
[3]
Please consult the most recently issued document before initiating or completing a design.
The term ‘short data sheet’ is explained in section “Definitions”.
The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status
damage. NXP Semiconductors accepts no liability for inclusion and/or use of
NXP Semiconductors products in such equipment or applications and
therefore such inclusion and/or use is at the customer’s own risk.
10.2 Definitions
Draft —
The document is a draft version only. The content is still under
internal review and subject to formal approval, which may result in
modifications or additions. NXP Semiconductors does not give any
representations or warranties as to the accuracy or completeness of
information included herein and shall have no liability for the consequences of
use of such information.
Applications —
Applications that are described herein for any of these
products are for illustrative purposes only. NXP Semiconductors makes no
representation or warranty that such applications will be suitable for the
specified use without further testing or modification.
Limiting values —
Stress above one or more limiting values (as defined in
the Absolute Maximum Ratings System of IEC 60134) may cause permanent
damage to the device. Limiting values are stress ratings only and operation of
the device at these or any other conditions above those given in the
Characteristics sections of this document is not implied. Exposure to limiting
values for extended periods may affect device reliability.
Short data sheet —
A short data sheet is an extract from a full data sheet
with the same product type number(s) and title. A short data sheet is intended
for quick reference only and should not be relied upon to contain detailed and
full information. For detailed and full information see the relevant full data
sheet, which is available on request via the local NXP Semiconductors sales
office. In case of any inconsistency or conflict with the short data sheet, the
full data sheet shall prevail.
Terms and conditions of sale —
NXP Semiconductors products are sold
subject to the general terms and conditions of commercial sale, as published
intellectual property rights infringement and limitation of liability, unless
explicitly otherwise agreed to in writing by NXP Semiconductors. In case of
any inconsistency or conflict between information in this document and such
terms and conditions, the latter will prevail.
10.3 Disclaimers
General —
Information in this document is believed to be accurate and
reliable. However, NXP Semiconductors does not give any representations or
warranties, expressed or implied, as to the accuracy or completeness of such
information and shall have no liability for the consequences of use of such
information.
No offer to sell or license —
Nothing in this document may be interpreted or
construed as an offer to sell products that is open for acceptance or the grant,
conveyance or implication of any license under any copyrights, patents or
other industrial or intellectual property rights.
Right to make changes —
NXP Semiconductors reserves the right to make
changes to information published in this document, including without
limitation specifications and product descriptions, at any time and without
notice. This document supersedes and replaces all information supplied prior
to the publication hereof.
Export control —
This document as well as the item(s) described herein
may be subject to export control regulations. Export might require a prior
authorization from national authorities.
Quick reference data —
The Quick reference data is an extract of the
product data given in the Limiting values and Characteristics sections of this
document, and as such is not complete, exhaustive or legally binding.
Suitability for use —
NXP Semiconductors products are not designed,
authorized or warranted to be suitable for use in medical, military, aircraft,
space or life support equipment, nor in applications where failure or
malfunction of an NXP Semiconductors product can reasonably be expected
to result in personal injury, death or severe property or environmental
10.4 Trademarks
Notice: All referenced brands, product names, service names and trademarks
are the property of their respective owners.
11. Contact
information
PIMZ2_PUMZ2_6
© NXP B.
V
. 2009. All rights reserved.
Product data sheet
Rev. 06 — 17 November 2009
8 of 9
PIMZ2; PUMZ2
NXP Semiconductors
NPN/PNP general-purpose double transistors
12. Contents
Please be aware that important notices concerning this document and the product(s)
described herein, have been included in section ‘Legal information’.
© NXP B.V.
2009.
All rights reserved.
For sales office addresses, please send an email to: salesaddresses@nxp.com
Date of release: 17 November 2009
Document identifier: PIMZ2_PUMZ2_6
