Nexperia-PMPB40ENAX
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. Nexperia is an industry leading supplier of Discrete, Logic and PowerMOS
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Replace the copyright notice at the bottom of each page or elsewhere in the document, depending on
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Should be replaced with:
–
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.
If you have any questions related to the data sheet, please contact our nearest sales office via e-mail
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6
–
PMPB40SNA
60 V N-channel Trench MOSFET
D
M
0
2
0
2
N
F
D
29 October 2013
Product data sheet
1. General
description
N-channel enhancement mode Field-Effect Transistor (FET) in a leadless medium power
DFN2020MD-6 (SOT1220) Surface-Mounted Device (SMD) plastic package using
Trench MOSFET technology.
2. Features
and benefits
Trench MOSFET technology
•
•
•
•
•
Small and leadless ultra thin SMD plastic package: 2 x 2 x 0.65 mm
Exposed drain pad for excellent thermal conduction
Tin-plated 100 % solderable side pads for optical solder inspection
AEC-Q101 qualified
3. Applications
Relay driver
•
•
•
•
High-speed line driver
Low-side load switch
Switching circuits
4. Quick
reference data
Table 1.
Symbol
Quick reference data
Parameter
Conditions
Min
Typ
Max
60
Unit
V
V
DS
V
GS
I
D
drain-source voltage
gate-source voltage
drain current
T
j
= 25 °C
–
–
–
–
-20
–
20
V
V
GS
= 10 V; T
sp
= 25 °C
12.9
A
Static characteristics
R
DSon
drain-source on-state
resistance
V
GS
= 10 V; I
D
= 4.8 A; T
j
= 25 °C
–
34
43
mΩ
NXP Semiconductors
PMPB40SNA
60 V N-channel Trench MOSFET
5. Pinning
information
Table 2.
Pin
Pinning information
Symbol Description
Simplified outline
Graphic symbol
D
1
2
3
4
5
6
7
8
D
D
G
S
D
D
D
S
drain
drain
gate
1
6
5
4
7
2
3
Transparent top view
G
8
S
source
drain
drain
drain
source
017aaa253
DFN2020MD-6 (SOT1220)
6. Ordering
information
Table 3.
Ordering information
Type number
Package
Name
Description
Version
PMPB40SNA
DFN2020MD-6 DFN2020MD-6:
plastic thermal enhanced ultra thin small outline
SOT1220
package; no leads; 6 terminals
7. Marking
Table 4.
Marking codes
Type number
Marking code
PMPB40SNA
1E
8. Limiting
values
Table 5.
Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).
Symbol
V
DS
Parameter
Conditions
Min
Max
60
Unit
V
drain-source voltage
gate-source voltage
drain current
T
j
= 25 °C
–
V
GS
-20
20
V
I
D
V
GS
= 10 V; T
sp
= 25 °C
–
–
–
–
12.9
6.8
3
A
V
GS
= 10 V; T
amb
= 25 °C; t ≤ 5 s
V
GS
= 10 V; T
amb
= 100 °C
A
A
I
DM
peak drain current
T
amb
= 25 °C; single pulse; t
p
≤ 10 µs
23
A
PMPB40SNA
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© NXP N.V. 2013. All rights reserved
Product data sheet
29 October 2013
2 / 15
NXP Semiconductors
PMPB40SNA
60 V N-channel Trench MOSFET
Symbol
Parameter
Conditions
Min
Max
Unit
E
DS(AL)S
non-repetitive drain-source
avalanche energy
T
j(init)
= 25 °C; I
D
= 0.6 A; DUT in
avalanche (unclamped)
–
19
mJ
P
tot
total power dissipation
T
amb
= 25 °C
–
1.7
W
W
W
°C
°C
°C
T
amb
= 25 °C; t ≤ 5 s
T
sp
= 25 °C
–
3.5
–
12.5
150
150
150
T
j
junction temperature
ambient temperature
storage temperature
-55
-55
-65
T
amb
T
stg
Source-drain diode
I
S
source current
T
amb
= 25 °C
–
1.7
A
[1] Device
mounted on an FR4 Printed-Circuit Board (PCB), single-sided copper, tin-plated, mounting pad for
drain 6 cm
2
.
017aaa123
017aaa124
120
120
P
der
(%)
I
der
(%)
80
80
40
40
0
– 75
0
– 75
– 25
25
75
125
175
– 25
25
75
125
175
T (°C)
j
T (°C)
j
Fig. 1.
Normalized total power dissipation as a
function of junction temperature
Fig. 2.
Normalized continuous drain current as a
function of junction temperature
PMPB40SNA
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© NXP N.V. 2013. All rights reserved
Product data sheet
29 October 2013
3 / 15
NXP Semiconductors
PMPB40SNA
60 V N-channel Trench MOSFET
aaa-005311
2
10
I
D
(A)
Limit R
= V
/I
DS
DSon
D
10
t
= 100 µs
= 1 ms
p
t
p
1
t
= 10 ms
p
DC; T
= 25 °C
sp
-1
10
10
DC; T
= 25 °C;
drain mounting pad 6 cm
t
= 100 ms
amb
p
2
-2
-2
-1
2
3
10
10
1
10
10
10
V
(V)
DS
I
DM
= single pulse
Fig. 3.
Safe operating area; junction to ambient; continuous and peak drain currents as a function of drain-
source voltage
9. Thermal
characteristics
Table 6.
Symbol
Thermal characteristics
Parameter
Conditions
Min
Typ
235
67
Max
270
74
Unit
K/W
K/W
K/W
K/W
R
th(j-a)
thermal resistance
from junction to
ambient
in free air
–
–
–
–
33
36
R
th(j-sp)
thermal resistance
from junction to solder
point
5
10
[1] Device
mounted on an FR4 PCB, single-sided copper, tin-plated and standard footprint.
[2]
Device mounted on an FR4 PCB, single-sided copper, tin-plated, mounting pad for drain 6 cm
2
.
Device mounted on an FR4 PCB, single-sided copper, tin-plated, mounting pad for drain 6 cm
2
, t ≤ 5 s
[3]
PMPB40SNA
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© NXP N.V. 2013. All rights reserved
Product data sheet
29 October 2013
4 / 15
NXP Semiconductors
PMPB40SNA
60 V N-channel Trench MOSFET
017aaa542
3
10
Z
th(j-a)
(K/W)
duty cycle = 1
0.75
0.5
2
10
0.33
0.25
0.2
0.1
0.05
0.02
10
0.01
0
1
-3
10
-2
-1
2
3
10
10
1
10
10
10
t
p
(s)
FR4 PCB, standard footprint
Fig. 4.
Transient thermal impedance from junction to ambient as a function of pulse duration; typical values
017aaa543
3
10
Z
th(j-a)
(K/W)
2
10
duty cycle = 1
0.75
0.5
0.33
0.25
0.2
0.1
10
0.05
0.02
0.01
0
1
-3
10
-2
-1
2
3
10
10
1
10
10
10
t
p
(s)
FR4 PCB, mounting pad for drain 6 cm
2
Fig. 5.
Transient thermal impedance from junction to ambient as a function of pulse duration; typical values
10. Characteristics
Table 7.
Symbol
Characteristics
Parameter
Conditions
Min
Typ
Max
Unit
Static characteristics
V
(BR)DSS
drain-source
breakdown voltage
I
D
= 250 µA; V
GS
= 0 V; T
j
= 25 °C
60
1
–
–
V
V
V
GSth
gate-source threshold
I
D
= 250 µA; V
DS
= V
GS
; T
j
= 25 °C
voltage
1.7
3
I
DSS
drain leakage current
V
DS
= 60 V; V
GS
= 0 V; T
j
= 25 °C
–
–
–
–
1
µA
µA
V
DS
= 60 V; V
GS
= 0 V; T
j
= 150 °C
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29 October 2013
20
PMPB40SNA
© NXP N.V. 2013. All rights reserved
Product data sheet
5 / 15
NXP Semiconductors
PMPB40SNA
60 V N-channel Trench MOSFET
Symbol
Parameter
Conditions
Min
Typ
–
Max
100
-100
43
Unit
nA
I
GSS
gate leakage current
V
GS
= 20 V; V
DS
= 0 V; T
j
= 25 °C
V
GS
= -20 V; V
DS
= 0 V; T
j
= 25 °C
V
GS
= 10 V; I
D
= 4.8 A; T
j
= 25 °C
V
GS
= 10 V; I
D
= 4.8 A; T
j
= 150 °C
V
GS
= 4.5 V; I
D
= 3.2 A; T
j
= 25 °C
V
DS
= 5 V; I
D
= 4.8 A; T
j
= 25 °C
–
–
–
–
–
–
–
nA
R
DSon
drain-source on-state
resistance
34
60
40
19
mΩ
mΩ
mΩ
S
75
50
g
fs
forward
–
transconductance
R
G
gate resistance
f = 1 MHz
–
1.1
–
Ω
Dynamic characteristics
Q
G(tot)
Q
GS
Q
GD
C
iss
total gate charge
V
DS
= 30 V; I
D
= 4.8 A; V
GS
= 10 V;
T
j
= 25 °C
–
–
–
–
–
–
12.1
1.4
2.1
612
78
24
–
nC
nC
nC
pF
pF
pF
gate-source charge
gate-drain charge
input capacitance
output capacitance
–
V
DS
= 30 V; f = 1 MHz; V
GS
= 0 V;
T
j
= 25 °C
–
C
oss
C
rss
–
reverse transfer
capacitance
52
–
t
d(on)
t
r
t
d(off)
t
f
turn-on delay time
rise time
V
DS
= 30 V; I
D
= 4.8 A; V
GS
= 4.5 V;
R
G(ext)
= 6 Ω; T
j
= 25 °C
–
–
–
–
9
–
–
–
–
ns
ns
ns
ns
23
12
12
turn-off delay time
fall time
Source-drain diode
V
SD
source-drain voltage
I
S
= 1.7 A; V
GS
= 0 V; T
j
= 25 °C
–
0.9
1.2
V
aaa-005312
aaa-005313
-3
25
10
10 V
I
D
3.4 V
3.6 V
(A)
I
D
4.5 V
(A)
20
3.2 V
-4
-5
-6
10
min
typ
max
15
10
5
3 V
2.8 V
10
10
V
= 2.6 V
GS
0
0
1
2
3
4
5
0
1
2
3
V
(V)
V
(V)
GS
DS
T
j
= 25 °C
T
j
= 25 °C; V
DS
= 5 V
Fig. 6.
Output characteristics: drain current as a
function of drain-source voltage; typical values
Fig. 7.
Subthreshold drain current as a function of
gate-source voltage
PMPB40SNA
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Product data sheet
29 October 2013
6 / 15
NXP Semiconductors
PMPB40SNA
60 V N-channel Trench MOSFET
aaa-005314
aaa-005315
100
120
R
DSon
(mΩ)
R
(mΩ)
DSon
2.7 V
2.8 V
2.9 V
3 V
3.1 V
3.2 V
3.3 V
80
80
60
40
20
0
T =
150 °C
j
4.5 V
40
V
= 10 V
GS
T =
25 °C
j
0
0
5
10
15
20
25
0
4
8
12
16
V
20
(V)
I
(A)
D
GS
T
j
= 25 °C
I
D
= 5 A
Fig. 8.
Drain-source on-state resistance as a function
of drain current; typical values
Fig. 9.
Drain-source on-state resistance as a function
of gate-source voltage; typical values
aaa-005316
aaa-005317
25
2.0
I
D
a
(A)
20
1.5
15
10
5
1.0
0.5
0.0
T =
150 °C
j
T =
25 °C
j
0
0
1
2
3
4
-60
0
60
120
180
V
(V)
T (°C)
j
GS
V
DS
> I
D
× R
DSon
Fig. 11.
Normalized drain-source on-state resistance
as a function of junction temperature; typical
values
Fig. 10.
Transfer characteristics: drain current as a
function of gate-source voltage; typical values
PMPB40SNA
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© NXP N.V. 2013. All rights reserved
Product data sheet
29 October 2013
7 / 15
NXP Semiconductors
PMPB40SNA
60 V N-channel Trench MOSFET
aaa-005318
aaa-005319
3
4
10
C
iss
V
GS(th)
(V)
C
(pF)
3
2
1
0
max
C
C
oss
2
10
typ
rss
min
10
-1
10
2
-60
0
60
120
180
1
10
10
T (°C)
j
V
(V)
DS
I
D
= 0.25 mA; V
DS
= V
GS
f = 1 MHz; V
GS
= 0 V
Fig. 12.
Gate-source threshold voltage as a function of
Fig. 13.
Input, output and reverse transfer capacitances
junction temperature
as a function of drain-source voltage; typical
values
aaa-005320
10
V
DS
V
GS
(V)
I
D
8
V
GS(pl)
6
4
2
0
V
GS(th)
GS
V
Q
Q
GS1
GS2
Q
Q
GD
GS
Q
G(tot)
017aaa137
Fig. 15.
Gate charge waveform definitions
0
5
10
15
Q
G
(nC)
I
D
= 5 A; V
DS
= 30 V; T
amb
= 25 °C
Fig. 14.
Gate-source voltage as a function of gate
charge; typical values
PMPB40SNA
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Product data sheet
29 October 2013
8 / 15
NXP Semiconductors
PMPB40SNA
60 V N-channel Trench MOSFET
aaa-005321
20
I
S
(A)
16
12
8
T =
150 °C
j
T =
25 °C
j
4
0
0.0
0.4
0.8
1.2
V
(V)
DS
V
GS
= 0 V
Fig. 16.
Source current as a function of source-drain voltage; typical values
11. Test
information
t
t
1
2
P
duty cycle δ =
t
2
t
1
t
006aaa812
Fig. 17.
Duty cycle definition
11.1 Quality
information
This product has been qualified in accordance with the Automotive Electronics Council
(AEC) standard Q101 – Stress test qualification for discrete semiconductors, and is
suitable for use in automotive applications.
PMPB40SNA
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© NXP N.V. 2013. All rights reserved
Product data sheet
29 October 2013
9 / 15
NXP Semiconductors
PMPB40SNA
60 V N-channel Trench MOSFET
12. Package outline
DFN2020MD-6: plastic thermal enhanced ultra thin small outline package; no leads;
6 terminals; body 2 x 2 x 0.65 mm
SOT1220
(8×)
pin 1
index area
B
A
E
X
D
A
A
y
1
1
detail X
solderable lead
end protrusion
max. 0.02 mm (6×)
C
L
p
y
E
2
C
D
2
4
5
3
2
J
1
e
J
bp (6×)
D
1
e
v
A B
1
6
pin 1
index area
E
1
0
2 mm
scale
e
Dimensions (mm are the original dimensions)
Unit bp
min 0.25
1.9 1.0
0.65 0.04 0.35
2.1 1.2
A
A
D
D
1
D
E
E
E
J
J
1
L
v
y
y
1
1
2
1
2
p
0.2 1.9 1.1
0.51
0.3 2.1 1.3
0.61
0.2
0.3
nom
max
mm
0.65 0.27 0.64
0.1 0.05 0.1
Note
1. Dimension A is including plating thickness.
sot1220_po
References
Outline
version
IEC
European
projection
Issue date
JEDEC
JEITA
12-04-23
12-04-30
SOT1220
Fig. 18.
Package outline DFN2020MD-6 (SOT1220)
PMPB40SNA
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© NXP N.V. 2013. All rights reserved
Product data sheet
29 October 2013
10 / 15
NXP Semiconductors
PMPB40SNA
60 V N-channel Trench MOSFET
13. Soldering
Footprint information for reflow soldering of DFN2020MD-6 package
SOT1220
0.33 (6×)
0.43 (6×)
0.53 (6×)
0.76
0.66
0.56
0.25 0.35 0.45
0.775
0.285
0.65
2.06
1.25
0.35 (6×)
0.65
1.35
1.05
0.25 (6×)
0.45 (6×)
0.9
1.1
1.2
0.935
0.935
2.5
solder land
solder land plus solder paste
solder paste deposit
occupied area
solder resist
Dimensions in mm
sot1220_fr
Fig. 19.
Reflow soldering footprint for DFN2020MD-6 (SOT1220)
PMPB40SNA
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© NXP N.V. 2013. All rights reserved
Product data sheet
29 October 2013
11 / 15
NXP Semiconductors
PMPB40SNA
60 V N-channel Trench MOSFET
14. Revision history
Table 8.
Revision history
Data sheet ID
Release date
Data sheet status
Change notice
Supersedes
PMPB40SNA v.3
Modifications:
20131029
Product data sheet
–
PMPB40SNA v.2
Figure 8 corrected
20130702
20120928
•
PMPB40SNA v.2
PMPB40SNA v.1
Product data sheet
Product data sheet
–
–
PMPB40SNA v.1
–
PMPB40SNA
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© NXP N.V. 2013. All rights reserved
Product data sheet
29 October 2013
12 / 15
NXP Semiconductors
PMPB40SNA
60 V N-channel Trench MOSFET
In no event shall NXP Semiconductors be liable for any indirect, incidental,
punitive, special or consequential damages (including – without limitation –
lost profits, lost savings, business interruption, costs related to the removal
or replacement of any products or rework charges) whether or not such
damages are based on tort (including negligence), warranty, breach of
contract or any other legal theory.
15. Legal information
15.1 Data
sheet status
Notwithstanding any damages that customer might incur for any reason
whatsoever, NXP Semiconductors’ aggregate and cumulative liability towards
customer for the products described herein shall be limited in accordance
with the
T
e
rms and conditions of commercial sale
of NXP Semiconductors.
Document
Product
Definition
Objective
[short] data
sheet
Development This
document contains data from
the objective specification for product
development.
Right to make changes
— NXP Semiconductors reserves the right to
make changes to information published in this document, including without
limitation specifications and product descriptions, at any time and without
notice. This document supersedes and replaces all information supplied prior
to the publication hereof.
Preliminary
[short] data
sheet
Qualification This
document contains data from the
preliminary specification.
Suitability for use in automotive applications
— This NXP
Semiconductors product has been qualified for use in automotive
applications. Unless otherwise agreed in writing, the product is not designed,
authorized or warranted to be suitable for use in life support, life-critical or
safety-critical systems or equipment, nor in applications where failure or
malfunction of an NXP Semiconductors product can reasonably be expected
to result in personal injury, death or severe property or environmental
damage. NXP Semiconductors and its suppliers accept no liability for
inclusion and/or use of NXP Semiconductors products in such equipment or
applications and therefore such inclusion and/or use is at the customer’s own
risk.
Product
[short] data
sheet
Production
This document contains the product
specification.
[1] Please
consult the most recently issued document before initiating or
completing a design.
[2] The
term ‘short data sheet’ is explained in section “Definitions”.
[3] The
product status of device(s) described in this document may have
changed since this document was published and may differ in case of
multiple devices. The latest product status information is available on
Quick reference data
— The Quick reference data is an extract of the
product data given in the Limiting values and Characteristics sections of this
document, and as such is not complete, exhaustive or legally binding.
15.2 Definitions
Applications
— Applications that are described herein for any of these
products are for illustrative purposes only. NXP Semiconductors makes no
representation or warranty that such applications will be suitable for the
specified use without further testing or modification.
Preview
— The document is a preview version only. The document is still
subject to formal approval, which may result in modifications or additions.
NXP Semiconductors does not give any representations or warranties as to
the accuracy or completeness of information included herein and shall have
no liability for the consequences of use of such information.
Customers are responsible for the design and operation of their
applications and products using NXP Semiconductors products, and NXP
Semiconductors accepts no liability for any assistance with applications or
customer product design. It is customer’s sole responsibility to determine
whether the NXP Semiconductors product is suitable and fit for the
customer’s applications and products planned, as well as for the planned
application and use of customer’s third party customer(s). Customers should
provide appropriate design and operating safeguards to minimize the risks
associated with their applications and products.
Draft
— The document is a draft version only. The content is still under
internal review and subject to formal approval, which may result in
modifications or additions. NXP Semiconductors does not give any
representations or warranties as to the accuracy or completeness of
information included herein and shall have no liability for the consequences
of use of such information.
Short data sheet
— A short data sheet is an extract from a full data sheet
with the same product type number(s) and title. A short data sheet is
intended for quick reference only and should not be relied upon to contain
detailed and full information. For detailed and full information see the
relevant full data sheet, which is available on request via the local NXP
Semiconductors sales office. In case of any inconsistency or conflict with the
short data sheet, the full data sheet shall prevail.
NXP Semiconductors does not accept any liability related to any default,
damage, costs or problem which is based on any weakness or default
in the customer’s applications or products, or the application or use by
customer’s third party customer(s). Customer is responsible for doing all
necessary testing for the customer’s applications and products using NXP
Semiconductors products in order to avoid a default of the applications
and the products or of the application or use by customer’s third party
customer(s). NXP does not accept any liability in this respect.
Product specification
— The information and data provided in a Product
data sheet shall define the specification of the product as agreed between
NXP Semiconductors and its customer, unless NXP Semiconductors and
customer have explicitly agreed otherwise in writing. In no event however,
shall an agreement be valid in which the NXP Semiconductors product
is deemed to offer functions and qualities beyond those described in the
Product data sheet.
Limiting values
— Stress above one or more limiting values (as defined in
the Absolute Maximum Ratings System of IEC 60134) will cause permanent
damage to the device. Limiting values are stress ratings only and (proper)
operation of the device at these or any other conditions above those
given in the Recommended operating conditions section (if present) or the
Characteristics sections of this document is not warranted. Constant or
repeated exposure to limiting values will permanently and irreversibly affect
the quality and reliability of the device.
15.3 Disclaimers
Terms and conditions of commercial sale
— NXP Semiconductors
products are sold subject to the general terms and conditions of commercial
agreed in a valid written individual agreement. In case an individual
agreement is concluded only the terms and conditions of the respective
agreement shall apply. NXP Semiconductors hereby expressly objects to
applying the customer’s general terms and conditions with regard to the
purchase of NXP Semiconductors products by customer.
Limited warranty and liability
— Information in this document is believed
to be accurate and reliable. However, NXP Semiconductors does not give
any representations or warranties, expressed or implied, as to the accuracy
or completeness of such information and shall have no liability for the
consequences of use of such information. NXP Semiconductors takes no
responsibility for the content in this document if provided by an information
source outside of NXP Semiconductors.
PMPB40SNA
All information provided in this document is subject to legal disclaimers.
© NXP N.V. 2013. All rights reserved
Product data sheet
29 October 2013
13 / 15
NXP Semiconductors
PMPB40SNA
60 V N-channel Trench MOSFET
No offer to sell or license
— Nothing in this document may be interpreted
or construed as an offer to sell products that is open for acceptance or the
grant, conveyance or implication of any license under any copyrights, patents
or other industrial or intellectual property rights.
Export control
— This document as well as the item(s) described herein
may be subject to export control regulations. Export might require a prior
authorization from competent authorities.
Translations
— A non-English (translated) version of a document is for
reference only. The English version shall prevail in case of any discrepancy
between the translated and English versions.
15.4 Trademarks
Notice: All referenced brands, product names, service names and
trademarks are the property of their respective owners.
Adelante
,
Bitport
,
Bitsound
,
CoolFlux
,
CoReUse
,
DESFire
,
EZ-HV
,
FabKey
,
GreenChip
,
HiPerSmart
,
HITAG
,
I²C-bus
logo,
ICODE
,
I-CODE
,
ITEC
,
Labelution
,
MIFARE
,
MIFARE Plus
,
MIFARE Ultralight
,
MoReUse
,
QLPAK
,
Silicon Tuner
,
SiliconMAX
,
SmartXA
,
STARplug
,
TOPFET
,
TrenchMOS
,
TriMedia
and
UCODE
— are trademarks of NXP B.
V
.
HD Radio
and
HD Radio
logo — are trademarks of iBiquity Digital
Corporation.
PMPB40SNA
All information provided in this document is subject to legal disclaimers.
© NXP N.V. 2013. All rights reserved
Product data sheet
29 October 2013
14 / 15
NXP Semiconductors
PMPB40SNA
60 V N-channel Trench MOSFET
16. Contents
1
2
3
4
5
6
7
8
9
10
11
11.1
12
13
14
15
15.1
15.2
15.3
15.4
© NXP N.V. 2013. All rights reserved
For sales office addresses, please send an email to: salesaddresses@nxp.com
Date of release: 29 October 2013
PMPB40SNA
All information provided in this document is subject to legal disclaimers.
© NXP N.V. 2013. All rights reserved
Product data sheet
29 October 2013
15 / 15
