NXP-Semicon-MD7IC1812NR1
| Part # | NXP-Semicon-MD7IC1812NR1 |
Download  | NXP-Semicon-MD7IC1812NR1 |
Document Number: MD7IC1812N
Rev. 0, 5/2015
Freescale Semiconductor
T
e
chnical Data
RF LDMOS Wideband Integrated
Power Amplifiers
MD7IC1812NR1
MD7IC1812GNR1
The MD7IC1812N wideband integrated circuit is designed with on
–
–
chip
matching that makes it usable from 1805 to 2170 MHz. This multi
–
–
stage
structure is rated for 24 to 32 V operation and covers all typical cellular base
station modulation formats.
1805–2170 MHz, 1.3 W AVG., 28 V
SINGLE W
–
-CDMA
RF LDMOS WIDEBAND
INTEGRATED POWER AMPLIFIERS
Driver Application — 1800 MHz
Typical Single
–
–
Carrier W
–
–
CDMA Performance: V
DD
= 28 Vdc,
I
DQ1A
= I
DQ1B
= 20 mA, I
DQ2A
= I
DQ2B
= 70 mA, P
out
= 1.3 W Avg.,
IQ Magnitude Clipping, Channel Bandwidth = 3.84 MHz, Input Signal
PAR = 7.5 dB @ 0.01% Probability on CCD
F
.
G
PAE
(%)
ACPR
(dBc)
ps
Frequency
1805 MHz
1840 MHz
1880 MHz
(dB)
31.9
31.6
31.5
13.0
13.4
14.0
–50.3
–50.2
–49.8
Capable of Handling 5:1 VSWR, @ 32 Vdc, 1840 MHz, 19 W CW
Output Power (3 dB Input Overdrive from Rated P
out
TO
–
-270WB
–
-14
PLASTIC
MD71C1812NR1
)
Driver Application — 1900 MHz
Typical Single
–
–
Carrier W
–
–
CDMA Performance: V
DD
= 28 Vdc,
I
DQ1A
= I
DQ1B
= 20 mA, I
DQ2A
= I
DQ2B
= 70 mA, P
out
= 1.3 W Avg.,
IQ Magnitude Clipping, Channel Bandwidth = 3.84 MHz, Input Signal
PAR = 7.5 dB @ 0.01% Probability on CCD
F
.
G
PAE
(%)
ACPR
(dBc)
ps
Frequency
1930 MHz
1960 MHz
1995 MHz
(dB)
32.2
32.1
32.0
TO
–
-270WBG
–
-14
PLASTIC
MD71C1812GNR1
15.2
15.1
15.1
–51.6
–52.3
–52.6
Driver Application — 2100 MHz
Typical Single
–
–
Carrier W
–
–
CDMA Performance: V
DD
= 28 Vdc,
I
DQ1A
= I
DQ1B
= 20 mA, I
DQ2A
= I
DQ2B
= 70 mA, P
out
= 1.3 W Avg.,
IQ Magnitude Clipping, Channel Bandwidth = 3.84 MHz, Input Signal
PAR = 7.5 dB @ 0.01% Probability on CCD
F
.
G
PAE
(%)
ACPR
(dBc)
ps
Frequency
2110 MHz
2140 MHz
2170 MHz
(dB)
32.2
32.3
32.5
14.8
14.6
14.4
–52.8
–52.6
–49.4
Features
Characterized with Series Equivalent Large
–
–
Signal Impedance Parameters and Common Source S
–
–
Parameters
Integrated Quiescent Current
T
e
mperature Compensation with Enable/Disable Function
(1)
Designed for Digital Predistortion Error Correction Systems
Optimized for Doherty Applications
1. Refer
to
AN1977
,
Quiescent Current Thermal Tracking Circuit in the RF Integrated Circuit Family
, and to
AN1987
,
Quiescent Current
Control for the RF Integrated Circuit Device Family
. Go to
http://www.freescale.com/rf
and search for AN1977 or AN1987.
Freescale Semiconductor, Inc., 2015. All rights reserved.
V
DS1A
V
1
2
DS1A
GS2A
V
V
RF
RF /V
out1 DS2A
inA
14
13
3
GS1A
RF
RF /V
out1 DS2A
4
inA
NC
NC
NC
NC
5
6
V
V
GS1A
GS2A
Quiescent Current
Temperature Compensation
7
(1)
(1)
8
9
10
11
12
RF
RF /V
out2 DS2B
inB
V
V
GS1B
GS2B
Quiescent Current
Temperature Compensation
V
GS1B
GS2B
V
V
DS1B
(
T
o
p View)
RF
inB
RF /V
out2 DS2B
Note: Exposed
backside of the package is
the source terminal for the transistors.
V
DS1B
Figure 1. Functional Block Diagram
Figure 2. Pin Connections
Table 1. Maximum Ratings
Rating
Symbol
Value
–0.5, +65
–0.5, +10
32, +0
Unit
Vdc
Vdc
Vdc
C
Drain
–
–
Source Voltage
Gate
–
–
Source Voltage
Operating Voltage
V
DSS
V
GS
DD
V
Storage
T
e
mperature Range
Case Operating
T
e
mperature
Operating Junction
T
e
mperature
Input Power
T
stg
–
6
5 to +150
150
T
C
C
(2,3)
T
225
C
J
P
20
dBm
in
Table 2. Thermal Characteristics
(3,4)
Characteristic
Symbol
Value
Unit
Thermal Resistance, Junction to Case
R
C/W
JC
Case
T
e
mperature 73
C, 1.3 W CW
Stage 1, 28 Vdc, I
Stage 2, 28 Vdc, I
= I
= I
= 40 mA, 1840 MHz
= 180 mA, 1840 MHz
6.5
2.9
DQ1A
DQ2A
DQ1B
DQ2B
Table 3. ESD Protection Characteristics
Test Methodology
Class
1C
A
Human Body Model (per JESD22
–
–
A
1
14)
Machine Model (per EIA/JESD22
–
–
A
1
15)
Charge Device Model (per JESD22
–
–
C101)
III
Table 4. Moisture Sensitivity Level
Test Methodology
Rating
Package Peak Temperature
Unit
Per JESD22
–
–
A
1
13, IPC/JEDEC J
–
–
STD
–
–
020
3
260
C
1. Refer
to
AN1977
,
Quiescent Current Thermal Tracking Circuit in the RF Integrated Circuit Family
, and to
AN1987
,
Quiescent Current
Control for the RF Integrated Circuit Device Family
. Go to
http://www.freescale.com/rf
and search for AN1977 or AN1987.
2. Continuous
use at maximum temperature will affect MTT
F
.
4. Refer
to
AN1955
,
Thermal Measurement Methodology of RF Power Amplifiers.
Go to
http://www.freescale.com/rf
and search for AN1955.
MD7IC1812NR1 MD7IC1812GNR1
RF Device Data
Freescale Semiconductor, Inc.
2
Table 5. Electrical Characteristics
(T =
25
C unless otherwise noted)
A
Characteristic
Symbol
Min
Typ
Max
Unit
(1)
Stage 1
–
– Off Characteristics
Zero Gate Voltage Drain Leakage Current
I
I
—
—
—
—
—
—
10
1
Adc
Adc
Adc
DSS
DSS
GSS
(V =
65 Vdc, V
= 0 Vdc)
DS
GS
Zero Gate Voltage Drain Leakage Current
(V =
28 Vdc, V
= 0 Vdc)
DS
GS
Gate
–
–
Source Leakage Current
(V =
1.5 Vdc, V
= 0 Vdc)
I
1
GS
DS
(1)
Stage 1
–
– On Characteristics
Gate Threshold Voltage
V
V
1.2
—
2.0
2.7
5.0
2.7
—
Vdc
Vdc
Vdc
GS(th)
GS(Q)
GG(Q)
(V =
10 Vdc, I
= 5
Adc)
DS
D
Gate Quiescent Voltage
(V =
28 Vdc, I
= I
= 20 mAdc)
DQ1B
DS
DQ1A
Fixture Gate Quiescent Voltage
V
4.2
5.7
(V =
28 Vdc, I
DD
= I
= 20 mAdc, Measured in Functional
T
e
st)
DQ1A
DQ1B
(1)
Stage 2
–
– Off Characteristics
Zero Gate Voltage Drain Leakage Current
(V =
65 Vdc, V
= 0 Vdc)
I
—
—
—
—
—
—
10
1
Adc
Adc
Adc
DSS
DSS
GSS
DS
GS
Zero Gate Voltage Drain Leakage Current
(V =
28 Vdc, V
= 0 Vdc)
I
DS
GS
Gate
–
–
Source Leakage Current
(V =
1.5 Vdc, V
= 0 Vdc)
I
1
GS
DS
(1)
Stage 2
–
– On Characteristics
Gate Threshold Voltage
V
V
1.2
—
2.0
2.0
2.7
—
Vdc
Vdc
Vdc
Vdc
GS(th)
GS(Q)
GG(Q)
DS(on)
(V =
10 Vdc, I
= 24
Adc)
DS
D
Gate Quiescent Voltage
(V =
28 Vdc, I
= I
= 70 mAdc)
DQ2B
DS
DQ2A
Fixture Gate Quiescent Voltage
(V =
28 Vdc, I
= I
= 70 mAdc, Measured in Functional
T
e
st)
DQ2B
V
3.2
0.1
4.0
4.7
DD
DQ2A
Drain
–
–
Source On
–
–
V
oltage
V
0.24
1.5
(V =
10 Vdc, I
= 240 mAdc)
GS
D
(2,3)
Functional Tests
(In Freescale Wideband 1805–1880
T
e
st Fixture, 50 ohm system) V
= 28 Vdc, I
= I
= 20 mA,
DQ1B
DD
DQ1A
I
= I
= 70 mA, P
= 1.3 W Avg., f = 1880 MHz, Single
–
–
Carrier W
–
–
CDMA, IQ Magnitude Clipping, Input Signal PAR = 7.5 dB @
DQ2B out
DQ2A
0.01% Probability on CCD
F
.
A
CPR measured in 3.84 MHz Channel Bandwidth @
5 MHz Offset.
Power Gain
G
31.0
13.0
—
31.5
14.0
35.0
—
dB
%
ps
Power Added Efficiency
Adjacent Channel Power Ratio
PAE
ACPR
–49.8
–47.5
dBc
1. Each
side of device measured separately.
2. Part
internally matched both on input and output.
3. Measurement
made with device in straight lead configuration before any lead forming operation is applied. Lead forming is used for gull wing
(GN) parts.
(continued)
MD7IC1812NR1 MD7IC1812GNR1
RF Device Data
Freescale Semiconductor, Inc.
3
Table 5. Electrical Characteristics
(T =
25
C unless otherwise noted)
(continued)
A
Characteristic
Symbol
= I
Min
Typ
= I
Max
Unit
Typical Performance
(In Freescale
T
e
st Fixture, 50 ohm system) V
= 28 Vdc, I
= 20 mA, I
= 70 mA,
DQ2B
DD
DQ1A
DQ1B
DQ2A
1805–1880 MHz Bandwidth
P
P
@ 1 dB Compression Point, CW
@ 3 dB Compression Point, CW
P1dB
P3dB
—
—
—
12
—
—
—
W
W
out
out
13
VBW Resonance Point
VBW
140
MHz
res
(IMD Third Order Intermodulation Inflection Point)
(1)
Quiescent Current Accuracy over
T
e
mperature
I
%
QT
with 2 k
Gate Feed Resistors (–30 to 85
C)
with 2 k
Gate Feed Resistors (–30 to 85
C)
Stage 1
Stage 2
—
—
2.5
1.7
—
—
Gain Flatness in 75 MHz Bandwidth @ P
= 1.3 W Avg.
G
—
—
0.3
—
—
dB
out
F
Gain Variation over
T
e
mperature
G
0.03
dB/
C
(–30
C to +85
C)
Output Power Variation over
T
e
mperature
P1dB
—
0.014
—
dB/
C
(–30
C to +85
C)
Table 6. Ordering Information
Device
Tape and Reel Information
R1 Suffix = 500 Units, 44 mm
T
a
pe Width, 13
–
–
inch Reel
Package
TO
–
–
270WB
–
–
14
TO
–
–
270WBG
–
–
14
MD7IC1812NR1
MD7IC1812GNR1
1. Refer
to
AN1977
,
Quiescent Current Thermal Tracking Circuit in the RF Integrated Circuit Family
, and to
AN1987
,
Quiescent Current
Control for the RF Integrated Circuit Device Family.
Go to
http://www.freescale.com/rf
and search for AN1977 or AN1987.
MD7IC1812NR1 MD7IC1812GNR1
RF Device Data
Freescale Semiconductor, Inc.
4
V
GG1A
V
DD1A
C31
C23
R2
C24
C25
R1
C1
C32
MD7IC Dual Path
Rev. 2
C2
C17
C19
C29
C36
C35
R6
C13
C14
C6
C8
C9
C10
C21
C5
C7
C15
C16
Z2
Z1
C11
C12
R5
C22
C37
C38
D44014
C20
C30
R3
C3
C18
R4
C28
C27
C34
C4
C26
C33
V
GG1B
Figure 3. MD7IC1812NR1 Test Circuit Component Layout
Table 7. MD7IC1812NR1 Test Circuit Component Designations and Values
Part
Description
Part Number
Manufacturer
ATC
C1, C2, C3, C4
C5, C6, C7, C8
3.9 pF Chip Capacitors
ATC600F3R9BT250XT
ATC600F1R0BT250XT
ATC600F0R6BT250XT
ATC600F0R8BT250XT
ATC600F1R2BT250XT
ATC600F10RBT250XT
ATC600F5R6BT250XT
1.0 pF Chip Capacitors
0.6 pF Chip Capacitors
0.8 pF Chip Capacitors
1.2 pF Chip Capacitors
10 pF Chip Capacitors
5.6 pF Chip Capacitors
10
F Chip Capacitors
ATC
ATC
ATC
ATC
ATC
ATC
C9, C10, C11, C12
C13, C14
C15, C16
C17, C18, C19, C20
C21, C22
C23, C24, C25, C26, C27, C28,
C29, C30, C31, C32, C33, C34
C5750X7S2A106M230KB TDK
C35, C36, C37, C38
R1, R2, R3, R4
R5, R6
22 nF Chip Capacitors
GRM31MR72A223KA01L Murata
2 K
, 1/4 W Chip Resistors
CRCW12062K00FKEA
375375
–
–
6X50
–
–
2
X3C21P1-03S
D44014
Vishay
Anaren
Anaren
MTL
50
, 20 W
T
e
rmination
Z1, Z2
1800–2300 MHz Band, 90
, 3 dB Hybrid Couplers
PCB
Rogers RO4350B, 0.020
,
= 3.66
r
MD7IC1812NR1 MD7IC1812GNR1
RF Device Data
Freescale Semiconductor, Inc.
5
TYPICAL CHARACTERISTICS — 1805–1880 MHz
16
15
14
13
12
32.8
32.7
32.6
32.5
32.4
32.3
32.2
32.1
32
V
= 28 Vdc, P
= 1.3 W (Avg.), I
= I
DQ1A DQ1B
= 20 mA
PAE
DD
out
I
= I
= 70 mA, Single
–
–
Carrier W
–
–
CDMA
DQ2A DQ2B
3.84 MHz Channel Bandwidth
Input Signal PAR = 7.5 dB @ 0.01%
Probability on CCDF
G
ps
0.25
0.2
0.15
0.1
0.05
0
–49
–49.5
–50
ACPR
PARC
–50.5
–51
31.9
31.8
–51.5
1760 1780 1800 1820 1840 1860 1880 1900 1920
f, FREQUENCY (MHz)
Figure 4. Single
–
-Carrier Output Peak
–
-to
–
-Average Ratio Compression
(PARC) Broadband Performance @ P
out
= 1.3 Watts Avg.
–
15
V
= 28 Vdc, P
= 7.6 W (PEP), I
= I
= 20 mA
DD
out
DQ1A DQ1B
I
= I
= 70 mA, Two
–
–
T
one Measurements
DQ2A DQ2B
–
25
(f1 + f2)/2 = Center Frequency of 1840 MHz
IM3
–
–
U
IM3
–
–
L
–35
–
45
–
55
–
65
IM5
–
–
U
IM5
–
–
L
IM7
–
–
U
IM7
–
–
L
1
10
100
300
TWO
–
–
TONE SPACING (MHz)
Figure 5. Intermodulation Distortion Products
versus Two
–
-Tone Spacing
33
32
1
0
60
–
25
V
= 28 Vdc, I
= I
= 20 mA
DD
DQ1A DQ1B
I
= I
= 70 mA, f = 1840 MHz
DQ2A DQ2B
50
40
30
20
10
0
–
30
–
35
–
40
–
45
–
50
–
55
ACPR
PAE
–1
–2
–3
–4
–5
31
30
29
28
27
–1 dB = 3.4 W
–3 dB = 6.7 W
G
ps
–2 dB = 5 W
Single
–
–
Carrier W
–
–
CDMA
PARC
3.84 MHz Channel Bandwidth
Input Signal PAR = 7.5 dB
@ 0.01% Probability on CCDF
1
3
5
7
9
11
P
, OUTPUT POWER (WATTS)
out
Figure 6. Output Peak
–
-to
–
-Average Ratio
Compression (PARC) versus Output Power
MD7IC1812NR1 MD7IC1812GNR1
RF Device Data
Freescale Semiconductor, Inc.
6
TYPICAL CHARACTERISTICS — 1805–1880 MHz
60
50
40
30
20
10
0
33
32
31
30
29
28
27
0
V
= 28 Vdc, I
= I
= 20 mA, I
= I
= 70 mA
DD
DQ1A DQ1B
DQ2A DQ2B
Single
–
–
Carrier W
–
–
CDMA, 3.84 MHz Channel Bandwidth
— 1 0
— 2 0
— 3 0
— 4 0
— 5 0
— 6 0
PAE
1805 MHz
1840 MHz
1880 MHz
ACPR
1805 MHz
1840 MHz
1880 MHz
1805 MHz
1840 MHz
1880 MHz
Input Signal PAR = 7.5 dB
@ 0.01% Probability on CCDF
G
ps
1
10
30
P
, OUTPUT POWER (WATTS) AVG.
out
Figure 7. Single
–
-Carrier W
–
-CDMA Power Gain, Power Added
Efficiency and ACPR versus Output Power
35
34
33
Gain
32
31
V
P
= 28 Vdc
= 0 dBm
= I
= I
DD
in
30
29
I
I
= 20 mA
= 70 mA
DQ1A DQ1B
DQ2A DQ2B
1600 1700 1800 1900 2000 2100 2200 2300 2400
f, FREQUENCY (MHz)
Figure 8. Broadband Frequency Response
MD7IC1812NR1 MD7IC1812GNR1
RF Device Data
Freescale Semiconductor, Inc.
7
Table 8. Load Pull Performance — Maximum Power Tuning
V
= 28 Vdc, I
= I
= 12 mA
,
I
= I
= 80 mA
,
Pulsed CW, 10
sec(on), 10% Duty Cycle
DQ2B
DD
DQ1A
DQ1B
DQ2A
Max Output Power
P1dB
(1)
Z
(
)
(%)
AM/PM
(
)
f
Z
Z
(
)
load
D
source
(
)
in
Gain (dB)
(dBm)
(W)
(MHz)
1800
1840
1880
1930
1960
1995
2110
2140
2170
18.6 + j0.84
18.9 – j2.06
19.9 – j5.86
21.2 – j6.08
21.3 – j7.19
23.3 – j9.53
16.2 + j0.01
16.2 – j1.24
16.1 – j2.79
21.6 – j14.9
22.0 – j13.4
22.3 – j11.4
21.2 – j8.50
20.7 – j7.35
19.9 – j6.74
16.6 + j0.14
16.9 + j2.33
17.2 + j4.75
9.75 – j4.18
9.94 – j4.69
9.53 – j5.22
9.13 – j5.50
9.42 – j5.43
9.23 – j5.43
9.12 – j5.48
9.27 – j5.44
9.44 – j5.76
26.4
40.8
12
59.9
59.8
59.6
59.5
58.5
58.1
57.6
57.5
56.8
–5
–4
–3
–3
–3
–3
–4
–4
–4
25.5
24.7
24.3
23.9
23.8
24.5
24.6
24.9
40.8
40.8
40.9
40.8
40.8
40.8
40.8
40.8
12
12
12
12
12
12
12
12
Max Output Power
P3dB
(2)
Z
(
)
(%)
AM/PM
(
)
f
Z
Z
(
)
load
D
source
(
)
in
Gain (dB)
(dBm)
(W)
(MHz)
1800
1840
1880
1930
1960
1995
2110
2140
2170
18.6 + j0.84
22.8 – j15.9
10.8 – j4.58
10.9 – j5.19
10.4 – j5.78
9.13 – j5.50
9.42 – j5.43
9.23 – j5.43
9.12 – j5.48
9.27 – j5.44
9.44 – j5.76
24.1
41.5
14
60.9
60.6
60.2
59.5
58.5
58.1
57.6
57.5
56.8
–6
–5
–5
–3
–3
–3
–4
–4
–4
18.9 – j2.06
19.9 – j5.86
21.2 – j6.08
21.3 – j7.19
23.3 – j9.53
16.2 + j0.01
16.2 – j1.24
16.1 – j2.79
22.7 – j14.6
22.6 – j12.7
21.2 – j8.50
20.7 – j7.35
19.9 – j6.74
16.6 + j0.14
16.9 + j2.33
17.2 + j4.75
23.2
22.4
24.3
23.9
23.8
24.5
24.6
24.9
41.6
41.6
40.9
40.8
40.8
40.8
40.8
40.8
14
14
12
12
12
12
12
12
(1) Load impedance for optimum P1dB power.
(2) Load impedance for optimum P3dB power.
Z
Z
Z
= Measured
impedance presented to the input of the device at the package reference plane.
= Impedance
as measured from gate contact to ground.
= Measured
impedance presented to the output of the device at the package reference plane.
source
in
load
Note: Measurement made on a per side basis.
Input Load Pull
Tuner and Test
Circuit
Output Load Pull
Tuner and Test
Circuit
Device
Under
Test
Z
Z
in
Z
load
source
MD7IC1812NR1 MD7IC1812GNR1
RF Device Data
Freescale Semiconductor, Inc.
8
Table 9. Load Pull Performance — Maximum Drain Efficiency Tuning
V
= 28 Vdc, I
= I
= 12 mA
,
I
= I
= 80 mA
,
Pulsed CW, 10
sec(on), 10% Duty Cycle
DQ2B
DD
DQ1A
DQ1B
DQ2A
Max Drain Efficiency
P1dB
(1)
Z
(
)
(%)
AM/PM
(
)
f
Z
Z
(
)
load
D
source
(
)
in
Gain (dB)
27.8
(dBm)
39.2
(W)
8
(MHz)
1800
1840
1880
1930
1960
1995
2110
2140
2170
18.6 + j0.84
18.9 – j2.06
19.9 – j5.86
21.2 – j6.08
21.3 – j7.19
23.3 – j9.53
16.2 + j0.01
16.2 – j1.24
16.1 – j2.79
21.8 – j10.1
22.5 – j9.13
23.1 – j7.30
22.4 – j5.16
22.0 – j4.53
21.7 – j3.81
18.8 + j2.28
18.1 + j3.56
18.9 + j6.77
5.59 – j0.05
5.29 – j1.05
5.08 – j1.75
4.95 – j2.29
5.22 – j2.57
5.26 – j2.76
4.73 – j3.36
4.67 – j3.68
5.18 – j3.92
68.3
67.6
67.4
67.0
66.5
65.4
64.3
64.2
63.3
–9
–9
26.9
39.2
8
26.1
25.7
25.3
25.1
25.8
26.1
26.4
39.3
39.4
39.6
39.6
39.5
39.5
39.7
8
9
9
9
9
9
9
–9
–9
–8
–8
–9
–10
–10
Max Drain Efficiency
P3dB
(2)
Z
(
)
(%)
AM/PM
(
)
f
Z
Z
(
)
load
D
source
(
)
in
Gain (dB)
25.6
(dBm)
40.2
(W)
11
(MHz)
1800
1840
1880
1930
1960
1995
2110
2140
2170
18.6 + j0.84
22.7 – j12.6
6.21 – j0.66
5.87 – j1.57
5.27 – j1.95
4.95 – j2.29
5.22 – j2.57
5.26 – j2.76
4.73 – j3.36
4.67 – j3.68
5.18 – j3.92
69.5
68.7
68.0
67.0
66.5
65.4
64.3
64.2
63.3
–10
–10
–11
–9
18.9 – j2.06
19.9 – j5.86
21.2 – j6.08
21.3 – j7.19
23.3 – j9.53
16.2 + j0.01
16.2 – j1.24
16.1 – j2.79
23.1 – j11.5
23.6 – j9.16
22.4 – j5.16
22.0 – j4.53
21.7 – j3.81
18.8 + j2.28
18.1 + j3.56
18.9 + j6.77
24.8
40.2
11
24.1
25.7
25.3
25.1
25.8
26.1
26.4
40.0
39.4
39.6
39.6
39.5
39.5
39.7
10
9
9
–8
9
–8
9
–9
9
–10
–10
9
(1) Load impedance for optimum P1dB efficiency.
(2) Load impedance for optimum P3dB efficiency.
Z
Z
Z
= Measured
impedance presented to the input of the device at the package reference plane.
= Impedance
as measured from gate contact to ground.
= Measured
impedance presented to the output of the device at the package reference plane.
source
in
load
Note: Measurement made on a per side basis.
Input Load Pull
Tuner and Test
Circuit
Output Load Pull
Tuner and Test
Circuit
Device
Under
Test
Z
Z
in
Z
load
source
MD7IC1812NR1 MD7IC1812GNR1
RF Device Data
Freescale Semiconductor, Inc.
9
V
GG1A
V
DD1A
C31
C23
R2
C24
C25
R1
C1
C32
MD7IC Dual Path
Rev. 2
C2
C17
C19
C29
C36
C35
R6
C13
C14
C6
C8
C9
C10
C21
C5
C7
C15
C16
Z2
Z1
C11
C12
R5
C22
C37
C38
D44014
C20
C30
R3
C3
C18
R4
C28
C27
C34
C4
C26
C33
V
GG1B
Figure 9. MD7IC1812NR1 Test Circuit Component Layout — 1930–2170 MHz
Table 10. MD7IC1812NR1 Test Circuit Component Designations and Values — 1930–2170 MHz
Part
Description
Part Number
Manufacturer
ATC
C1, C2, C3, C4
C5, C7
3.3 pF Chip Capacitors
ATC600F3R3BT250XT
ATC600F2R0BT250XT
2.0 pF Chip Capacitors
1.5 pF Chip Capacitors
0.6 pF Chip Capacitors
0.8 pF Chip Capacitors
1.2 pF Chip Capacitors
10 pF Chip Capacitors
5.6 pF Chip Capacitors
10
F Chip Capacitors
ATC
ATC
ATC
ATC
ATC
ATC
ATC
C6, C8
ATC600F1R5BT250XT
ATC600F0R6BT250XT
ATC600F0R8BT250XT
ATC600F1R2BT250XT
ATC600F10RBT250XT
ATC600F5R6BT250XT
C9, C10, C11, C12
C13, C14
C15, C16
C17, C18, C19, C20
C21, C22
C23, C24, C25, C26, C27, C28,
C29, C30, C31, C32, C33, C34
C5750X7S2A106M230KB TDK
C35, C36, C37, C38
R1, R2, R3, R4
R5, R6
22 nF Chip Capacitors
GRM31BR72E223KW01L Murata
2 K
, 1/4 W Chip Resistors
CRCW12062K00FKEA
375375
–
–
6X50
–
–
2
X3C21P1-03S
D44014
Vishay
Anaren
Anaren
MTL
50
, 20 W
T
e
rmination
Z1, Z2
1800–2300 MHz Band, 90
, 3 dB Hybrid Couplers
PCB
Rogers RO4350B, 0.020
,
= 3.66
r
MD7IC1812NR1 MD7IC1812GNR1
RF Device Data
Freescale Semiconductor, Inc.
10
TYPICAL CHARACTERISTICS — 1930–2170 MHz
16
32.9
32.8
32.7
32.6
32.5
32.4
32.3
32.2
32.1
32
V
= 28 Vdc, P
= 1.3 W (Avg.), I
= I
= 20 mA
DD
out
DQ1A DQ1B
15.5
15
I
= I
= 70 mA, Single
–
–
Carrier W
–
–
CDMA
DQ2A DQ2B
3.84 MHz Channel Bandwidth, Input Signal
PAR = 7.5 dB @ 0.01% Probability on CCDF
14.5
14
PAE
0
–50.5
–51
G
ps
–0.05
–0.1
–0.15
–0.2
–0.25
PARC
–51.5
–52
–52.5
ACPR
31.9
1890
–53
1930 1970 2010
2050 2090 2130 2170
2210
f, FREQUENCY (MHz)
Figure 10. Single
–
-Carrier Output Peak
–
-to
–
-Average Ratio Compression
(PARC) Broadband Performance @ P
out
= 1.3 Watts Avg.
60
50
40
30
20
10
0
36
34
32
30
28
26
24
0
V
= 28 Vdc, I
= I
= 20 mA
DD
DQ1A DQ1B
I
= I
= 70 mA, Single
–
–
Carrier W
–
–
CDMA
DQ2A DQ2B
— 1 0
— 2 0
— 3 0
— 4 0
— 5 0
— 6 0
3.84 MHz Channel Bandwidth
PAE
2200 MHz
ACPR
2000 MHz
1900 MHz
2000 MHz
1900 MHz
G
ps
2200 MHz
2000 MHz
2200 MHz
Input Signal PAR = 7.5 dB
@ 0.01% Probability on CCDF
1900 MHz
1
10
30
P
, OUTPUT POWER (WATTS) AVG.
out
Figure 11. Single
–
-Carrier W
–
-CDMA Power Gain, Power Added
Efficiency and ACPR versus Output Power
39
36
Gain
33
30
V
P
= 28 Vdc
= 0 dBm
= I
= I
27
24
21
DD
in
I
I
= 20 mA
= 70 mA
DQ1A DQ1B
DQ2A DQ2B
1450 1600 1750 1900 2050 2200 2350 2500 2650
f, FREQUENCY (MHz)
Figure 12. Broadband Frequency Response
MD7IC1812NR1 MD7IC1812GNR1
RF Device Data
Freescale Semiconductor, Inc.
11
PACKAGE DIMENSIONS
MD7IC1812NR1 MD7IC1812GNR1
RF Device Data
Freescale Semiconductor, Inc.
12
MD7IC1812NR1 MD7IC1812GNR1
RF Device Data
Freescale Semiconductor, Inc.
13
MD7IC1812NR1 MD7IC1812GNR1
RF Device Data
Freescale Semiconductor, Inc.
14
MD7IC1812NR1 MD7IC1812GNR1
RF Device Data
Freescale Semiconductor, Inc.
15
MD7IC1812NR1 MD7IC1812GNR1
RF Device Data
Freescale Semiconductor, Inc.
16
MD7IC1812NR1 MD7IC1812GNR1
RF Device Data
Freescale Semiconductor, Inc.
17
PRODUCT DOCUMENTATION, SOFTWARE AND TOOLS
Refer to the following resources to aid your design process.
Application Notes
AN1907: Solder Reflow Attach Method for High Power RF Devices in Over
–
–
Molded Plastic Packages
AN1955: Thermal Measurement Methodology of RF Power Amplifiers
AN1987: Quiescent Current Control for the RF Integrated Circuit Device Family
AN3789: Clamping of High Power RF Transistors and RFICs in Over
–
–
Molded Plastic Packages
Engineering Bulletins
EB212: Using Data Sheet Impedances for RF LDMOS Devices
Software
Electromigration MTTF Calculator
RF High Power Model
s2p File
Development Tools
Printed Circuit Boards
To Download Resources Specific to a Given Part Number:
2. Search by part number
3. Click part number link
4. Choose the desired resource from the drop down menu
REVISION HISTORY
The following table summarizes revisions to this document.
Revision
Date
Description
0
May 2015
Initial Release of Data Sheet
MD7IC1812NR1 MD7IC1812GNR1
RF Device Data
Freescale Semiconductor, Inc.
18
Information in this document is provided solely to enable system and software
implementers to use Freescale products. There are no express or implied copyright
licenses granted hereunder to design or fabricate any integrated circuits based on the
information in this document.
How to Reach Us:
Home Page:
freescale.com
Web Support:
freescale.com/support
Freescale reserves the right to make changes without further notice to any products
herein. Freescale makes no warranty, representation, or guarantee regarding the
suitability of its products for any particular purpose, nor does Freescale assume any
liability arising out of the application or use of any product or circuit, and specifically
disclaims any and all liability, including without limitation consequential or incidental
damages. “Typical” parameters that may be provided in Freescale data sheets and/or
specifications can and do vary in different applications, and actual performance may
vary over time. All operating parameters, including “typicals,” must be validated for
each customer application by customer’s technical experts. Freescale does not convey
any license under its patent rights nor the rights of others. Freescale sells products
pursuant to standard terms and conditions of sale, which can be found at the following
address: freescale.com/Sales
T
e
rmsandConditions.
Freescale and the Freescale logo are trademarks of Freescale Semiconductor, Inc.,
Reg. U.S. Pat. & Tm. Off. All other product or service names are the property of their
respective owners.
E
2015 Freescale Semiconductor, Inc.
Document Number: MD7IC1812N
Rev. 0, 5/2015
Mouser Electronics
Authorized Distributor
Click to View Pricing, Inventory, Delivery & Lifecycle Information:
NXP
:
