NXP-Semicon-MD7IC2050NBR1
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Document Number: MD7IC2050N
Rev. 1, 5/2010
Freescale Semiconductor
T
e
chnical Data
RF LDMOS Wideband Integrated
Power Amplifiers
The MD7IC2050N wideband integrated circuit is designed with on- chip
matching that makes it usable from 1750- 2050 MHz. This multi- stage
structure is rated for 26 to 32 Volt operation and covers all typical cellular
base station modulation formats.
MD7IC2050NR1
MD7IC2050GNR1
MD7IC2050NBR1
•
Typical Doherty Single-Carrier W-CDMA Performance: V
DD
= 28 Volts,
I
DQ1A
= I
DQ1B
= 30 mA, I
DQ2A
= 230 mA, V
GS2B
= 1.4 Vdc, P
out
= 10 Watts
Avg., IQ Magnitude Clipping, Channel Bandwidth = 3.84 MHz, Input Signal
PAR = 9.9 dB @ 0.01% Probability on CCD
F
.
1880-2100 MHz,
10 W AVG., 28 V
SINGLE W-CDMA
RF LDMOS WIDEBAND
INTEGRATED POWER AMPLIFIERS
G
(dB)
PAE
(%)
Output PAR
(dB)
ACPR
(dBc)
ps
Frequency
2025 MHz
30.5
34.7
8.7
-37.4
•
Capable of Handling 5:1 VSWR, @ 32 Vdc, 2017.5 MHz, 79 Watts CW
Output Power (3 dB Input Overdrive from Rated P
out
CASE 1618-02
TO-270 WB-14
PLASTIC
)
•
Stable into a 5:1 VSWR. All Spurs Below -60 dBc @ 20 Watts to 80 Watts
CW P
out
MD7IC2050NR1
•
Typical P
out
@ 3 dB Compression Point
]
74 Watts CW
1880 MHz
CASE 1621-02
TO-270 WB-14 GULL
PLASTIC
•
Typical Doherty Single-Carrier W-CDMA Performance: V
DD
= 28 Volts,
I
DQ1A
= I
DQ1B
= 30 mA, I
DQ2A
= 230 mA, V
GS2B
= 1.4 Vdc, P
out
= 10 Watts
Avg., IQ Magnitude Clipping, Channel Bandwidth = 3.84 MHz, Input Signal
PAR = 9.9 dB @ 0.01% Probability on CCD
F
.
MD7IC2050GNR1
G
PAE
(%)
Output PAR
(dB)
ACPR
(dBc)
ps
Frequency
1880 MHz
1900 MHz
1920 MHz
(dB)
30.3
30.2
30.1
35.2
34.9
34.8
8.6
8.6
8.7
-34.9
-36.3
-36.9
CASE 1617-02
TO-272 WB-14
PLASTIC
Features
MD7IC2050NBR1
•
100% PAR
T
e
sted for Guaranteed Output Power Capability
•
Production
T
e
sted in a Symmetrical Doherty Configuration
•
Characterized with Series Equivalent Large-Signal Impedance Parameters
and Common Source S-Parameters
•
On-Chip Matching (50 Ohm Input, DC Blocked)
•
Integrated Quiescent Current
T
e
mperature Compensation with
Enable/Disable Function
(1)
•
Integrated ESD Protection
•
225
°
C Capable Plastic Package
•
RoHS Compliant
•
In
T
a
pe and Reel. R1 Suffix = 500 Units per 44 mm, 13 inch Reel
ꢀꢁ1. Refer
to AN1977,
Quiescent Current Thermal Tracking Circuit in the RF Integrated Circuit Family
and to AN1987,
Quiescent Current Control
for the RF Integrated Circuit Device Family
. Go to http://www.freescale.com/rf. Select Documentation/Application Notes – AN1977 or AN1987.
©
Freescale Semiconductor, Inc., 2009-2010. All rights reserved.
V
DS1A
(2)
CARRIER
RF /V
V
V
1
2
DS1A
GS2A
RF
inA
out1 DS2A
14
13
V
RF
3
4
5
6
7
8
9
10
11
12
GS1A
RF /V
out1 DS2A
inA
NC
NC
NC
NC
V
V
GS1A
Quiescent Current
Temperature Compensation
(1)
(1)
GS2A
RF
RF /V
out2 DS2B
inB
V
V
GS1B
Quiescent Current
Temperature Compensation
V
GS1B
V
GS2B
GS2B
V
DS1B
(2)
PEAKING
RF /V
(
T
o
p View)
RF
inB
out2 DS2B
Note: Exposed
backside of the package is
the source terminal for the transistors.
V
DS1B
Figure 1. Functional Block Diagram
Figure 2. Pin Connections
ꢀꢁ1. Refer
to AN1977,
Quiescent Current Thermal Tracking Circuit in the RF Integrated Circuit Family
and to AN1987,
Quiescent Current Control
for the RF Integrated Circuit Device Family
. Go to http://www.freescale.com/rf. Select Documentation/Application Notes – AN1977 or AN1987.
ꢁꢀ2. Peaking
and Carrier orientation is determined by the test fixture design.
Table 1. Maximum Ratings
Rating
Symbol
Value
-0.5, +65
-0.5, +10
32, +0
Unit
Vdc
Vdc
Vdc
°
C
Drain-Source Voltage
Gate-Source Voltage
Operating Voltage
V
DSS
V
GS
DD
V
Storage
T
e
mperature Range
Case Operating
T
e
mperature
Operating Junction
T
e
mperature
Input Power
T
stg
-ꢂ65 to +150
150
T
°
C
C
(1,2)
T
225
°
C
J
P
in
28
dBm
Table 2. Thermal Characteristics
(2,3)
Characteristic
Symbol
Value
Unit
Final Doherty Application
Thermal Resistance, Junction to Case
R
θ
JC
°
C/W
Case
T
e
mperature 81
°
C, P
= 50 W CW
out
Stage 1A, 28 Vdc, I
Stage 1B, 28 Vdc, I
Stage 2A, 28 Vdc, I
= 30 mA
= 30 mA
= 230 mA
= 1.4 Vdc
8.2
8.2
1.8
1.8
DQ1A
DQ1B
DQ2A
Stage 2B, 28 Vdc, V
GS2B
Case
T
e
mperature 73
°
C, P
= 10 W CW
out
Stage 1A, 28 Vdc, I
Stage 1B, 28 Vdc, I
Stage 2A, 28 Vdc, I
= 30 mA
= 30 mA
= 230 mA
= 1.4 Vdc
8.3
8.3
1.9
1.9
DQ1A
DQ1B
DQ2A
Stage 2B, 28 Vdc, V
GS2B
ꢀꢁ1. Continuous
use at maximum temperature will affect MTT
F
.
ꢁꢀ2. MTTF
calculator available at http://www.freescale.com/rf. Select Software &
T
o
ols/Development
T
o
ols/Calculators to access MTTF
calculators by product.
ꢁꢀ3. Refer
to AN1955,
Thermal Measurement Methodology of RF Power Amplifiers.
Go to http://www.freescale.com/rf.
Select Documentation/Application Notes – AN1955.
MD7IC2050NR1 MD7IC2050GNR1 MD7IC2050NBR1
RF Device Data
Freescale Semiconductor
2
Table 3. ESD Protection Characteristics
Test Methodology
Class
Human Body Model (per
JESD22-A114)
Machine Model (per
EIA/JESD22-A115)
Charge Device Model (per
JESD22-C101)
Table 4. Moisture Sensitivity Level
Test Methodology
0 (Minimum)
A (Minimum)
II (Minimum)
Rating
Package Peak Temperature
Unit
Per JESD22-A113, IPC/JEDEC J-STD-020
3
260
°
C
Table 5. Electrical Characteristics
(T =
25
°
C unless otherwise noted)
A
Characteristic
Symbol
Min
Typ
Max
Unit
(1)
Stage 1 – Off Characteristics
Zero Gate Voltage Drain Leakage Current
(V =
65 Vdc, V
= 0 Vdc)
I
I
I
—
—
—
—
—
—
10
1
μ
Adc
μ
Adc
μ
Adc
DSS
DSS
DS
GS
Zero Gate Voltage Drain Leakage Current
(V =
28 Vdc, V
= 0 Vdc)
DS
GS
Gate-Source Leakage Current
(V =
1.5 Vdc, V
= 0 Vdc)
1
GSS
GS
DS
(1)
Stage 1 – On Characteristics
Gate Threshold Voltage
(V =
10 Vdc, I
= 23
μ
Adc)
V
1.2
—
1.9
3
2.7
—
Vdc
Vdc
Vdc
GS(th)
DS
D
Gate Quiescent Voltage
(V =
28 Vdc, I
V
GS(Q)
= I
= 30 mAdc)
DQ1B
DS
DQ1A
Fixture Gate Quiescent Voltage
= I
V
GG(Q)
4.1
5.5
7.1
(V =
28 Vdc, I
DD
= 30 mAdc, Measured in Functional
T
e
st)
DQ1A
DQ1B
(1)
Stage 2 – Off Characteristics
Zero Gate Voltage Drain Leakage Current
(V =
65 Vdc, V
= 0 Vdc)
I
—
—
—
—
—
—
10
1
μ
Adc
μ
Adc
μ
Adc
DSS
DSS
GSS
DS
GS
Zero Gate Voltage Drain Leakage Current
(V =
28 Vdc, V
= 0 Vdc)
I
DS
GS
Gate-Source Leakage Current
(V =
1.5 Vdc, V
= 0 Vdc)
I
1
GS
DS
(1)
Stage 2 – On Characteristics
Gate Threshold Voltage
(V =
10 Vdc, I
= 150
μ
Adc)
V
1.2
—
2
2.7
Vdc
Vdc
Vdc
Vdc
GS(th)
DS
D
Gate Quiescent Voltage
(V =
28 Vdc, I
V
3
5.5
—
GS(Q)
GG(Q)
DS(on)
= 230 mAdc)
DQ2A
DS
Fixture Gate Quiescent Voltage
(V =
28 Vdc, I
= 230 mAdc, Measured in Functional
T
e
st)
V
4.1
0.1
= I
7.1
DD
DQ2A
Drain-Source On-Voltage
(V =
10 Vdc, I
= 1 Adc)
V
0.3
1.2
GS
D
(2,3,4)
Functional Tests
(In Freescale Doherty
T
e
st Fixture, 50 ohm system) V
= 28 Vdc, I
DD
= 30 mA, I
= 230 mA,
DQ2A
DQ1A
DQ1B
V
= 1.4 Vdc, P
= 10 W Avg., f = 2025 MHz, Single-Carrier W-CDMA, IQ Magnitude Clipping, Input Signal PAR = 9.9 dB @ 0.01%
out
Probability on CCD
F
.
A
CPR measured in 3.84 MHz Channel Bandwidth @
5 MHz Offset.
GS2B
Power Gain
G
28.5
32.0
8.0
30.5
34.7
8.7
33.0
—
dB
%
ps
Power Added Efficiency
PAE
PAR
Output Peak-to-Average
Ratio @ 0.01% Probability on CCDF
Adjacent Channel Power Ratio
—
dB
dBc
ACPR
—
-37.4
-34.0
ꢀꢁ1. Each
side of device measured separately.
ꢁꢀ2. Part
internally matched both on input and output.
ꢁꢀ3. Measurement
made with device in a Symmetrical Doherty configuration.
ꢁꢀ4. Measurement
made with device in straight lead configuration before any lead forming operation is applied.
(continued)
MD7IC2050NR1 MD7IC2050GNR1 MD7IC2050NBR1
RF Device Data
Freescale Semiconductor
3
Table 5. Electrical Characteristics
(T =
25
°
C unless otherwise noted)
(continued)
A
Characteristic
Symbol
Min
Typ
= 30 mA, I
Max
Unit
= 230 mA,
(1)
Typical Performances
(In Freescale Doherty
T
e
st Fixture, 50 ohm system) V
= 28 Vdc, I
DD
= I
DQ1B
DQ1A
DQ2A
V
= 1.4 Vdc, 2010-2025
MHz Bandwidth
@ 1 dB Compression Point, CW
@ 3 dB Compression Point, CW
GS2B
P
P1dB
P3dB
—
—
60
74
—
—
W
W
out
out
P
IMD Symmetry @ 30 W PE
P
, P
w
here IMD Third Order
out
IMD
MHz
sym
—
55
—
Intermodulation
`
30 dBc
(Delta IMD Third Order Intermodulation between Upper and Lower
Sidebands > 2 dB)
VBW Resonance Point
(IMD Third Order Intermodulation Inflection Point)
VBW
—
—
70
—
—
MHz
%
res
Quiescent Current Accuracy over
T
e
mperature
with 4.7 k
Ω
Gate Feed Resistors (-30 to 85
°
C)
Δ
I
QT
2.64
(2)
Gain Flatness in 15 MHz Bandwidth @ P
= 10 W Avg.
out
G
—
—
0.1
—
—
dB
F
Gain Variation over
T
e
mperature
(-30
°
C to +85
°
C)
Δ
G
0.033
dB/
°
C
Output Power Variation over
T
e
mperature
(-30
°
C to +85
°
C)
Δ
P1dB
—
0.008
—
dBm/
°
C
Typical W-CDMA Broadband Performance — 1880 MHz
(In Freescale
T
e
st Fixture, 50 ohm system) V
= 28 Vdc, I
= I
DQ1B
=
= 1.4 Vdc, P
= 10 W Avg., Single-Carrier W-CDMA, IQ Magnitude Clipping, Input Signal PAR = 9.9 dB @
DD
DQ1A
30 mA, I
= 230 mA, V
DQ2A GS2B out
0.01% Probability on CCD
F
.
A
CPR measured in 3.84 MHz Channel Bandwidth @
5 MHz Offset.
G
PAE
(%)
Output PAR
(dB)
ACPR
(dBc)
IRL
(dB)
ps
Frequency
1880 MHz
1900 MHz
1920 MHz
(dB)
30.3
30.2
30.1
35.2
34.9
34.8
8.6
8.6
8.7
-34.9
-36.3
-36.9
-21
-21
-22
ꢀꢁ1. Measurement
made with device in a Symmetrical Doherty configuration.
ꢁꢀ2. Refer
to AN1977,
Quiescent Current Thermal Tracking Circuit in the RF Integrated Circuit Family
and to AN1987,
Quiescent Current Control
for the RF Integrated Circuit Device Family
. Go to http://www.freescale.com/rf.Select Documentation/Application Notes – AN1977 or
AN1987.
MD7IC2050NR1 MD7IC2050GNR1 MD7IC2050NBR1
RF Device Data
Freescale Semiconductor
4
V
GS1A
V
GS2A
V
DS1A
C7
V
DS2A
C1
C9
R2
C15
R1
C3
C4
C11
C17
C18
Z1
C13
C
P
R5
C14
C20
C19
C12
C21
C5
C6
R3
C16
C10
MD7IC2050N
Rev. 1
R4
C8
C2
V
DS2B
V
GS1B
V
GS2B
V
DS1B
Figure 3. MD7IC2050NR1(GNR1)(NBR1) Test Circuit Component Layout
Table 6. MD7IC2050NR1(GNR1)(NBR1) Test Circuit Component Designations and Values
Part
Description
10
μ
F
,
5
0 V Chip Capacitors
4.7 pF Chip Capacitors
Part Number
GRM55DR61H106KA88L
ATC600F4R7BT250XT
ATC600F5R6BT250XT
ATC600F390JT250XT
GRM31CR71H475KA12L
ATC600F1R0BT250XT
CRCW12064701KEA
RK73B2BTTD510J
GSC351-HYB1900
RF-35
Manufacturer
C1, C2, C3, C4, C5, C6
Murata
C7, C8
ATC
C9, C10
5.6 pF Chip Capacitors
ATC
C11, C12, C13, C14
39 pF Chip Capacitors
ATC
C15, C16, C17, C18, C19, C20
4.7
μ
F
,
5
0 V Chip Capacitors
1.0 pF Chip Capacitor
Murata
ATC
C21
R1, R2, R3, R4
4.7 k
Ω
, 1/4 W Chip Resistors
50
Ω
, 1/4 W Thick Film Chip Resistor
1900 MHz Band 90
°
, 3 dB Hybrid Coupler
Vishay
KOA Speer
Soshin
T
a
conic
R5
Z1
PCB
0.020
″
,
ε
= 3.5
r
MD7IC2050NR1 MD7IC2050GNR1 MD7IC2050NBR1
RF Device Data
Freescale Semiconductor
5
Single-ended
l
4
Quadrature combined
l
4
l
4
Doherty
l
l
2
Push-pull
2
Figure 4.
Possible Circuit Topologies
MD7IC2050NR1 MD7IC2050GNR1 MD7IC2050NBR1
RF Device Data
Freescale Semiconductor
6
TYPICAL CHARACTERISTICS
30.8
30.7
30.6
30.5
30.4
30.3
30.2
30.1
30
35
PAE
34
33
ꢀꢀV
(Avg.)
= 28 Vdc, P
= 10 W
out
DD
32
I
= I
= 30 mA, I
= 230 mA
= 1.4 Vdc, Single- Carrier
W-CDMA
31
DQ1A DQ1B
DQ2A
G
ps
V
GS2B
-29
-31
-33
-35
-37
-39
-0.4
-0.8
-18
-19
-20
-21
-22
-23
3.84 MHz Channel Bandwidth
Input Signal PAR = 9.9 dB @
0.01% Probability on CCDF
IRL
-1.2
-1.6
-2
29.9
29.8
PARC
ACPR
-2.4
1880 1900 1920
1940 1960 1980 2000 2020
2040
f, FREQUENCY (MHz)
Figure 5. Output Peak-to-Average Ratio Compression (PARC)
Broadband Performance @ P
out
= 10 Watts Avg.
-1 0
V
= 28 Vdc, P
= 30 W (PEP), I
out
= 230 mA, V
= I
= 30 mA
= 1.4 Vdc, Two-Tone Measurements
DD
DQ1A DQ1B
I
DQ2A
(f1 + f2)/2 = Center Frequency of 2017.5 MHz
GS2B
-2 0
-3 0
-4 0
-50
IM3-U
IM3-L
IM5-U
IM5-L
IM7-L
IM7-U
1
10
100
TWO-T ONE SPACING (MHz)
Figure 6. Intermodulation Distortion Products
versus Two-
T
o
ne Spacing
-30
31
30.5
30
1
0
48
G
ps
43
-32
-34
-36
-38
-40
-42
-1 dB = 10.41 W
-1
-2
38
33
28
23
18
-2 dB
= 13.56 W
V
I
= 28 Vdc
= I
DD
= 30 mA
29.5
29
DQ1A DQ1B
I
= 230 mA
= 1.4 Vdc
f = 2017.5 MHz
DQ2A
PAE
ACPR
-3 dB = 17.24 W
V
GS2B
-3
-4
28.5
28
PARC
Single-Carrier W-CDMA, 3.84 MHz Channel Bandwidth
Input Signal PAR = 9.9 dB @ 0.01% Probability on CCDF
-5
3
6
9
12
15
18
21
24
27
P ,
OUTPUT POWER (WATTS)
out
Figure 7. Output
Peak-to-Average Ratio
Compression (PARC) versus Output Power
MD7IC2050NR1 MD7IC2050GNR1 MD7IC2050NBR1
RF Device Data
Freescale Semiconductor
7
TYPICAL CHARACTERISTICS
31
100
90
80
70
60
-20
f = 2010 MHz
-22.5
-25
30.5
30
ACPR
PAE
2025 MHz
= 30 mA
DQ1A DQ1B
2017.5 MHz
V
DD
= 28 Vdc, I
= I
-27.5
29.5
29
I
= 230 mA, V
= 1.4 Vdc, Single-Carrier
DQ2A
GS2B
-30
W-CDMA, 3.84 MHz Channel Bandwidth
Input Signal PAR = 9.9 dB @ 0.01%
Probability on CCDF
-32.5
-35
28.5
50
40
30
20
28
27.5
27
2025 MHz
G
-37.5
-40
2017.5 MHz
2010 MHz
ps
2010 MHz
10
0
-42.5
-45
26.5
26
2017.5 MHz
2025 MHz
1
10
100
P ,
OUTPUT POWER (WATTS) AVG.
out
Figure 8. Single-Carrier W-CDMA Power Gain, Power
Added Efficiency and ACPR versus Output Power
35
30
-7
Gain
-14
-21
-28
25
20
15
IRL
-35
-42
-49
V
P
= 28 Vdc
= 0 dBm
DD
in
I
= I
= 30 mA
DQ1A DQ1B
10
5
I
= 230 mA
= 1.4 Vdc
DQ2A
V
GS2B
1450
1650
1850
2050
2250
2450
f, FREQUENCY (MHz)
Figure 9. Broadband Frequency Response
W-CDMA TEST
SIGNAL
100
10
10
0
-10
-20
-30
-40
-50
-60
3.84 MHz
Channel BW
1
Input Signal
0.1
0.01
W-CDMA. ACPR
Measured in 3.84 MHz
Channel Bandwidth @
5 MHz Offset.
Input Signal PAR = 9.9 dB @ 0.01%
Probability on CCDF
+ACPR in 3.84 MHz
Integrated BW
-ACPR in
3.84 MHz
Integrated BW
0.001
-70
-80
0.0001
0
2
4
6
8
10
12
-90
PEAK-T O-
A
V
ERAGE (dB)
-100
Figure 10. CCDF W-CDMA IQ Magnitude
Clipping, Single-Carrier Test Signal
-9 -7.2
-5.4 -3.6 -1.8
0
1.8 3.6
5.4 7.2
9
f, FREQUENCY (MHz)
Figure 11. Single-Carrier W-CDMA Spectrum
MD7IC2050NR1 MD7IC2050GNR1 MD7IC2050NBR1
RF Device Data
Freescale Semiconductor
8
V
DD
= 28 Vdc, I
= I
DQ1A DQB
= 30 mA, I
= 230 mA, V
= 1.4 Vdc, P
= 10 W Avg.
GS2B out
DQ2A
f
Z
W
Z
load
W
in
MHz
1995
2000
2005
2010
2015
2020
2025
2030
2035
60.12 – j33.28
59.30 – j32.57
58.41 – j32.06
57.41 – j31.31
56.31 – j30.27
55.94 – j29.62
55.28 – j28.90
54.75 – j28.12
54.39 – j27.55
11.79 – j6.72
11.78 – j6.78
11.78 – j6.85
11.78 – j6.92
11.79 – j7.00
11.81 – j7.08
11.81 – j7.16
11.84 – j7.24
11.80 – j7.33
Note: Measured with Peaking side open.
Z
=
Device input impedance as measured from
gate to ground.
in
Z
=
T
e
st circuit impedance as measured from
drain to ground.
load
Output
Matching
Network
Device
Under
T
e
st
Z
Z
in
load
Figure 12. Series Equivalent Input and Load Impedance — Carrier Side
V
DD
= 28 Vdc, I
= I
DQ1A DQB
= 30 mA, I
= 230 mA, V
= 1.4 Vdc, P
= 10 W Avg.
GS2B out
DQ2A
f
Z
W
Z
load
W
in
MHz
1995
2000
2005
2010
2015
2020
2025
2030
2035
60.12 – j33.28
59.30 – j32.57
58.41 – j32.06
57.41 – j31.31
56.31 – j30.27
55.94 – j29.62
55.28 – j28.90
54.75 – j28.12
54.39 – j27.55
1.86 – j11.38
1.80 – j11.24
1.71 – j11.12
1.64 – j11.00
1.58 – j10.91
1.51 – j10.78
1.45 – j10.66
1.38 – j10.56
1.33 – j10.40
Note: Measured with Carrier side open.
Z
=
Device input impedance as measured from
gate to ground.
in
Z
=
T
e
st circuit impedance as measured from
drain to ground.
load
Output
Matching
Network
Device
Under
T
e
st
Z
Z
in
load
Figure 13. Series Equivalent Input and Load Impedance — Peaking Side
MD7IC2050NR1 MD7IC2050GNR1 MD7IC2050NBR1
RF Device Data
Freescale Semiconductor
9
ALTERNATIVE PEAK TUNE LOAD PULL CHARACTERISTICS
V
DD
= 28 Vdc, I
= 30 mA, I
= 230 mA
DQ1A
DQ2A
52
50
48
46
44
42
40
38
36
34
32
30
f = 2025 MHz
f = 2025 MHz
Ideal
Actual
f = 2010 MHz
f = 2010 MHz
f = 2025 MHz
f = 2010 MHz
0
2
4
6
8
10
12
14
16
18 20
P ,
INPUT POWER (dBm)
in
Load Pull Test Fixture Tuned for Peak P1dB Output Power @ 28 V
P1dB
Watts
P3dB
Watts
f
(MHz)
dBm
46
dBm
46.9
46.8
2010
2025
40
49
38.9
45.9
47.9
Test Impedances per Compression Level
f
Z
Z
load
source
(MHz)
Ω
Ω
2010
2025
P1dB
P1dB
73.6 + j31.1
68.9 + j26.7
6.8 – j13.7
8.3 – j14.3
Figure 14. CW Output Power versus Input Power @ 28 V
NOTE: Measurement made on the Class AB, carrier side of the device.
MD7IC2050NR1 MD7IC2050GNR1 MD7IC2050NBR1
10
RF Device Data
Freescale Semiconductor
V
GS1A
V
GS2A
V
DS1A
V
DS2A
C7
C1
C15
R2
C9
R1
C3
C4
C11
C17
C18
C13
C14
Z1
C
P
R5
C20
C19
C12
C21
C5
C6
R3
C10
MD7IC2050N
Rev. 1
R4
C8
C16
C2
V
DS2B
V
GS1B
V
GS2B
V
DS1B
Figure 15. MD7IC2050NR1(GNR1)(NBR1) Test Circuit Component Layout — 1880 MHz
Table 7. MD7IC2050NR1(GNR1)(NBR1) Test Circuit Component Designations and Values — 1880 MHz
Part
C1, C2, C3, C4, C5, C6
C7, C8
Description
10
μ
F
,
5
0 V Chip Capacitors
6.8 pF Chip Capacitors
Part Number
GRM55DR61H106KA88L
ATC600F6R8BT250XT
ATC600F150JT250XT
ATC600F330JT250XT
GRM32CF51H685ZA01L
GRM31CR61H225KA88L
ATC600F0R9BT250XT
CRCW12064701FKEA
RK73B2BTTD510J
Manufacturer
Murata
ATC
C9, C10
15 pF Chip Capacitors
ATC
C11, C12, C13, C14
C15, C16
33 pF Chip Capacitors
ATC
6.8
μ
F
,
5
0 V Chip Capacitors
2.2
μ
F
,
C
hip Capacitors
Murata
Murata
ATC
C17, C18, C19, C20
C21
0.9 pF Chip Capacitor
R1, R2, R3, R4
R5
4.7 k
Ω
, 1/4 W Chip Resistors
50
Ω
, 1/4 W Thick Film Chip Resistor
1900 MHz Band 90
°
, 3 dB Hybrid Coupler
Vishay
KOA Speer
Soshin
Rogers
Z1
GSC351-HYB1900
PCB
0.020
″
,
ε
= 3.5
RO4350B
r
MD7IC2050NR1 MD7IC2050GNR1 MD7IC2050NBR1
RF Device Data
Freescale Semiconductor
11
TYPICAL CHARACTERISTICS
30.5
35.5
35.25
35
V
= 28 Vdc, P
= 10 W (Avg.), I
out
= 230 mA, V
= I
= 30 mA
= 1.4 Vdc, Single-Carrier W-CDMA
DD
DQ1A DQ1B
30.45
I
DQ2A
GS2B
30.4
30.35
30.3
PAE
34.75
34.5
-34
3.84 MHz Channel Bandwidth, Input Signal
PAR = 9.9 dB @ 0.01% Probability on CCDF
-1.2
-20.5
-20.9
-21.3
-21.7
-22.1
-22.5
30.25
-34.6
-35.2
-35.8
-36.4
-37
-1.23
IRL
30.2
30.15
30.1
G
ps
-1.26
-1.29
-1.32
-1.35
ACPR
PARC
30.05
30
1880
1890
1900
1910
1920
f, FREQUENCY (MHz)
Figure 16. Output Peak-to-Average Ratio Compression (PARC)
Broadband Performance @ P
out
= 10 Watts Avg. — 1880 MHz
35
30
-16
-18
Gain
-20
-22
25
20
15
10
5
IRL
V
P
= 28 Vdc
= 0 dBm
DD
-24
-26
-28
in
I
= I
= 30 mA
DQ1A DQ1B
I
= 230 mA
= 1.4 Vdc
DQ2A
V
GS2B
1450
1650
1850
2050
2250
2450
f, FREQUENCY (MHz)
Figure 17. Broadband Frequency Response — 1880 MHz
MD7IC2050NR1 MD7IC2050GNR1 MD7IC2050NBR1
12
RF Device Data
Freescale Semiconductor
V
DD
= 28 Vdc, I
= I
DQ1A DQB
= 1.4 Vdc, P
= 10 W Avg.
= 30 mA, I
= 230 mA,
V
DD
= 28 Vdc, I
= I
DQ1A DQB
= 1.4 Vdc, P
= 10 W Avg.
= 30 mA, I
= 230 mA,
DQ2A
DQ2A
V
GS2B
V
out
GS2B out
f
Z
W
Z
f
Z
W
Z
load
W
in
load
W
in
MHz
1725
1750
1775
1800
1825
1850
1875
1900
1925
1950
1975
2000
2025
2050
2075
MHz
1725
1750
1775
1800
1825
1850
1875
1900
1925
1950
1975
2000
2025
2050
2075
24.58 + j28.09
30.62 + j35.84
39.80 + j43.59
53.16 + j51.72
75.48 + j54.32
101.49 + j44.03
127.43 + j11.39
113.52 – j23.46
92.03 – j36.95
74.95 – j38.10
64.95 – j35.67
59.30 – j32.57
55.28 – j28.90
52.85 – j26.07
51.34 – j23.91
13.68 – j7.83
14.09 – j7.95
14.42 – j8.13
14.72 – j8.33
15.02 – j8.57
15.26 – j8.91
15.47 – j9.29
15.59 – j9.67
15.66 – j10.15
15.64 – j10.65
15.59 – j11.22
15.41 – j11.76
15.20 – j12.36
14.84 – j12.97
14.42 – j13.56
24.58 + j28.09
30.62 + j35.84
39.80 + j43.59
53.16 + j51.72
75.48 + j54.32
101.49 + j44.03
127.43 + j11.39
113.52 – j23.46
92.03 – j36.95
74.95 – j38.10
64.95 – j35.67
59.30 – j32.57
55.28 – j28.90
52.85 – j26.07
51.34 – j23.91
4.10 – j18.22
3.61 – j17.55
3.09 – j16.79
2.61 – j16.00
2.31 – j15.22
1.99 – j14.46
1.71 – j13.71
1.47 – j12.96
1.27 – j12.19
1.15 – j11.44
1.04 – j10.70
1.00 – j9.97
0.98 – j9.28
1.05 – j8.57
1.16 – j7.91
Note: Measured with Peaking side open.
Note: Measured with Carrier side open.
Z
=
Device input impedance as measured from
gate to ground.
Z
=
Device input impedance as measured from
gate to ground.
in
in
Z
=
T
e
st circuit impedance as measured from
drain to ground.
Z
=
T
e
st circuit impedance as measured from
drain to ground.
load
load
Output
Matching
Network
Output
Matching
Network
Device
Under
T
e
st
Device
Under
T
e
st
Z
Z
Z
Z
in
load
in
load
Figure 18. Series Equivalent Input and Load
Impedance — Carrier Side — 1880 MHz
Figure 19. Series Equivalent Input and Load
Impedance — Peaking Side — 1880 MHz
MD7IC2050NR1 MD7IC2050GNR1 MD7IC2050NBR1
RF Device Data
Freescale Semiconductor
13
PACKAGE DIMENSIONS
MD7IC2050NR1 MD7IC2050GNR1 MD7IC2050NBR1
14
RF Device Data
Freescale Semiconductor
MD7IC2050NR1 MD7IC2050GNR1 MD7IC2050NBR1
RF Device Data
Freescale Semiconductor
15
MD7IC2050NR1 MD7IC2050GNR1 MD7IC2050NBR1
RF Device Data
Freescale Semiconductor
16
MD7IC2050NR1 MD7IC2050GNR1 MD7IC2050NBR1
RF Device Data
Freescale Semiconductor
17
MD7IC2050NR1 MD7IC2050GNR1 MD7IC2050NBR1
RF Device Data
Freescale Semiconductor
18
MD7IC2050NR1 MD7IC2050GNR1 MD7IC2050NBR1
RF Device Data
Freescale Semiconductor
19
MD7IC2050NR1 MD7IC2050GNR1 MD7IC2050NBR1
RF Device Data
Freescale Semiconductor
20
MD7IC2050NR1 MD7IC2050GNR1 MD7IC2050NBR1
RF Device Data
Freescale Semiconductor
21
MD7IC2050NR1 MD7IC2050GNR1 MD7IC2050NBR1
RF Device Data
Freescale Semiconductor
22
PRODUCT DOCUMENTATION AND SOFTWARE
Refer to the following documents to aid your design process.
Application Notes
•
AN1907: Solder Reflow Attach Method for High Power RF Devices in Plastic Packages
•
AN1955: Thermal Measurement Methodology of RF Power Amplifiers
•
AN1977: Quiescent Current Thermal Tracking Circuit in the RF Integrated Circuit Family
•
AN1987: Quiescent Current Control for the RF Integrated Circuit Device Family
•
AN3263: Bolt Down Mounting Method for High Power RF Transistors and RFICs in Over-Molded Plastic Packages
•
AN3789: Clamping of High Power RF Transistors and RFICs in Over-Molded Plastic Packages
Engineering Bulletins
•
EB212: Using Data Sheet Impedances for RF LDMOS Devices
Software
•
Electromigration MTTF Calculator
•
RF High Power Model
•
.s2p File
T
o
ols tab on the part’s Product Summary page to download the respective tool.
REVISION HISTORY
The following table summarizes revisions to this document.
Revision
Date
Description
0
1
Aug. 2009
May 2010
•
•
Initial Release of Data Sheet
Corrected Thermal Characteristics table values for thermal resistance as follows: 50 W CW I
changed from 1.4 to 1.8
°
C/W; 10 W CW I
changed
DQ1B
changed from 3.6 to
from 6.1 to 8.2
°
C/W and V
GS2B
DQ1B
8.3
°
C/W and V
changed from *Stage 2B is turned off to 1.9
°
C/W. Thermal values now reflect the
GS2B
symmetrical Doherty nature of the device, p. 2
•
•
Changed ESD Human Body Model rating from Class 1B to Class 0 to reflect recent ESD test results of the
device, p. 3
Added RF High Power Model availability to Product Software, p. 23
MD7IC2050NR1 MD7IC2050GNR1 MD7IC2050NBR1
RF Device Data
Freescale Semiconductor
23
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Document Number: MD7IC2050N
R
ev. 1, 5/2010
