NXP-Semicon-PDTD113ZQA147

Important notice  

Dear Customer,  

On 7 February 2017 the former NXP Standard Product business became a new company with the  

tradename

Nexperia

. Nexperia is an industry leading supplier of Discrete, Logic and PowerMOS  

semiconductors with its focus on the automotive, industrial, computing, consumer and wearable  

application markets  

In data sheets and application notes which still contain NXP or Philips Semiconductors references, use  

the references to Nexperia, as shown below.  

use

(email)  

Replace the copyright notice at the bottom of each page or elsewhere in the document, depending on  

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– © NXP N.V. (year). All rights reserved or © Koninklijke Philips Electronics N.V. (year). All rights  

reserved  

Should be replaced with:  

–

© Nexperia B.V. (year). All rights reserved

.  

If you have any questions related to the data sheet, please contact our nearest sales office via e-mail  

or telephone (details via

). Thank you for your cooperation and  

understanding,  

Kind regards,  

Team Nexperia  

PDTD113Z/123Y/143XQA series  

50

V

,

5

00 mA NPN resistor-equipped

 

transistors  

DFN1010D-3  

Rev. 1 — 31 March 2016  

Product data sheet  

1. Product

 

profile  

1.1 General

 

description  

NPN Resistor-Equipped Transistor (RET) family in a leadless ultra small DFN1010D-3  

(SOT1215) Surface-Mounted Device (SMD) plastic package with visible and solderable  

side pads.  

Table 1.  

Product overview  

Type number  

PDTD113ZQA  

PDTD123YQA  

PDTD143XQA  

R1  

R2  

Package NXP  

PNP complement  

PDTB113ZQA  

PDTB123YQA  

PDTB143XQA  

1 k



 

10 k

  

10 k

  

10 k

  

DFN1010D-3  

(SOT1215)  

2.2 k

  

4.7 k

  

1.2 Features

 

and benefits  



500 mA output current capability  



Built-in bias resistors  



Reduced pick and place costs  



Low package height of 0.37 mm  





10% resistor ratio tolerance  



Suitable for Automatic Optical  

Inspection (AOI) of solder joint  



Simplifies circuit design  



AEC-Q101 qualified  



Reduces component count  

1.3 Applications  



Digital applications  



Controlling IC inputs  



Switching loads  



Cost saving alternative for  

BC807/BC817 series in digital  

applications  

1.4 Quick

 

reference data  

Table 2.  

Symbol  

V

CEO  

Quick reference data  

Parameter  

Conditions  

Min  

Typ  

Max  

50  

Unit  

V

collector-emitter voltage  

output current  

open base  

–

–

–

–

I

O  

500  

mA  

PDTD113Z/123Y/143XQA  

NXP Semiconductors  

50 V, 500 mA NPN resistor-equipped

 

transistors  

2. Pinning

 

information  

Table 3.  

Pinning  

Pin  

1

Symbol  

Description  

Simplified outline  

Graphic symbol  

I

input (base)  

O

2

GND  

O

GND (emitter)  

output (collector)  

output (collector)  

1

R1  

I

3

4

3

4

O

R2  

GND  

2

aaa-019964  

Transparent top view  

3. Ordering

 

information  

Table 4.  

Ordering information  

Type number  

Package  

Name  

Description  

Version  

PDTD113ZQA  

PDTD123YQA  

PDTD143XQA  

DFN1010D-3  

plastic thermal enhanced ultra thin small outline

 

SOT1215  

package; no leads; 3 terminals;  

body: 1.1



1.0



0.37 mm  

PDTD113Z_123Y_143XQA_SER  

All information provided in this document is subject to legal disclaimers.  

© NXP Semiconductors N.V. 2016. All rights reserved.  

Product data sheet  

Rev. 1 — 31 March 2016  

2 of 21  

PDTD113Z/123Y/143XQA  

NXP Semiconductors  

50 V, 500 mA NPN resistor-equipped

 

transistors  

4. Marking  

Table 5.  

Marking codes  

Type number  

PDTD113ZQA  

PDTD123YQA  

PDTD143XQA  

Marking code  

01 11 11  

10 00 11  

01 10 01  

4.1 Binary

 

marking code description  

READING  

DIRECTION  

MARKING CODE  

(EXAMPLE)  

YEAR DATE  

CODE  

VENDOR CODE  

PIN 1  

INDICATION MARK  

MARK-FREE AREA  

READING EXAMPLE:  

11  

01  

10  

aaa-008041  

Fig 1.

 

SOT1215 binary marking code description  

5. Limiting

 

values  

Table 6.  

Limiting values  

In accordance with the Absolute Maximum Rating System (IEC 60134).  

Symbol  

V

CBO  

Parameter  

Conditions  

open emitter  

open base  

Min  

Max  

50  

Unit  

V

collector-base voltage  

collector-emitter voltage  

emitter-base voltage  

PDTD113ZQA  

–

–

V

CEO  

50  

V

V

EBO  

open collector  

–

–

–

5

5

7

V

V

V

PDTD123YQA  

PDTD143XQA  

PDTD113Z_123Y_143XQA_SER  

All information provided in this document is subject to legal disclaimers.  

© NXP Semiconductors N.V. 2016. All rights reserved.  

Product data sheet  

Rev. 1 — 31 March 2016  

3 of 21  

PDTD113Z/123Y/143XQA  

NXP Semiconductors  

50 V, 500 mA NPN resistor-equipped

 

transistors  

Table 6.  

Limiting values

…continued  

In accordance with the Absolute Maximum Rating System (IEC 60134).  

Symbol  

Parameter  

Conditions  

Min  

Max  

Unit  

V

I  

input voltage  

PDTD113ZQA  

PDTD123YQA  

PDTD143XQA  

output current  

total power dissipation  



5  

+10  

+12  

+30  

500  

325  

575  

525  

940  

150  

+150  

+150  

V



5  

V



7  

V

I

O  

–

mA  

mW  

mW  

mW  

mW  



C  

[1]  

[2]  

[3]  

[4]  

P

tot  

T

amb



25



C  

–

–

–

–

T

j  

junction temperature  

ambient temperature  

storage temperature  

–

T

amb  

T

stg  



55  



65  



C  



C  

[1] Device

 

mounted on an FR4 Printed-Circuit Board (PCB), single-sided copper, tin-plated and standard  

footprint.  

[2] Device

 

mounted on an FR4 PCB, single-sided copper, tin-plated; mounting pad for collector 1 cm

2

.  

[3] Device

 

mounted on an FR4 PCB, 4-layer copper, tin-plated and standard footprint.  

[4] Device

 

mounted on an FR4 PCB, 4-layer copper, tin-plated; mounting pad for collector 1 cm

2

.  

aaa-020051  

1

(1)  

P

tot  

(W)  

0.8  

0.6  

0.4  

0.2  

0

(2)  

(3)  

(4)  

-75  

-25  

25  

75  

125  

175  

(ºC)  

T

amb  

(1) FR4

 

PCB, 4-layer copper, 1 cm

2  

(2) FR4

 

PCB, single-sided copper, 1 cm

2  

(3) FR4

 

PCB, 4-layer copper, standard footprint  

(4) FR4

 

PCB, single sided copper, standard footprint  

Fig 2.

 

Power derating curves  

PDTD113Z_123Y_143XQA_SER  

All information provided in this document is subject to legal disclaimers.  

© NXP Semiconductors N.V. 2016. All rights reserved.  

Product data sheet  

Rev. 1 — 31 March 2016  

4 of 21  

PDTD113Z/123Y/143XQA  

NXP Semiconductors  

50 V, 500 mA NPN resistor-equipped

 

transistors  

6. Thermal

 

characteristics  

Table 7.  

Symbol  

R

th(j-a)  

Thermal characteristics  

Parameter  

Conditions  

Min  

Typ  

Max  

385  

218  

239  

133  

40  

Unit  

K/W  

K/W  

K/W  

K/W  

K/W  

[1]  

[2]  

[3]  

[4]  

thermal resistance from junction

 

in free air  

to ambient  

–

–

–

–

–

–

–

–

–

–

R

th(j-sp)  

thermal resistance from junction  

to solder point  

[1] Device

 

mounted on an FR4 Printed-Circuit Board (PCB), single-sided copper, tin-plated and standard footprint.  

[2] Device

 

mounted on an FR4 PCB, single-sided copper, tin-plated; mounting pad for collector 1 cm

2

.  

[3] Device

 

mounted on an FR4 PCB, 4-layer copper, tin-plated and standard footprint.  

[4] Device

 

mounted on an FR4 PCB, 4-layer copper, tin-plated; mounting pad for collector 1 cm

2

.  

aaa-020053  

3

10  

duty cycle = 1  

Z

th(j-a)  

(K/W)  

0.75  

0.33  

0.5  

0.2  

2

10  

0.1  

0.05  

0.01  

10  

0.02  

0

1

10  

-5  

-4  

-3  

-2  

-1  

2

3

10  

10  

10  

10  

1

10  

10  

10  

t

p

(s)  

FR4 PCB, single-sided copper, tin-plated and standard footprint.  

Fig 3.

 

Transient thermal impedance from junction to ambient as a function of pulse duration; typical values  

PDTD113Z_123Y_143XQA_SER  

All information provided in this document is subject to legal disclaimers.  

© NXP Semiconductors N.V. 2016. All rights reserved.  

Product data sheet  

Rev. 1 — 31 March 2016  

5 of 21  

PDTD113Z/123Y/143XQA  

NXP Semiconductors  

50 V, 500 mA NPN resistor-equipped

 

transistors  

aaa-020054  

3

10  

Z

th(j-a)  

(K/W)  

duty cycle = 1  

0.75  

0.5  

2

10  

0.33  

0.2  

0.1  

0.05  

10  

0.02  

0

0.01  

1

10  

-5  

-4  

-3  

-2  

-1  

2

3

10  

10  

10  

10  

1

10  

10  

10  

t

p

(s)  

FR4 PCB, single-sided copper, tin-plated, mounting pad for collector 1 cm

2

.  

Fig 4.

 

Transient thermal impedance from junction to ambient as a function of pulse duration; typical values  

aaa-020058  

3

10  

Z

th(j-a)  

(K/W)  

duty cycle = 1  

0.75  

0.5  

2

10  

0.33  

0.2  

0.1  

0.05  

10  

0.02  

0

0.01  

1

10  

-5  

-4  

-3  

-2  

-1  

2

3

10  

10  

10  

10  

1

10  

10  

10  

t

p

(s)  

FR4 PCB, 4-layer copper, tin-plated and standard footprint.  

Fig 5.

 

Transient thermal impedance from junction to ambient as a function of pulse duration; typical values  

PDTD113Z_123Y_143XQA_SER  

All information provided in this document is subject to legal disclaimers.  

© NXP Semiconductors N.V. 2016. All rights reserved.  

Product data sheet  

Rev. 1 — 31 March 2016  

6 of 21  

PDTD113Z/123Y/143XQA  

NXP Semiconductors  

50 V, 500 mA NPN resistor-equipped

 

transistors  

aaa-020057  

3

10  

Z

th(j-a)  

(K/W)  

duty cycle = 1  

2

10  

0.75  

0.5  

0.33  

0.2  

0.1  

10  

0.05  

0.02  

0

0.01  

1

10  

-5  

-4  

-3  

-2  

-1  

2

3

10  

10  

10  

10  

1

10  

10  

10  

t

p

(s)  

FR4 PCB, 4-layer copper, tin-plated; mounting pad for collector 1 cm

2  

Fig 6.

 

Transient thermal impedance from junction to ambient as a function of pulse duration; typical values  

PDTD113Z_123Y_143XQA_SER  

All information provided in this document is subject to legal disclaimers.  

© NXP Semiconductors N.V. 2016. All rights reserved.  

Product data sheet  

Rev. 1 — 31 March 2016  

7 of 21  

PDTD113Z/123Y/143XQA  

NXP Semiconductors  

50 V, 500 mA NPN resistor-equipped

 

transistors  

7. Characteristics  

Table 8.  

Characteristics  

T

amb

= 25



C unless otherwise specified.  

Symbol  

Parameter  

Conditions  

Min  

Typ  

Max  

Unit  

I

CBO  

I

CEO  

I

EBO  

collector-base cut-off  

current  

V

CB

= 50 V; I

E

= 0 A  

–

–

100  

nA  

collector-emitter cut-off

 

V

CE

= 50 V; I

B

= 0 A;  

current  

–

–

0.5  



A  

emitter-base cut-off current  

PDTD113ZQA  

PDTD123YQA  

PDTD143XQA  

DC current gain  

V

EB

= 5 V; I

C

= 0 A  

–

–

–

–

–

–

0.8  

0.65  

0.6  

–

mA  

mA  

mA  

–

–

h

FE  

V

CE

= 5 V; I

C

= 50 mA  

I

C

= 50 mA; I

B

= 2.5 mA  

70  

–

V

CEsat  

collector-emitter  

100  

mV  

saturation voltage  

V

I(off)  

V

I(on)  

R1  

off-state input voltage  

PDTD113ZQA  

V

CE

= 5 V; I

C

= 100



A  

0.3  

0.4  

0.5  

0.65  

0.65  

0.75  

1

V

V

V

PDTD123YQA  

1

PDTD143XQA  

1.1  

on-state input voltage  

PDTD113ZQA  

V

CE

= 0.3 V; I

C

= 20 mA  

0.4  

0.5  

1

0.8  

1

1.4  

1.4  

2

V

V

V

PDTD123YQA  

PDTD143XQA  

1.4  

[1]  

[1]  

bias resistor 1 (input)  

PDTD113ZQA  

0.7  

1

1.3  

k

  

k

  

k

  

PDTD123YQA  

1.54  

3.3  

2.2  

4.7  

2.86  

6.1  

PDTD143XQA  

R2/R1  

bias resistor ratio  

PDTD113ZQA  

9

10  

11  

PDTD123YQA  

4.1  

4.55  

2.13  

5

5

PDTD143XQA  

1.91  

2.34  

C

c  

f

T  

collector capacitance  

transition frequency  

V

CB

= 10 V; I

E

= i

e

= 0 A; f = 1 MHz  

V

CE

= 5 V; I

C

= 50 mA; f = 100 MHz  

–

–

–

–

pF  

[2]  

210  

MHz  

[1] See

 

section test information for resistor calculation and test conditions.  

[2] Characteristics

 

of built-in transistor.  

PDTD113Z_123Y_143XQA_SER  

All information provided in this document is subject to legal disclaimers.  

© NXP Semiconductors N.V. 2016. All rights reserved.  

Product data sheet  

Rev. 1 — 31 March 2016  

8 of 21  

PDTD113Z/123Y/143XQA  

NXP Semiconductors  

50 V, 500 mA NPN resistor-equipped

 

transistors  

aaa-020059  

aaa-020107  

3

10  

0.5  

(1)  

(2)  

(3)  

I

(mA) = 2.05  

1.65  

B

I

C

1.85  

1.45  

(A)  

h

FE  

0.4  

2

10  

1.25  

0.85  

0.3  

0.2  

0.1  

0

1.05  

0.65  

10  

0.45  

0.25  

1

10  

-1  

2

3

1

10  

10  

10  

0

1

2

3

4

5

I

(mA)  

V

(V)  

CE  

C

V

CE

= 5 V  

T

amb

= 100



C  

T

amb

= 25



C  

(1)  

(2) T

amb

= 25



C  

(3) T

amb

=



40



C  

Fig 7.

 

PDTD113ZQA: DC current gain as a function of  

collector current; typical values  

Fig 8.

 

PDTD113ZQA: Collector current as a function  

of collector-emitter voltage; typical values  

aaa-020109  

aaa-020112  

10  

1

(1)  

(2)  

V

V

I(off)  

I(on)  

(V)  

(V)  

(3)  

1

(1)  

(2)  

(3)  

-1  

-1  

10  

10  

-1  

2

3

-1  

10  

1

10  

10  

10  

10  

1

10  

I

C

(mA)  

I (mA)  

C

V

CE

= 0.3 V  

(1) T

amb

=



40



C  

(2)

amb

= 25



C  

(3) T

amb

= 100



C  

V

CE

= 5 V  

(1) T

amb

=



40



C  

(2)

amb

= 25



C  

(3) T

amb

= 100



C  

T

T

Fig 9.

 

PDTD113ZQA: On-state input voltage as a  

function of collector current; typical values  

Fig 10.

 

PDTD113ZQA: Off-state input voltage as a  

function of collector current; typical values  

PDTD113Z_123Y_143XQA_SER  

All information provided in this document is subject to legal disclaimers.  

© NXP Semiconductors N.V. 2016. All rights reserved.  

Product data sheet  

Rev. 1 — 31 March 2016  

9 of 21  

PDTD113Z/123Y/143XQA  

NXP Semiconductors  

50 V, 500 mA NPN resistor-equipped

 

transistors  

aaa-020108  

aaa-020114  

-1  

10  

16  

C

c

(pF)  

V

CEsat  

(V)  

12  

8

4

0

(1)  

(2)  

(3)  

-2  

10  

2

3

1

10  

10  

10  

0

10  

20  

30  

40  

V

50  

(V)  

I

C

(mA)  

CB  

I

C

/I

B

= 20  

f = 1 MHz; T

amb

= 25



C  

(1) T

amb

= 100



C  

(2) T

amb

= 25



C  

(3)  

T

amb

=



40



C  

Fig 11.

 

PDTD113ZQA: Collector-emitter saturation  

voltage as a function of collector current;  

typical values  

Fig 12.

 

PDTD113ZQA: Collector capacitance as a  

function of collector-base voltage; typical  

values  

PDTD113Z_123Y_143XQA_SER  

All information provided in this document is subject to legal disclaimers.  

© NXP Semiconductors N.V. 2016. All rights reserved.  

Product data sheet  

Rev. 1 — 31 March 2016  

10 of 21  

PDTD113Z/123Y/143XQA  

NXP Semiconductors  

50 V, 500 mA NPN resistor-equipped

 

transistors  

aaa-020115  

aaa-020116  

3

10  

0.5  

1.8  

1.6  

1.4  

I

(mA) = 2  

B

I

C

(A)  

h

FE  

0.4  

1.2  

1.0  

0.8  

2

10  

(1)  

(2)  

(3)  

0.3  

0.2  

0.1  

0

0.6  

0.4  

10  

0.2  

1

10  

-1  

2

3

1

10  

10  

10  

0

1

2

3

4

5

I

(mA)  

V

(V)  

CE  

C

V

CE

= 5 V  

T

amb

= 100



C  

T

amb

= 25



C  

(1)  

(2) T

amb

= 25



C  

(3) T

amb

=



40



C  

Fig 13.

 

PDTD123YQA: DC current gain as a function of  

collector current; typical values  

Fig 14.

 

PDTD123YQA: Collector current as a function  

of collector-emitter voltage; typical values  

aaa-020119  

aaa-020117  

10  

1

(1)  

(2)  

V

I(on)  

V

I(off)  

(V)  

(V)  

(3)  

1

(1)  

(2)  

(3)  

-1  

-1  

10  

10  

-1  

2

3

-1  

10  

1

10  

10  

10  

10  

1

10  

I

C

(mA)  

I (mA)  

C

V

CE

= 0.3 V  

(1) T

amb

=



40



C  

(2)

amb

= 25



C  

(3) T

amb

= 100



C  

V

CE

= 5 V  

(1) T

amb

=



40



C  

(2)

amb

= 25



C  

(3) T

amb

= 100



C  

T

T

Fig 15.

 

PDTD123YQA: On-state input voltage as a  

function of collector current; typical values  

Fig 16.

 

PDTD123YQA: Off-state input voltage as a  

function of collector current; typical values  

PDTD113Z_123Y_143XQA_SER  

All information provided in this document is subject to legal disclaimers.  

© NXP Semiconductors N.V. 2016. All rights reserved.  

Product data sheet  

Rev. 1 — 31 March 2016  

11 of 21  

PDTD113Z/123Y/143XQA  

NXP Semiconductors  

50 V, 500 mA NPN resistor-equipped

 

transistors  

aaa-020118  

aaa-020120  

-1  

10  

16  

C

c

(pF)  

V

CEsat  

(V)  

12  

8

4

0

(1)  

(2)  

(3)  

-2  

10  

2

3

1

10  

10  

10  

0

10  

20  

30  

40  

V

50  

(V)  

I

C

(mA)  

CB  

I

C

/I

B

= 20  

f = 1 MHz; T

amb

= 25



C  

(1) T

amb

= 100



C  

(2) T

amb

= 25



C  

(3)  

T

amb

=



40



C  

Fig 17.

 

PDTD123YQA: Collector-emitter saturation  

voltage as a function of collector current;  

typical values  

Fig 18.

 

PDTD123YQA: Collector capacitance as a  

function of collector-base voltage; typical  

values  

PDTD113Z_123Y_143XQA_SER  

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© NXP Semiconductors N.V. 2016. All rights reserved.  

Product data sheet  

Rev. 1 — 31 March 2016  

12 of 21  

PDTD113Z/123Y/143XQA  

NXP Semiconductors  

50 V, 500 mA NPN resistor-equipped

 

transistors  

aaa-020121  

aaa-020122  

3

10  

0.5  

I

(mA) = 2.05  

1.65  

B

I

C

1.85  

1.45  

(A)  

h

FE  

0.4  

2

10  

(1)  

1.25  

0.85  

(2)  

(3)  

0.3  

0.2  

0.1  

0

1.05  

0.65  

10  

0.45  

0.25  

1

10  

-1  

2

3

1

10  

10  

10  

0

1

2

3

4

5

I

(mA)  

V

(V)  

CE  

C

V

CE

= 5 V  

T

amb

= 100



C  

T

amb

= 25



C  

(1)  

(2) T

amb

= 25



C  

(3) T

amb

=



40



C  

Fig 19.

 

PDTD143XQA: DC current gain as a function of  

collector current; typical values  

Fig 20.

 

PDTD143XQA: Collector current as a function  

of collector-emitter voltage; typical values  

aaa-020125  

aaa-020123  

2

10  

10  

V

I(on)  

(V)  

V

I(off)  

(V)  

10  

(1)  

1

(2)  

(3)  

1

(1)  

(2)  

(3)  

-1  

-1  

10  

10  

-1  

2

3

-1  

10  

1

10  

10  

10  

10  

1

10  

I

C

(mA)  

I (mA)  

C

V

CE

= 0.3 V  

(1) T

amb

=



40



C  

(2)

amb

= 25



C  

(3) T

amb

= 100



C  

V

CE

= 5 V  

(1) T

amb

=



40



C  

(2)

amb

= 25



C  

(3) T

amb

= 100



C  

T

T

Fig 21.

 

PDTD143XQA: On-state input voltage as a  

function of collector current; typical values  

Fig 22.

 

PDTD143XQA: Off-state input voltage as a  

function of collector current; typical values  

PDTD113Z_123Y_143XQA_SER  

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Product data sheet  

Rev. 1 — 31 March 2016  

13 of 21  

PDTD113Z/123Y/143XQA  

NXP Semiconductors  

50 V, 500 mA NPN resistor-equipped

 

transistors  

aaa-020124  

aaa-020126  

-1  

10  

16  

C

c

(pF)  

V

CEsat  

(V)  

12  

8

4

0

(1)  

(2)  

(3)  

-2  

10  

2

3

1

10  

10  

10  

0

10  

20  

30  

40  

V

50  

(V)  

I

C

(mA)  

CB  

I

C

/I

B

= 20  

f = 1 MHz; T

amb

= 25



C  

(1) T

amb

= 100



C  

(2) T

amb

= 25



C  

(3)  

T

amb

=



40



C  

Fig 23.

 

PDTD143XQA: Collector-emitter saturation  

voltage as a function of collector current;  

typical values  

Fig 24.

 

PDTD143XQA: Collector capacitance as a  

function of collector-base voltage; typical  

values  

aaa-020127  

3

10  

f

T

(MHz)  

2

10  

10  

10  

-1  

2

3

1

10  

10  

10  

I

C

(mA)  

V

CE

= 5 V; f = 100 MHz; T

amb

= 25 °C  

Fig 25.

 

Transition frequency as a function of collector current; typical values of built-in transistor  

PDTD113Z_123Y_143XQA_SER  

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Product data sheet  

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50 V, 500 mA NPN resistor-equipped

 

transistors  

8. Test

 

information  

8.1 Quality

 

information  

This product has been qualified in accordance with the Automotive Electronics Council  

(AEC) standard

Q101 – Stress test qualification for discrete semiconductors

, and is  

suitable for use in automotive applications.  

8.2 Resistor

 

calculation  

•

Calculation of bias resistor 1 (R1):  

V



I

I2



–

V



I

I1

  

R1

=  

———————————–  

I

I2

–

I

I1  

•

Calculation of bias resistor ratio (R2/R1):  

V



I

I4



–

V



I

I3

  

———————————–  

R1

 

I

I4

–

I

1

3

  

R2  

R1  

=

–

1  

——  

n.c.  

I

I

; I  

I1 I2  

R1  

; I  

I3 I4  

R2  

GND  

aaa-020082  

Fig 26.

 

Resistor test circuit  

8.3 Resistor

 

test conditions  

Table 9.  

Resistor test conditions  

Type number  

R1  

k



 

1

R2  

k

  

10  

10  

10  

Test conditions  

I

I1  

I

I2  

I

I3  

I

I4  

PDTD113ZQA  

PDTD123YQA  

PDTD143XQA  

0.7 mA  

0.7 mA  

1.3 mA  

0.8 mA  

0.8 mA  

1.5 mA  



0.45 mA

 



0.55 mA  



0.45 mA

 



0.55 mA  



0.45 mA

 



0.55 mA  

2.2  

4.7  

PDTD113Z_123Y_143XQA_SER  

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Product data sheet  

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50 V, 500 mA NPN resistor-equipped

 

transistors  

9. Package

 

outline  

0.87  

0.95  

0.75  

0.22  

0.30  

0.17  

1

2

0.25  

0.95  

1.05  

0.16  

0.24  

0.1  

0.195  

0.275  

3

0.04  

max  

0.245  

0.325  

0.34  

0.40  

1.05  

1.15  

Dimensions in mm  

13-03-05  

Fig 27.

 

Package outline DFN1010D-3 (SOT1215)  

PDTD113Z_123Y_143XQA_SER  

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50 V, 500 mA NPN resistor-equipped

 

transistors  

10. Soldering  

Footprint information for reflow soldering of DFN1010D-3 package  

SOT1215  

1.2  

0.45 (2x)  

0.35 (2x)  

0.3  

1.1  

0.25 (2x)  

0.4  

0.75  

0.3 0.4  

0.5 1.3  

0.3 0.4  

0.5  

0.4  

0.5  

1.5 1.4  

0.3  

0.4  

0.5  

1.3  

solder land  

solder land plus solder paste  

solder resist  

occupied area  

Dimensions in mm  

12-11-23  

13-03-06  

sot1215_fr  

Issue date  

Fig 28.

 

Reflow soldering footprint DFN1010D-3 (SOT1215)  

PDTD113Z_123Y_143XQA_SER  

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50 V, 500 mA NPN resistor-equipped

 

transistors  

11. Revision

 

history  

Table 10.

 

Revision history  

Document ID  

Release date  

Data sheet status  

Product data sheet  

Change notice

 

Supersedes  

PDTD113Z_123Y_143XQA_SER v.1

 

20160331  

–

–

PDTD113Z_123Y_143XQA_SER  

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12. Legal information  

12.1 Data

 

sheet status  

Document status

[1][2]  

Product status

[3]  

Development  

Definition  

Objective [short] data sheet  

This document contains data from the objective specification for product development.  

This document contains data from the preliminary specification.  

This document contains the product specification.  

Preliminary [short] data sheet

 

Qualification  

Product [short] data sheet

 

Production  

[1]  

[2]  

[3]  

Please consult the most recently issued document before initiating or completing a design.  

The term ‘short data sheet’ is explained in section “Definitions”.  

The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status  

information is available on the Internet at URL

.  

Suitability for use in automotive applications —

This NXP  

12.2 Definitions  

Semiconductors product has been qualified for use in automotive  

applications. Unless otherwise agreed in writing, the product is not designed,  

authorized or warranted to be suitable for use in life support, life-critical or  

safety-critical systems or equipment, nor in applications where failure or  

malfunction of an NXP Semiconductors product can reasonably be expected  

to result in personal injury, death or severe property or environmental  

damage. NXP Semiconductors and its suppliers accept no liability for  

inclusion and/or use of NXP Semiconductors products in such equipment or  

applications and therefore such inclusion and/or use is at the customer’s own  

risk.  

Draft —

The document is a draft version only. The content is still under  

internal review and subject to formal approval, which may result in  

modifications or additions. NXP Semiconductors does not give any  

representations or warranties as to the accuracy or completeness of  

information included herein and shall have no liability for the consequences of  

use of such information.  

Short data sheet —

A short data sheet is an extract from a full data sheet  

with the same product type number(s) and title. A short data sheet is intended  

for quick reference only and should not be relied upon to contain detailed and  

full information. For detailed and full information see the relevant full data  

sheet, which is available on request via the local NXP Semiconductors sales  

office. In case of any inconsistency or conflict with the short data sheet, the  

full data sheet shall prevail.  

Applications —

Applications that are described herein for any of these  

products are for illustrative purposes only. NXP Semiconductors makes no  

representation or warranty that such applications will be suitable for the  

specified use without further testing or modification.  

Customers are responsible for the design and operation of their applications  

and products using NXP Semiconductors products, and NXP Semiconductors  

accepts no liability for any assistance with applications or customer product  

design. It is customer’s sole responsibility to determine whether the NXP  

Semiconductors product is suitable and fit for the customer’s applications and  

products planned, as well as for the planned application and use of  

customer’s third party customer(s). Customers should provide appropriate  

design and operating safeguards to minimize the risks associated with their  

applications and products.  

Product specification —

The information and data provided in a Product  

data sheet shall define the specification of the product as agreed between  

NXP Semiconductors and its customer, unless NXP Semiconductors and  

customer have explicitly agreed otherwise in writing. In no event however,  

shall an agreement be valid in which the NXP Semiconductors product is  

deemed to offer functions and qualities beyond those described in the  

Product data sheet.  

NXP Semiconductors does not accept any liability related to any default,  

damage, costs or problem which is based on any weakness or default in the  

customer’s applications or products, or the application or use by customer’s  

third party customer(s). Customer is responsible for doing all necessary  

testing for the customer’s applications and products using NXP  

Semiconductors products in order to avoid a default of the applications and  

the products or of the application or use by customer’s third party  

customer(s). NXP does not accept any liability in this respect.  

12.3 Disclaimers  

Limited warranty and liability —

Information in this document is believed to  

be accurate and reliable. However, NXP Semiconductors does not give any  

representations or warranties, expressed or implied, as to the accuracy or  

completeness of such information and shall have no liability for the  

consequences of use of such information. NXP Semiconductors takes no  

responsibility for the content in this document if provided by an information  

source outside of NXP Semiconductors.  

Limiting values —

Stress above one or more limiting values (as defined in  

the Absolute Maximum Ratings System of IEC 60134) will cause permanent  

damage to the device. Limiting values are stress ratings only and (proper)  

operation of the device at these or any other conditions above those given in  

the Recommended operating conditions section (if present) or the  

Characteristics sections of this document is not warranted. Constant or  

repeated exposure to limiting values will permanently and irreversibly affect  

the quality and reliability of the device.  

In no event shall NXP Semiconductors be liable for any indirect, incidental,  

punitive, special or consequential damages (including – without limitation – lost  

profits, lost savings, business interruption, costs related to the removal or  

replacement of any products or rework charges) whether or not such  

damages are based on tort (including negligence), warranty, breach of  

contract or any other legal theory.  

Notwithstanding any damages that customer might incur for any reason  

whatsoever, NXP Semiconductors’ aggregate and cumulative liability towards  

customer for the products described herein shall be limited in accordance  

with the

T

e

rms and conditions of commercial sale

of NXP Semiconductors.  

Terms and conditions of commercial sale —

NXP Semiconductors  

products are sold subject to the general terms and conditions of commercial  

sale, as published at

, unless otherwise  

agreed in a valid written individual agreement. In case an individual  

agreement is concluded only the terms and conditions of the respective  

agreement shall apply. NXP Semiconductors hereby expressly objects to  

applying the customer’s general terms and conditions with regard to the  

purchase of NXP Semiconductors products by customer.  

Right to make changes —

NXP Semiconductors reserves the right to make  

changes to information published in this document, including without  

limitation specifications and product descriptions, at any time and without  

notice. This document supersedes and replaces all information supplied prior  

to the publication hereof.  

PDTD113Z_123Y_143XQA_SER  

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Product data sheet  

Rev. 1 — 31 March 2016  

19 of 21  

PDTD113Z/123Y/143XQA  

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50 V, 500 mA NPN resistor-equipped

 

transistors  

No offer to sell or license —

Nothing in this document may be interpreted or  

construed as an offer to sell products that is open for acceptance or the grant,  

conveyance or implication of any license under any copyrights, patents or  

other industrial or intellectual property rights.  

Translations —

A non-English (translated) version of a document is for  

reference only. The English version shall prevail in case of any discrepancy  

between the translated and English versions.  

Export control —

This document as well as the item(s) described herein  

may be subject to export control regulations. Export might require a prior  

authorization from competent authorities.  

12.4 Trademarks  

Notice: All referenced brands, product names, service names and trademarks  

are the property of their respective owners.  

Quick reference data —

The Quick reference data is an extract of the  

product data given in the Limiting values and Characteristics sections of this  

document, and as such is not complete, exhaustive or legally binding.  

13. Contact information  

For more information, please visit:

For sales office addresses, please send an email to:

PDTD113Z_123Y_143XQA_SER  

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transistors  

14. Contents  

1

Product profile . . . . . . . . . . . . . . . . . . . . . . . . . .

 

1  

1.1  

1.2  

1.3  

1.4  

General description

 

. . . . . . . . . . . . . . . . . . . . .

 

1  

Features and benefit

s

. . . . . . . . . . . . . . . . . . . .

 

1  

Applications .

 

. . . . . . . . . . . . . . . . . . . . . . . . . .

 

1  

Quick reference data

 

. . . . . . . . . . . . . . . . . . . .

 

1  

2

Pinning informatio

n

. . . . . . . . . . . . . . . . . . . . . .

 

2  

Ordering informatio

n

. . . . . . . . . . . . . . . . . . . . .

 

2  

Markin

g

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

 

3  

Binary marking code description. . . . . . . . . . . .

 

3  

Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . .

 

3  

Thermal characteristics

 

. . . . . . . . . . . . . . . . . .

 

5  

Characteristic

s

. . . . . . . . . . . . . . . . . . . . . . . . . .

 

8  

3

4

4.1  

5

6

7

8

Test informatio

n

. . . . . . . . . . . . . . . . . . . . . . . .

 

1

5  

Quality information . . . . . . . . . . . . . . . . . . . . .

 

15  

Resistor calculation

 

. . . . . . . . . . . . . . . . . . . .

 

15  

Resistor test conditions

 

. . . . . . . . . . . . . . . . .

 

15  

8.1  

8.2  

8.3  

9

Package outline . . . . . . . . . . . . . . . . . . . . . . . .

 

16  

Soldering .

 

. . . . . . . . . . . . . . . . . . . . . . . . . . . .

 

17  

Revision histor

y

. . . . . . . . . . . . . . . . . . . . . . . .

 

1

8  

10  

11  

12  

Legal information. . . . . . . . . . . . . . . . . . . . . . .

 

19  

Data sheet status . . . . . . . . . . . . . . . . . . . . . .

 

19  

Definition

s

. . . . . . . . . . . . . . . . . . . . . . . . . . . .

 

1

9  

Disclaimer

s

. . . . . . . . . . . . . . . . . . . . . . . . . . .

 

1

9  

Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . .

 

20  

12.1  

12.2  

12.3  

12.4  

13  

14  

Contact information. . . . . . . . . . . . . . . . . . . . .

 

20  

Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

 

21  

Please be aware that important notices concerning this document and the product(s)  

described herein, have been included in section ‘Legal information’.  

© NXP Semiconductors N.V.

 

2016.  

All rights reserved.  

For sales office addresses, please send an email to: salesaddresses@nxp.com  

Date of release: 31 March 2016  

Document identifier: PDTD113Z_123Y_143XQA_SER