onsemi-BC848BDW1T1
| Part # | onsemi-BC848BDW1T1 |
Download  | onsemi-BC848BDW1T1 |
ꢀ
ꢀ
ꢀ
ꢀ
ꢁ
ꢁ
ꢁ
ꢁ
ꢂ
ꢂ
ꢂ
ꢂ
ꢃ
ꢃ
ꢃ
ꢃ
ꢄ
ꢄ
ꢂ
ꢂ
ꢀ
ꢁ
ꢀ
ꢁ
ꢅ
ꢅ
ꢅ
ꢅ
ꢆ
ꢆ
ꢆ
ꢆ
ꢇ
ꢇ
ꢇ
ꢇ
ꢈ
ꢈ
ꢈ
ꢈ
ꢇ
ꢇ
ꢇ
ꢇ
ꢉ
ꢉ
ꢉ
ꢅ ꢊꢋ
ꢌ ꢍ
ꢎꢏꢎ ꢐ
ꢋꢌ ꢑ
ꢊꢐ ꢒ
ꢓꢔ ꢎ
ꢈꢐꢋ ꢏ ꢔꢕꢔ ꢖꢓꢐ
ꢔ
(3)
1
(2)
(1)
Q
NPN Duals
These transistors are designed for general purpose amplifier
applications. They are housed in the SOT
−
363/SC
−
88 which is
designed for low power surface mount applications.
Q
2
•
Device Marking:
(4)
(5)
(6)
BC847BDW1T1 = 1F
BC847CDW1T1 = 1G
BC848BDW1T1 = 1K
BC848CDW1T1 = 1L
6
5
4
MAXIMUM RATINGS
1
2
3
Rating
Symbol
BC847
45
BC848
30
Unit
V
Collecto
r
−
Emitter Voltage
Collecto
r
−
Base Voltage
Emitte
r
−
Base Voltage
V
CEO
V
CBO
V
EBO
SOT
−
363/SC
−
88
CASE 419B
STYLE 1
50
30
V
6.0
5.0
V
Collector Current — Continuous
I
C
100
100
mAdc
DEVICE MARKING
THERMAL CHARACTERISTICS
Characteristic
Symbol
Max
Unit
T
o
tal Device Dissipation
Per Device
P
380
250
mW
D
See
T
a
ble
(1)
FR
−
5 Board
= 25
°
C
T
A
Derate Above 25
°
C
3.0
mW/
°
C
°
C/W
Thermal Resistance,
Junction to Ambient
R
328
ꢀ
JA
Junction and Storage
T
e
mperature Range
T ,
T
J stg
−
55 to +150
°
C
ORDERING INFORMATION
Device
Package
SOT
−
363
SOT
−
363
SOT
−
363
SOT
−
363
Shipping
1. FR
−
5 = 1.0 x 0.75 x 0.062 in
BC847BDW1T1
BC847CDW1T1
BC848BDW1T1
BC848CDW1T1
3000 Units/Reel
3000 Units/Reel
3000 Units/Reel
3000 Units/Reel
Semiconductor Components Industries, LLC, 2001
378
Publication Order Number:
February, 2000
−
Rev. 0
BC847BDW1T1/D
BC847BDW1T1, BC847CDW1T1, BC848BDW1T1, BC848CDW1T1
ELECTRICAL CHARACTERISTICS
(T =
25
°
C unless otherwise noted)
A
Characteristic
OFF CHARACTERISTICS
Symbol
Min
Typ
Max
Unit
Collecto
r
−
Emitter Breakdown Voltage
(I =
10 mA)
C
V
V
(BR)CEO
BC847 Series
BC848 Series
45
30
—
—
—
—
Collecto
r
−
Emitter Breakdown Voltage
V
V
V
V
(BR)CES
(BR)CBO
(BR)EBO
(I =
10
µ
A, V
= 0)
BC847 Series
BC848 Series
50
30
—
—
—
—
C
EB
Collecto
r
−
Base Breakdown Voltage
(I =
10
ꢁ
A)
C
V
V
BC847 Series
BC848 Series
50
30
—
—
—
—
Emitte
r
−
Base Breakdown Voltage
(I =
1.0
ꢁ
A)
E
BC847 Series
BC848 Series
6.0
5.0
—
—
—
—
Collector Cutoff Current (V
= 30 V)
= 30
V
, T
=
1
50
°
C)
I
—
—
—
—
15
5.0
nA
µ
A
CB
CB
CBO
(V
A
ON CHARACTERISTICS
DC Current Gain
h
FE
—
(I =
10
µ
A, V
= 5.0 V)
BC847B, BC848B
BC847C, BC848C
—
—
150
270
—
—
C
CE
(I =
2.0 mA, V
C CE
= 5.0 V)
BC847B, BC848B
BC847C, BC848C
200
420
290
520
450
800
Collecto
r
−
Emitter Saturation Voltage (I
= 10 mA, I
= 0.5 mA)
V
—
—
—
—
0.25
0.6
V
V
C
B
CE(sat)
Collecto
r
−
Emitter Saturation Voltage
(I =
100 mA, I
= 5.0 mA)
C
B
Bas
e
−
Emitter Saturation Voltage (I
= 10 mA, I
= 0.5 mA)
V
—
—
0.7
0.9
—
—
C
B
BE(sat)
Bas
e
−
Emitter Saturation Voltage
(I =
100 mA, I
= 5.0 mA)
C
B
Bas
e
−
Emitter Voltage (I
= 2.0 mA, V
= 5.0 V)
= 5.0 V)
V
BE(on)
580
—
660
—
700
770
mV
C
CE
CE
Bas
e
−
Emitter Voltage
(I =
10 mA, V
C
SMALL
−
SIGNAL CHARACTERISTICS
Curren
t
−
Gain — Bandwidth Product
f
100
—
—
—
—
MHz
T
(I =
10 mA, V
= 5.0 Vdc, f = 100 MHz)
= 10
V
, f =
1
.0 MHz)
Noise Figure (I
= 0.2 mA,
C
CE
Output Capacitance (V
CB
C
4.5
pF
dB
obo
NF
C
V
= 5.0 Vdc, R
= 2.0 k
Ω
,
BC847B, BC848B
BC847C, BC848C
—
—
—
—
10
4.0
CE
S
f = 1.0 kHz, BW = 200 Hz)
379
BC847BDW1T1, BC847CDW1T1, BC848BDW1T1, BC848CDW1T1
TYPICAL CHARACTERISTICS
ꢐ ꢑꢒ
ꢔ ꢑꢓ
ꢔ ꢑ
ꢒ
ꢤ
ꢨ ꢔ
ꢒ ꢤ
ꢆ ꢨ
ꢐ ꢓ
°
ꢁ
ꢌ
ꢒ ꢑ
ꢚ
ꢒ ꢑ
ꢙ
ꢒ ꢑ
ꢘ
ꢁꢅ
ꢆ ꢨ
ꢐ ꢓ
°
ꢁ
ꢌ
ꢤ
ꢬ ꢀ
ꢧ ꢀ
ꢨ ꢔ
ꢒ
ꢁ ꢕ
ꢕ
ꢅ
ꢊ
ꢩ
ꢪ
ꢫ
ꢏ
ꢔ ꢑꢒ
ꢒ ꢑꢙ
ꢤ ꢬ
ꢤ ꢨ
ꢔ ꢒ
ꢤ
ꢕ ꢅ ꢊ ꢭ ꢮꢏ ꢁꢅ
ꢒ ꢑ
ꢗ
ꢒ ꢑ
ꢓ
ꢒ ꢑ
ꢛ
ꢒ ꢑ
ꢜ
ꢒ ꢑꢗ
ꢒ ꢑꢛ
ꢒ ꢑꢜ
ꢒ ꢑ
ꢐ
ꢒ ꢑ
ꢔ
ꢤ
ꢬ ꢀ
ꢧ ꢀ
ꢨ ꢔ
ꢒ
ꢁ ꢕ
ꢁ
ꢅ
ꢊ
ꢩ
ꢪ
ꢫ
ꢏ
ꢒ
ꢑ
ꢐ
ꢒ
ꢒ
ꢑ
ꢐ
ꢒ
ꢑ
ꢓ
ꢔ
ꢑ
ꢒ
ꢐ
ꢑ
ꢒ
ꢓ
ꢑ
ꢒ
ꢔ
ꢒ
ꢐ
ꢒ
ꢓ
ꢒ
ꢔ
ꢒ
ꢒ
ꢐ
ꢒ
ꢒ
ꢒ
ꢑ
ꢔ
ꢒ
ꢑ
ꢐ
ꢒ
ꢑ
ꢜ
ꢒ
ꢑ
ꢓ
ꢒ
ꢑ
ꢘ
ꢔ
ꢑ
ꢒ
ꢐ
ꢑ
ꢒ
ꢜ
ꢑ
ꢒ
ꢓ
ꢑ
ꢒ
ꢘ
ꢑ
ꢒ
ꢔ
ꢒ
ꢐ
ꢒ
ꢜ
ꢒ
ꢓ
ꢒ
ꢘ
ꢒ
ꢔ
ꢒ
ꢒ
ꢀ ꢂ
ꢁꢃ ꢄ
ꢄꢅꢁ ꢆꢃ
ꢇ ꢁꢈ
ꢇ ꢇꢅ
ꢉꢆ ꢊ
ꢋ ꢌꢍꢎꢏ
ꢁ
ꢀ ꢂ
ꢁꢃ ꢄ
ꢄꢅ ꢁꢆꢃ
ꢇ ꢁꢈꢇ
ꢇꢅ ꢉꢆ
ꢊꢋ ꢌ
ꢍꢎꢏ
ꢁ
Figure 1. Normalized DC Current Gain
Figure 2. “Saturation” and “On” Voltages
ꢐ ꢑꢒ
ꢔ ꢑꢗ
ꢔ ꢑꢐ
ꢒ ꢑꢙ
ꢒ ꢑꢛ
ꢒ
ꢔ ꢑ
ꢒ
ꢔ ꢑ
ꢐ
ꢔ ꢑ
ꢗ
ꢐ ꢑ
ꢒ
ꢐ ꢑ
ꢛ
ꢐ ꢑ
ꢙ
ꢆ
ꢨ
ꢐ
ꢓ
°
ꢁ
ꢥ
ꢓ
ꢓ
°
ꢁ
ꢫ
ꢭ
ꢯ
ꢔ
ꢐ
ꢓ
°
ꢁ
ꢌ
ꢀ
ꢁ
ꢨ
ꢐ
ꢒ
ꢒ
ꢋ
ꢌ
ꢀ
ꢨ
ꢀ
ꢨ
ꢀ
ꢁ
ꢨ
ꢓ
ꢒ
ꢋ
ꢌ
ꢀ ꢨ
ꢔꢒ ꢒ
ꢋ ꢌ
ꢁ
ꢁ
ꢁ
ꢔ ꢒ
ꢋꢌ ꢐꢒ
ꢋ ꢌ
ꢒ
ꢑ
ꢒ
ꢐ
ꢒ
ꢑ
ꢔ
ꢔ
ꢑ
ꢒ
ꢔ
ꢒ
ꢐ
ꢒ
ꢒ
ꢑ
ꢐ
ꢔ
ꢑ
ꢒ
ꢔ
ꢒ
ꢔ
ꢒ
ꢒ
ꢀ ꢂ
ꢕ ꢌꢖ ꢅ
ꢁꢈ ꢇ ꢇꢅ
ꢉꢆ ꢊ
ꢋ ꢌꢏ
ꢕ
ꢀ ꢂ
ꢁꢃ ꢄ
ꢄꢅ ꢁꢆꢃ
ꢇ ꢁꢈ
ꢇꢇꢅ ꢉꢆ
ꢊꢋ ꢌ
ꢏ
ꢁ
Figure 3. Collector Saturation Region
Figure 4. Base
−
Emitter Temperature Coefficient
380
BC847BDW1T1, BC847CDW1T1, BC848BDW1T1, BC848CDW1T1
TYPICAL CHARACTERISTICS
ꢔ ꢒ
ꢘ ꢑꢒ
ꢓ ꢑꢒ
ꢛ ꢒꢒ
ꢜ ꢒꢒ
ꢆ ꢨ
ꢐ ꢓ
°
ꢁ
ꢌ
ꢐ ꢒꢒ
ꢁ
ꢷ ꢶ
ꢤ
ꢨ ꢔ
ꢒ ꢤ
ꢁꢅ
ꢆ ꢨ
ꢐ ꢓ
°
ꢁ
ꢔ ꢒꢒ
ꢙ ꢒ
ꢜ ꢑꢒ
ꢐ ꢑꢒ
ꢌ
ꢁ
ꢭ ꢶ
ꢗ ꢒ
ꢛ ꢒ
ꢜ ꢒ
ꢔ ꢑꢒ
ꢐ
ꢒ
ꢒ
ꢑ
ꢛ
ꢒ
ꢑ
ꢗ
ꢒ
ꢑ
ꢙ
ꢔ
ꢑ
ꢒ
ꢐ
ꢑ
ꢒ
ꢛ
ꢑ
ꢒ
ꢗ
ꢑ
ꢒ
ꢙ
ꢑ
ꢒ
ꢔ
ꢒ
ꢐ
ꢒ
ꢛ
ꢒ
ꢒ
ꢑ
ꢓ
ꢒ
ꢑ
ꢘ
ꢔ
ꢑ
ꢒ
ꢐ
ꢑ
ꢒ
ꢜ
ꢑ
ꢒ
ꢓ
ꢑ
ꢒ
ꢘ
ꢑ
ꢒ
ꢔ
ꢒ
ꢐ
ꢒ
ꢜ
ꢒ
ꢓ
ꢒ
ꢤ ꢂ
ꢇ ꢅꢤꢅ
ꢇꢖ ꢅ
ꢤ ꢃꢄꢆꢌ ꢣꢅ
ꢊ ꢤꢃ
ꢄꢆꢖ ꢏ
ꢇ
ꢀ ꢂ
ꢁꢃ ꢄ
ꢄꢅ ꢁꢆꢃ
ꢇ ꢁꢈꢇ
ꢇꢅ ꢉꢆ
ꢊꢋ ꢌ
ꢍꢎꢏ
ꢁ
Figure 5. Capacitances
Figure 6. Current
−
Gain
−
Bandwidth Product
ꢔ ꢑꢒ
ꢒ ꢑꢙ
ꢆ
ꢨ
ꢐ
ꢓ
°
ꢁ
ꢌ
ꢤ
ꢨ
ꢓ
ꢤ
ꢁꢅ
ꢆ ꢨ
ꢐ ꢓ
°
ꢁ
ꢌ
ꢤ
ꢬ ꢀ
ꢧ ꢀ
ꢨ ꢔ
ꢒ
ꢁ ꢕ
ꢕ
ꢅ
ꢊ
ꢩ
ꢪ
ꢫ
ꢏ
ꢐ ꢑꢒ
ꢔ ꢑꢒ
ꢒ ꢑꢓ
ꢒ ꢑꢗ
ꢒ ꢑ
ꢛ
ꢒ ꢑ
ꢐ
ꢒ
ꢤ
ꢬ ꢤ
ꢨ ꢓ
ꢑ ꢒ
ꢤ
ꢁꢅ
ꢕ
ꢅ
ꢒ
ꢑ
ꢐ
ꢤ
ꢬ ꢀ
ꢧ ꢀ
ꢨ ꢔ
ꢒ
ꢁ ꢕ
ꢁ
ꢅ
ꢊ
ꢩ
ꢪ
ꢫ
ꢏ
ꢒ
ꢑ
ꢔ
ꢒ
ꢑ
ꢐ
ꢔ
ꢑ
ꢒ
ꢔ
ꢒ
ꢔ
ꢒ
ꢒ
ꢒ
ꢑ
ꢐ
ꢒ
ꢑ
ꢓ
ꢔ
ꢑ
ꢒ
ꢐ
ꢑ
ꢒ
ꢓ
ꢑ
ꢒ
ꢔ
ꢒ
ꢐ
ꢒ
ꢓ
ꢒ
ꢔ
ꢒ
ꢒ
ꢐ
ꢒ
ꢒ
ꢀ ꢂ
ꢁ ꢃꢄ
ꢄꢅꢁ ꢆꢃ
ꢇ ꢁ
ꢈꢇꢇ ꢅꢉ ꢆ
ꢊ ꢋ
ꢌꢏ
ꢁ
ꢀ ꢂ
ꢁꢃ ꢄ
ꢄꢅ ꢁꢆꢃ
ꢇ ꢁꢈ
ꢇꢇꢅ ꢉꢆ
ꢊꢋ ꢌ
ꢏ
ꢁ
Figure 7. DC Current Gain
Figure 8. “On” Voltage
ꢐ ꢑꢒ
ꢔ ꢑꢗ
ꢔ ꢑꢐ
ꢒ ꢑꢙ
ꢒ ꢑꢛ
ꢒ
ꢥ ꢔ
ꢑꢒ
ꢥ ꢔ
ꢑꢛ
ꢥ ꢔ
ꢑꢙ
ꢥ ꢐ
ꢑꢐ
ꢥ ꢐ
ꢑꢗ
ꢥ ꢜ
ꢑꢒ
ꢆ
ꢨ
ꢐ
ꢓ
°
ꢁ
ꢌ
ꢔ
ꢒ
ꢒ
ꢋ
ꢌ
ꢐ
ꢒ
ꢒ
ꢋ
ꢌ
ꢐ
ꢒ
ꢋ
ꢌ
ꢓ
ꢒ
ꢋ
ꢌ
θ
ꢤ ꢕ
ꢱ ꢭꢸ
ꢤ
ꢕ ꢅ
ꢥ
ꢓ
ꢓ
°
ꢁ
ꢫ
ꢭ
ꢔ
ꢐ
ꢓ
°
ꢁ
ꢀ
ꢨ
ꢁ
ꢔꢒ ꢋ
ꢌ
ꢒ
ꢑ
ꢒ
ꢐ
ꢒ
ꢑ
ꢒ
ꢓ
ꢒ
ꢑ
ꢔ
ꢒ
ꢑ
ꢐ
ꢒ
ꢑ
ꢓ
ꢔ
ꢑ
ꢒ
ꢐ
ꢑ
ꢒ
ꢓ
ꢑ
ꢒ
ꢔ
ꢒ
ꢐ
ꢒ
ꢒ
ꢑ
ꢐ
ꢒ
ꢑ
ꢓ
ꢔ
ꢑ
ꢒ
ꢐ
ꢑ
ꢒ
ꢓ
ꢑ
ꢒ
ꢔ
ꢒ
ꢐ
ꢒ
ꢓ
ꢒ
ꢔ
ꢒ
ꢒ
ꢐ
ꢒ
ꢒ
ꢀ ꢂ
ꢕ ꢌꢖ ꢅ
ꢁꢈ ꢇ ꢇꢅ
ꢉꢆ ꢊ
ꢋ ꢌꢏ
ꢕ
ꢀ ꢂ
ꢁꢃ ꢄ
ꢄꢅ ꢁꢆꢃ
ꢇ ꢁꢈ
ꢇꢇꢅ ꢉꢆ
ꢊꢋ ꢌ
ꢏ
ꢁ
Figure 9. Collector Saturation Region
Figure 10. Base
−
Emitter Temperature Coefficient
381
BC847BDW1T1, BC847CDW1T1, BC848BDW1T1, BC848CDW1T1
ꢔ ꢑꢒ
ꢒ ꢑꢔ
ꢢ ꢨ
ꢒ ꢑꢓ
ꢒ ꢑꢐ
ꢒ ꢑꢔ
ꢒ ꢑꢒ ꢓ
ꢒ ꢑꢒ ꢐ
Z
(t) = r(t) R
q
JA
q
JA
JA
= 328
ꢀ
C/W MAX
R
q
ꢦ
ꢊ ꢰ
ꢺ ꢏ
D CURVES APPLY FOR POWER
PULSE TRAIN SHOWN
READ TIME AT t
T
1
ꢫ
ꢔ
−
T =
P
R
q
JC
(t)
J(pk)
C
(pk)
ꢒ
ꢑ
ꢒ
ꢔ
ꢒ
ꢑ
ꢒ
ꢔ
ꢫ
ꢐ
ꢢꢈꢆ ꢽ
ꢁꢽ ꢁꢄ
ꢅ ꢂ
ꢢ ꢨ
ꢫ ꢧ
ꢫ
ꢔ ꢐ
ꢖ
ꢀ
ꢉ
ꢣ
ꢄ
ꢅ
ꢦ
ꢈ
ꢄ
ꢖ
ꢅ
ꢒ
ꢑ
ꢒ
ꢒ
ꢔ
ꢒ
ꢔ
ꢑ
ꢒ
ꢔ
ꢒ
ꢔ
ꢒ
ꢒ
ꢔ
ꢑ
ꢒ
ꢹ
ꢺ
ꢔ
ꢒ
ꢹ
ꢺ
ꢔ
ꢒ
ꢒ
ꢹ
ꢺ
ꢔ
ꢑ
ꢒ
ꢹ
ꢠ
ꢫ
ꢂ
ꢆ
ꢀ
ꢠ
ꢅ
ꢊ
ꢋ
ꢩ
ꢏ
Figure 11. Thermal Response
ꢥ
ꢐ
ꢒ
ꢒ
ꢔ
ꢩ
ꢜ
ꢋ
ꢩ
ꢥ ꢔꢒ
ꢒ
ꢥ ꢓꢒ
The safe operating area curves indicate I
−
V
limits of the
C
CE
transistor that must be observed for reliable operation. Collector
load lines for specific circuits must fall below the limits indicated
by the applicable curve.
ꢆ ꢨ
ꢐꢓ
°
ꢁ
ꢼ
ꢆ ꢨ
ꢐꢓ
°
ꢁ
ꢌ
The data of Figure 14 is based upon T
= 150
°
C; T
or T
J(pk)
C A
ꢕ ꢁꢓꢓ
ꢙ
ꢕ ꢁꢓꢓ
ꢘ
ꢕ ꢁꢓꢓ
ꢗ
is variable depending upon conditions. Pulse curves are valid for
duty cycles to 10% provided T
≤
150
°
C. T
may be
J(pk)
J(pk)
ꢥ
ꢔ
ꢒ
calculated from the data in Figure 13. At high case or ambient
temperatures, thermal limitations will reduce the power that can
be handled to values less than the limitations imposed by the
secondary breakdown.
ꢥ
ꢓ
ꢑ
ꢒ
ꢕ ꢃꢉ
ꢢꢀ ꢉꢣ
ꢳꢀ ꢇꢅ
ꢄꢀ ꢠ
ꢀꢆ
ꢆꢴ ꢅꢇ ꢠ
ꢌꢄ ꢄꢀ
ꢠ ꢀꢆ
ꢖ
ꢅ
ꢁ
ꢃ
ꢉ
ꢢ
ꢕ
ꢇ
ꢅ
ꢌ
ꢻ
ꢢ
ꢃ
ꢳ
ꢉ
ꢄ
ꢀ
ꢠ
ꢀ
ꢆ
ꢥ
ꢐ
ꢑ
ꢒ
ꢥ
ꢔ
ꢑ
ꢒ
ꢥ
ꢓ
ꢑ
ꢒ
ꢥ
ꢔ
ꢒ
ꢥ
ꢜ
ꢒ
ꢥ
ꢛ
ꢓ
ꢥ
ꢗ
ꢓ
ꢥ
ꢔ
ꢒ
ꢒ
ꢤ ꢂ
ꢁꢃ ꢄ
ꢄꢅꢁ ꢆꢃ
ꢇꢥ ꢅ
ꢠꢀ ꢆꢆ
ꢅꢇ ꢤ
ꢃꢄꢆꢌ ꢣꢅ
ꢊ ꢤꢏ
ꢁꢅ
Figure 12. Active Region Safe Operating Area
382
BC847BDW1T1, BC847CDW1T1, BC848BDW1T1, BC848CDW1T1
INFORMATION FOR USING THE SOT
−
363 SURFACE MOUNT PACKAGE
MINIMUM RECOMMENDED FOOTPRINT FOR SURFACE MOUNTED APPLICATIONS
Surface mount board layout is a critical portion of the
total design. The footprint for the semiconductor packages
must be the correct size to insure proper solder connection
interface between the board and the package. With the
correct pad geometry, the packages will self align when
subjected to a solder reflow process.
SOT
−
363
0.5 mm (min)
1.9 mm
SOT
−
363 POWER DISSIPATION
The power dissipation of the SOT
−
363 is a function of
the pad size.
This can vary from the minimum pad size for
soldering to a pad size given for maximum power
dissipation. Power dissipation for a surface mount device is
SOLDERING PRECAUTIONS
The melting temperature of solder is higher than the rated
temperature of the device. When the entire device is heated
to a high temperature, failure to complete soldering within
a short time could result in device failure. Therefore, the
following items should always be observed in order to
minimize the thermal stress to which the devices are
subjected.
•
Always preheat the device.
•
The delta temperature between the preheat and
soldering should be 100
°
C or less.*
determined by T
temperature of the die, R
, the maximum rated junction
, the thermal resistance from
J(max)
θ
JA
the device junction to ambient, and the operating
temperature, T
. Using the values provided on the data
A
sheet for the SOT
−
363 package, P
can be calculated as
D
follows:
T
−
T
A
J(max)
P
=
D
R
θ
JA
•
When preheating and soldering, the temperature of the
leads and the case must not exceed the maximum
temperature ratings as shown on the data sheet. When
using infrared heating with the reflow soldering
method, the difference shall be a maximum of 10
°
C.
•
The soldering temperature and time shall not exceed
260
°
C for more than 10 seconds.
•
When shifting from preheating to soldering, the
maximum temperature gradient shall be 5
°
C or less.
•
After soldering has been completed, the device should
be allowed to cool naturally for at least three minutes.
Gradual cooling should be used as the use of forced
cooling will increase the temperature gradient and
result in latent failure due to mechanical stress.
•
Mechanical stress or shock should not be applied
during cooling.
The values for the equation are found in the maximum
ratings table on the data sheet. Substituting these values
into the equation for an ambient temperature T
of 25
°
C,
A
one can calculate the power dissipation of the device which
in this case is 150 milliwatts.
150
°
C
−
25
°
C
833
°
C/W
P
=
= 150 milliwatts
D
The 833
°
C/W for the SOT
−
363 package assumes the use
of the recommended footprint on a glass epoxy printed
circuit board to achieve a power dissipation of
150 milliwatts.
There are other alternatives to achieving
higher power dissipation from the SOT
−
363 package.
Another alternative would be to use a ceramic substrate or
an aluminum core board such as Thermal Clad
. Using a
board material such as Thermal Clad, an aluminum core
board, the power dissipation can be doubled using the same
footprint.
383
BC847BDW1T1, BC847CDW1T1, BC848BDW1T1, BC848CDW1T1
* Soldering a device without preheating can cause
excessive thermal shock and stress which can result in
damage to the device.
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