onsemi-BSS123
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BSS123
N-Channel Logic Level Enhancement Mode Field Effect Transistor
Features
General Description
These N-Channel
enhancement mode field
effect
transistors are produced using
ON Semiconductor
’s
proprietary, high cell density,
DMOS technology.
These products have been designed
to minimize
on-
state resistance
while provide rugged,
reliable, and
·
0.17 A, 100 V. R
DS(ON)
= 6
W
@ V
GS
= 10 V
R
DS(ON)
= 10
W
@ V
GS
= 4.5 V
·
·
·
High density cell design for extremely low R
DS(ON)
Rugged and Reliable
fast
switching performance. These products are
low current
particularly suited for low
voltage,
Compact industry standard SOT-23 surface mount
package
applications such
as small servo motor control, power
MOSFET gate drivers, and other switching
applications.
D
D
S
S
G
G
SOT-23
Absolute Maximum Ratings
T
A
=25
o
C unless otherwise noted
Symbol
V
DSS
Parameter
Drain-Source Voltage
Ratings
100
Units
V
V
A
V
GSS
Gate-Source Voltage
Drain Current
– Continuous
– Pulsed
±
20
I
D
(Note 1)
(Note 1)
0.17
0.68
Maximum Power Dissipation
Derate Above 25
°
C
0.36
P
D
W
mW/
°
C
2.8
T
J
, T
STG
T
L
Operating and Storage Junction Temperature Range
–
55 to +150
°
C
Maximum Lead Temperature for Soldering
Purposes, 1/16” from Case for 10 Seconds
300
350
Thermal Characteristics
R
q
JA
Thermal Resistance, Junction-to-Ambient
(Note 1)
°
C/W
Package Marking and Ordering Information
Device Marking
Device
Reel Size
Tape width
Quantity
SA
BSS123
7’’
8mm
3000 units
Publication Order Number:
BSS123/D
Ó
2003
Semiconductor Components Industries, LLC.
September
-2017, Rev.
7
Electrical Characteristics
T
A
= 25°C unless otherwise noted
Symbol
Parameter
Test Conditions
Min Typ Max Units
Off Characteristics
BV
DSS
Drain–Source Breakdown Voltage
100
V
V
GS
= 0 V,
I
D
= 250
m
A
D
BV
DSS
D
T
J
Breakdown Voltage Temperature
Coefficient
97
I
D
= 250
m
A,Referenced to 25
°
C
mV/
°
C
I
DSS
Zero Gate Voltage Drain Current
V
DS
= 100 V,
V
GS
= 0 V
1
m
A
m
A
nA
nA
60
V
DS
= 100 V,V
GS
= 0 V T
J
= 125
°
C
V
DS
= 20 V,
V
GS
= 0 V
10
I
GSS
Gate–Body Leakage.
V
GS
=
±
20 V,
V
DS
= 0 V
±
50
On Characteristics
(Note 2)
V
GS(th)
Gate Threshold Voltage
V
DS
= V
GS
,
I
D
= 1 mA
0.8
1.7
2
V
D
V
GS(th)
D
T
J
Gate Threshold Voltage
Temperature Coefficient
–2.7
I
D
= 1 mA,Referenced to 25
°
C
mV/
°
C
R
DS(on)
Static Drain–Source
On–Resistance
V
GS
= 10 V,
V
GS
= 4.5 V,
V
GS
= 10 V, I
D
= 0.17 A, T
J
= 125
°
C
I
D
= 0.17 A
I
D
= 0.17 A
1.2
1.3
2.2
6
10
12
W
I
D(on)
g
FS
On–State Drain Current
V
GS
= 10 V,
V
DS
= 10V,
V
DS
= 5 V
0.68
0.08
A
S
Forward Transconductance
I
D
= 0.17 A
0.8
Dynamic Characteristics
C
iss
C
oss
C
rss
R
G
Input Capacitance
73
7
pF
pF
pF
W
V
DS
= 25
V,
f = 1.0 MHz
V
GS
= 0 V,
Output Capacitance
Reverse Transfer Capacitance
Gate Resistance
3.4
2.2
V
GS
= 15 mV,
f = 1.0 MHz
Switching Characteristics
(Note 2)
t
d(on)
t
r
t
d(off)
t
f
Turn–On Delay Time
Turn–On Rise Time
Turn–Off Delay Time
Turn–Off Fall Time
Total Gate Charge
Gate–Source Charge
Gate–Drain Charge
1.7
9
3.4
18
31
5
ns
ns
V
DD
= 30 V,
V
GS
= 10 V,
I
D
= 0.28 A,
R
GEN
= 6
W
17
ns
2.4
1.8
0.2
0.3
ns
Q
g
Q
gs
Q
gd
2.5
nC
nC
nC
V
DS
= 30 V,
V
GS
= 10 V
I
D
= 0.22 A,
Drain–Source Diode Characteristics and Maximum Ratings
I
S
Maximum Continuous Drain–Source Diode Forward Current
0.17
1.3
A
V
V
SD
Drain–Source Diode Forward
Voltage
V
GS
= 0 V,
I
S
= 0.34 A
(Note 2)
0.8
t
rr
Diode Reverse Recovery Time
Diode Reverse Recovery Charge
I
F
= 0.17 A,
d
iF
/d
t
= 100 A/µs
11
3
nS
nC
Q
rr
NOTE:
1.
R
q
JA
is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of
the drain pins.
R
q
JC
is guaranteed by design while R
q
CA
is determined by the user’s board design.
a) 350°C/W
when mounted on a
minimum pad..
Scale 1 : 1 on letter size paper
2.
Pulse Test: Pulse Width
£
300
m
s, Duty Cycle
£
2.0%
2
Typical Characteristics
1
1.6
1.5
1.4
1.3
1.2
1.1
1
V
GS
= 10V
3.5V
6.0V
0.8
4.5V
3.0V
V
GS
= 2.5V
0.6
0.4
0.2
0
2.5V
3.0V
3.5V
4.5V
0.6
6.0V
10V
2.0V
0.9
0
0.2
0.4
0.8
1
0
1
2
3
4
5
I
D
, DRAIN CURRENT (A)
V
DS
, DRAIN TO SOURCE VOLTAGE (V)
Figure 1. On-Region Characteristics.
Figure 2. On-Resistance Variation with
Drain Current and Gate Voltage.
2.2
2
3.4
I
D
= 170mA
V
GS
= 10V
I
D
= 0.08A
3
2.6
2.2
1.8
1.4
1
1.8
1.6
1.4
1.2
1
T
A
= 125
o
C
0.8
0.6
0.4
T
A
= 25
o
C
0
2
4
6
8
10
-50
-25
0
25
50
75
100
125
150
T
J
, JUNCTION TEMPERATURE (
o
C)
V
GS
, GATE TO SOURCE VOLTAGE (V)
Figure 3. On-Resistance Variation with
Temperature.
Figure 4. On-Resistance Variation with
Gate-to-Source Voltage.
1
1
V
GS
= 0V
V
DS
= 10V
0.8
0.1
T
A
= 125
o
C
25
o
C
0.6
0.4
0.2
0
0.01
0.001
-55
o
C
T
A
= 125
o
C
25
o
C
-55
o
C
0.0001
0
0.2
0.4
0.6
0.8
1
1.2
1
1.5
2
2.5
3
V
SD
, BODY
DIODE FORWARD VOLTAGE (V)
V
GS
, GATE TO SOURCE VOLTAGE (V)
Figure 5. Transfer Characteristics.
Figure 6. Body Diode Forward Voltage Variation
with Source Current and Temperature.
3
Typical Characteristics
100
80
60
40
20
0
10
f = 1 MHz
V
GS
= 0 V
I
D
= 0.17A
V
DS
= 30V
50V
C
ISS
8
6
4
2
0
70V
C
OSS
C
RSS
0
20
40
60
80
100
0
0.4
0.8
1.2
1.6
2
Q
g
, GATE CHARGE (nC)
V
DS
, DRAIN TO SOURCE VOLTAGE (V)
Figure 7. Gate Charge Characteristics.
Figure 8. Capacitance Characteristics.
1
5
4
3
2
1
0
R
DS(ON)
LIMIT
100
m
s
SINGLE PULSE
R
q
JA
= 350°C/W
T
A
= 25°C
1ms
10ms
100ms
1s
0.1
0.01
10s
DC
V
GS
= 10V
SINGLE PULSE
R
q
JA
= 350
o
C/W
T
A
= 25
o
C
0.001
1
10
100
1000
0.001
0.01
0.1
1
10
100
1000
V
DS
, DRAIN-SOURCE VOLTAGE (V)
t
1
, TIME (sec)
Figure 9. Maximum Safe Operating Area.
Figure 10. Single Pulse Maximum
Power Dissipation.
1
D = 0.5
R
q
JA
(t) = r(t) * R
q
JA
R
q
JA
= 350
o
C/W
0.2
0.1
0.1
0.05
0.02
P(pk)
t
1
0.01
t
2
0.01
T
J
– T
A
= P * R
q
JA
(t)
Duty Cycle, D = t
1
/ t
2
SINGLE PULSE
0.001
0.0001
0.001
0.01
0.1
1
10
100
1000
t
1
, TIME (sec)
Figure 11. Transient Thermal Response Curve.
Thermal characterization performed using the conditions described in Note 1a.
Transient thermal response will change depending on the circuit board design.
4
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