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October 2014
BSS138L
N-Channel Logic Level Enhancement Mode Field Effect
Transistor
Features
Description
• High
Density Cell Design for Low R
DS(ON)
This N-channel enhancement mode field effect transistor
is produced using high cell density, trench MOSFET
technology. This product minimizes on-state resistance
while providing rugged, reliable, and fast switching per-
formance. This product is particularly suited for low-volt-
age, low-current applications such as small servo motor
control, power MOSFET gate drivers, logic level transla-
tor, high speed line drivers, power management/power
supply and switching applications.
• Rugged
and Reliable
• Compact
Industry Standard SOT-23 Surface Mount
Package
• Very
Low Capacitance
• Fast
Switching Speed
D
D
S
SOT-23
G
G
S
Ordering Information
Part Number
Marking
Package
Packing Method
BSS138L
SL
SOT-23 3L
T
a
pe and Reel
© 2014 Fairchild Semiconductor Corporation
BSS138L Rev. 1.0.1
1
Absolute Maximum Ratings
Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be opera-
ble above the recommended operating conditions and stressing the parts to these levels is not recommended. In addi-
tion, extended exposure to stresses above the recommended operating conditions may affect device reliability. The
absolute maximum ratings are stress ratings only. Values are at T
A
= 25°C unless otherwise noted.
Symbol
V
DSS
Parameter
Value
50
Unit
V
Drain-Source Voltage
Gate-Source Voltage
V
GSS
±20
V
Continuous
Pulsed
0.20
I
D
Maximum Drain Current
A
0.80
T
J
, T
STG
Operating and Storage
T
e
mperature Range
-55 to +150
°
C
°
C
Maximum Lead
T
e
mperature for Soldering Purposes, 1/16 inch from Case
for 10 Seconds
T
L
300
Thermal Characteristics
Values are at T
A
= 25°C unless otherwise noted.
Symbol
P
D
Parameter
Value
0.35
2.8
Unit
W
Maximum Power Dissipation
(1)
Derate Above 25
°
C
mW/
°
C
°
C/W
R
θ
JA
Thermal Resistance, Junction-to-Ambient
(1)
380
Note:
1. R
θ
JA
is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference
is defined as the solder mounting surface of the drain pins. R
θ
JC
is guaranteed by design while R
θ
CA
is
determined by the user’s board design.
a) 380
°
C/W when mounted on a minimum pad.
Scale 1: 1 on letter size paper
ESD Rating
(2)
Symbol
HBM
Parameter
Human Body Model per ANSI/ESDA/JEDEC JS-001-2012
Charged Device Model per JEDEC C101C
Value
50
Unit
V
CDM
>2000
Note:
2. ESD values are in typical, no over-voltage rating is implied, ESD CDM zap voltage is 2000 V maximum.
© 2014 Fairchild Semiconductor Corporation
BSS138L Rev. 1.0.1
2
Electrical Characteristics
Values are at T
A
= 25°C unless otherwise noted.
Symbol
Parameter
Conditions
Min.
Typ.
Max. Unit
Off Characteristics
BV
DSS
Drain-Source Breakdown Voltage
V
GS
= 0 V, I
D
= 250
μ
A
50.0
65.4
58
V
Δ
BV
DSS
Breakdown Voltage
Δ
T
J
I
D
= 250
μ
A
,
Referenced to 25
°
C
mV/
°
C
T
e
mperature Coefficient
V
DS
= 50 V, V
GS
= 0 V
0.263
0.109
500
5
nA
μ
A
nA
V
DS
= 50 V, V
GS
= 0
V
,
T
J
= 125
°
C
I
DSS
Zero Gate Voltage Drain Current
V
DS
= 30 V, V
GS
= 0 V
V
GS
= 20 V, V
DS
= 0 V
V
GS
= -20
V
,
V
DS
= 0 V
0.062
0.058
-0.06
100
100
I
GSSF
I
GSSR
Gate-Body Leakage, Forward
Gate-Body Leakage, Reverse
nA
-100
On Characteristics
(3)
V
GS(th)
Gate Threshold Voltage
V
DS
= V
GS
,
I
D
= 1 mA
0.80
1.25
1.50
V
Δ
V
GS(th)
Gate Threshold Voltage
I
D
= 1 mA, Referenced to 25
°
C
-2.42
mV/
°
C
Δ
T
J
T
e
mperature Coefficient
V
GS
= 5
V
,
I
D
= 0.20 A
2.78
3.78
0.67
0.35
3.50
10
Static Drain-Source
On-Resistance
R
DS(ON)
Ω
V
GS
= 2.75
V
,
I
D
= 0.20 A
I
D(ON)
g
FS
On-State Drain Current
V
GS
= 10 V, V
DS
= 5 V
V
DS
= 10
V
,
I
D
= 0.22 A
0.20
0.12
A
S
Forward Transconductance
Dynamic Characteristics
C
iss
C
oss
C
rss
R
G
Input Capacitance
12.2
3.04
1.43
26.6
50
25
5
pF
pF
pF
Ω
V
DS
= 25
V
,
V
GS
= 0
V
,
Output Capacitance
Reverse Transfer Capacitance
Gate Resistance
f = 1.0 MHz
V
GS
= 15 V, V
GS
= 1.0 MHz
Switching Characteristics
(3)
t
d(on)
t
r
t
d(off)
t
f
Turn-On Delay
2.2
1.8
5
ns
ns
Turn-On Rise Time
Turn-Off Delay
18
36
14
2.4
V
DD
= 30
V
,
I
D
= 0.29 A,
V
GS
= 10 V
5.3
ns
Turn-Off Fall Time
T
o
tal Gate Charge
Gate-Source Charge
Gate-Drain Charge
5.1
ns
Q
g
0.549
0.075
0.117
nC
nC
nC
V
DS
= 25
V
,
I
D
= 0.22 A,
Q
gs
Q
gd
V
GS
= 10
V
,
I
G
= 0.1 mA
Drain-Source Diode Characteristics and Maximum Ratings
I
S
Maximum Continuous Drain-Source Diode Forward Current
0.22
1.4
A
V
Drain-Source Diode
V
GS
= 0
V
,
I
S
= 115 mA
Forward Voltage
V
SD
0.93
Note:
3. Pulse test: pulse width
≤
300
μ
s, duty cycle
≤
2.0%.
© 2014 Fairchild Semiconductor Corporation
BSS138L Rev. 1.0.1
3
Typical Performance Characteristics
1.0
3.0
2.6
2.2
1.8
1.4
1.0
V
GS
=2.5V
0.8
6.0
V
GS
=10V
3.0
4.5
3.5
0.6
0.4
0.2
0.0
3.5
3.0
4.5
6.0
2.5
2.0
10
0.0
0.5
1.0
1.5
2.0
2.5
3.0
3.5
4.0
4.5
5.0
0
0.2
0.4
0.6
0.8
1
I
D
, DRAIN CURRENT (A)
V
DS
, DRAIN-SOURCE VOLTAGE (V)
Figure 2. On-Resistance Variation with Gate Voltage
and Drain Current
Figure 1. On-Region Characteristics
2.1
8
I
D
= 0.22A
I
D
= 0.11 A
7.5
7
V
GS
= 10V
1.9
1.7
1.5
1.3
1.1
0.9
0.7
0.5
6.5
6
5.5
5
4.5
4
T
J
= 125
o
C
3.5
3
2.5
2
T
J
= 25
o
C
1.5
1
2
3
V
4
5
6
7
8
9
10
-75
-50
-25
0
25
50
75
100
125
150
T
J
, JUNCTION TEMPER
A
T
URE (
o
C)
GS
, G
A
T
E TO SOURCE VOLTAGE (V)
Figure 3. On-Resistance Variation with Temperature
Figure 4. On-Resistance Variation with
Gate-to-Source Voltage
1
1.0
V
GS
= 0V
V
DS
= 10 V
0.9
T
J
= 125
o
C
0.8
0.7
0.1
-55
o
C
0.6
0.5
0.4
0.3
0.2
0.1
0.0
-55
o
C
25
o
C
T
J
= 125
o
C
25
o
C
0.01
0.001
0
1
2
3
4
5
6
7
0.2
0.4
0.6
0.8
1.0
1.2
V
SD
, BODY DIODE FORWARD VOLTAGE (V)
V
GS
, G
A
T
E TO SOURCE VO
L
TAGE (V)
Figure 6. Body Diode Forward Voltage Variation with
Source Current and Temperature
Figure 5. Transfer Characteristics
© 2014 Fairchild Semiconductor Corporation
BSS138L Rev. 1.0.1
4
Typical Performance Characteristics
(Continued)
10
V
DS
= 25V
8
C
iss
V
DS
= 8V
V
DS
= 30V
10
6
4
2
0
C
oss
C
rss
f = 1MHz
GS
= 0V
V
0
0.2
0.4
0.6
1
0.01
Q
g
, GATE CHARGE (nC)
0.1
1
10
100
V
DS
, DRAIN TO SOURCE VOLTAGE (V)
Figure 7. Gate Charge Characteristics
Figure 8. Capacitance Characteristics
1
100
10
1
μ
100 s
0.2
R
DS(ON)
LIMIT
1ms
SINGLE PULSE
R
θ
JA
= 380
o
C/W
10ms
100ms
1s
0.02
T
A
= 25
o
C
SINGLE PULSE
10s
DC
R
θ
JA
= 380
o
C/W
T
A
= 25
o
C
0.1
0.0001
0.001
0.01
0.1
1
10
100
1000
0.002
0.01
t1 (s)
200
0.1
1
10
100
V
DS
, DRAIN-SOURCE VOLTAGE (V)
Figure 10. Single Pulse Maximum Power Dissipation
Figure 9. Maximum Safe Operating Area
TRANSIENT THERMAL IMPEDANCE
10
1
0.5
0.2
0.1
0.1
0.05
0.02
0.01
Single Pulse
0.01
0.0001
0.001
0.01
0.1
1
10
100
1000
t, Rectangular Pulse Duration
Figure 11. Transient Thermal Response Curve.
© 2014 Fairchild Semiconductor Corporation
BSS138L Rev. 1.0.1
5
ON Semiconductor and
are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.
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coverage may be accessed at
www.onsemi.com/site/pdf/Patent
−
Marking.pdf
. ON Semiconductor reserves the right to make changes without further notice to any products herein.
ON Semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
Buyer is responsible for its products and applications using ON Semiconductor products, including compliance with all laws, regulations and safety requirements or standards,
regardless of any support or applications information provided by ON Semiconductor. “Typical” parameters which may be provided in ON Semiconductor data sheets and/or
specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer
application by customer’s technical experts. ON Semiconductor does not convey any license under its patent rights nor the rights of others. ON Semiconductor products are not
designed, intended, or authorized for use as a critical component in life support systems or any FDA Class 3 medical devices or medical devices with a same or similar classification
in a foreign jurisdiction or any devices intended for implantation in the human body. Should Buyer purchase or use ON Semiconductor products for any such unintended or unauthorized
application, Buyer shall indemnify and hold ON Semiconductor and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and
expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such
claim alleges that ON Semiconductor was negligent regarding the design or manufacture of the part. ON Semiconductor is an Equal Opportunity/Affirmative Action Employer. This
literature is subject to all applicable copyright laws and is not for resale in any manner.
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