onsemi-EFC2J004NUZTDG

Part #onsemi-EFC2J004NUZTDG
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onsemi-EFC2J004NUZTDG
EFC2J004NUZ  
Power MOSFET  
for 1-Cell Lithium-ion Battery Protection  
12 V, 7.1 m
Ω
, 14 A, Dual N-Channel  
ww
w
.onsemi.com  
This Power MOSFET features a low on-state resistance. This device is  
suitable for applications such as power switches of portable machines. Best  
suited for 1-cell lithium-ion battery applications.  
V
R
SS  
(on) Max  
I
SSS  
S Max  
7.1 m
Ω
@ 4.5 V  
7.7 m
Ω
@ 3.8 V  
9.5 m
Ω
@ 3.1 V  
12.4m
Ω
@ 2.5 V  
Features  
2.5 V Drive  
2 kV ESD HBM  
Common-Drain Type  
ESD Diode-Protected Gate  
Pb-Free, Halogen Free and RoHS compliance  
12 V  
14 A  
ELECTRICAL CONNECTION  
N-Channel  
Applications  
4, 6  
1-Cell Lithium-ion Battery Charging and Discharging Switch
  
SPECIFICATIONS  
ABSOLUTE MAXIMUM RATINGS
at
Ta = 25
C
(Notes 1, 2)  
Parameter  
Source to Source Voltage  
Gate to Source Voltage  
5
2
Symbol  
Value  
Unit  
V
V
12  
8  
14  
SSS  
GSS  
V
V
1 : Source1  
2 : Gate1  
Source Current (DC)  
I
A
S
3 : Source1  
4 : Source2  
5 : Gate2  
Source Current (Pulse)  
PW
10
s, duty cycle
1%  
Total Dissipation (Note 2)  
A
I
60  
SP  
P
1.5  
W
C  
C  
T
6 : Source2  
1, 3  
Junction Temperature  
Storage Temperature  
Tj  
150  
Tstg  
55 to +150  
Note 1 : Stresses exceeding those listed in the Maximum Ratings table may damage  
the device. If any of these limits are exceeded, device functionality should not  
be assumed, damage may occur and reliability may be affected.  
WLCSP6, 2.11×1.18×0.10  
THERMAL RESISTANCE RATINGS  
GENERIC  
MARKING DIAGRAM  
Parameter  
Symbol  
Value  
Unit  
Junction to Ambient (Note 2)  
C/W  
R
JA  
83  
NA  
AYWZZ  
Note 2 : Surface mounted on ceramic substrate (5000 mm

2

0.8 mm).  
NA =
 
Specific Device Code  
A
Y
= Assembly Location  
=
Y
e
ar  
W
= Work Week  
ZZ =
 
Assembly Lot  
= Pb-Free Package  
ORDERING INFORM
A
T
ION  
See detailed ordering and shipping  
information on page 6 of this data sheet.  
© Semiconductor Components Industries, LLC, 2017  
February 2017 – Re
v
. 1  
1
Publication Order Number :  
EFC2J004NUZ/D  

EFC2J004NUZ  
ELECTRICAL CHARACTERISTICS
at Ta
25
C
(Notes 3, 4)  
Value  
typ  
Parameter  
Symbol  
Conditions  
Unit  
V
min  
12  
max  
Source to Source Breakdown  
Voltage  
V(  
)
I
= 1 mA, V  
= 0 V  
Test Circuit 1  
BR SSS  
S
GS  
Zero-Gate Voltage Source Current  
Gate to Source Leakage Current  
Gate Threshold Voltage  
I
I
V
V
V
= 10 V, V  
= 0 V
 
Test Circuit 1  
= 0 V
 
Test Circuit 2  
1
A  
A  
V
SSS  
GSS  
SS  
GS  
SS  
GS  
=
8 V, V  
1  
1.3  
SS  
V
(th)  
= 6 V, I
 
= 1 mA  
Test Circuit 3  
0.4  
3.7  
4.1  
4.6  
5.8  
GS  
S
I
I
= 5 A, V  
= 4.5 V  
= 3.8 V  
Test Circuit 4  
Test Circuit 4  
5.4  
5.9  
6.7  
8.4  
15  
7.1  
m
Ω  
m
Ω  
m
Ω  
m
Ω  
s  
S
S
GS  
GS  
= 5 A, V  
= 5 A, V  
= 5 A, V  
7.7  
Static Source to Source On-State  
Resistance (Note 4)  
R
(on)  
SS  
I
I
= 3.1 V  
= 2.5 V  
Test Circuit 4  
Test Circuit 4  
9.5  
S
S
GS  
GS  
12.4  
Turn-ON Delay Time  
Rise Time  
t (on)  
d
t
35  
s  
r
V
= 5 V, V  
= 3.8 V, I
 
= 5 A  
S
SS  
Rg = 10 k
Ω  
GS  
t (off)  
d
Test Circuit 5  
Turn-OFF Delay Time  
Fall Time  
100  
75  
s  
t
f
s  
V
I
= 6 V, V  
= 4.5 V, I
 
= 14 A  
S
SS  
GS  
36  
Qg  
V
nC  
V
Total Gate Charge  
Test Circuit 6  
Forward Source to Source Voltage  
= 3 A, V  
= 0 V  
GS  
Test Circuit 7  
0.76  
F(S-S)  
S
Note 3 : Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted.  
Product performance may not be indicated by the Electrical Characteristics if operated under different conditions.  
Note 4 : Mounted on ON Semiconductor board.  
2

EFC2J004NUZ  
Test circuits are example of measuring FET1 side  
Test Circuit 2  
Test Circuit 1  
I
V
/ I  
GSS  
(BR)SSS SSS  
S2  
S2  
G2  
G2  
G1  
A
G1  
V
SS  
A
V
GS  
S1  
S1  
When FET1 is measured,  
Gate and Source of FET2  
are short-circuited.  
Test Circuit 3  
(th)  
Test Circuit 4  
R
(on)  
V
SS  
GS  
S2  
S2  
IS  
G2  
G2  
A
When FET1 is measured,  
Gate and Source of FET2  
are short-circuited.  
V
G1  
V
SS  
G1  
V
GS  
V
GS  
S1  
S1  
Test Circuit 5  
Test Circuit 6  
Qg  
t (on),
 
t t (off),
 
t  
f
d
r, d  
S2  
S2  
RL  
A
G2  
G1  
G2  
G1  
When FET1 is measured,  
Gate and Source of FET2  
are short-circuited.  
V
I
=1mA  
G
RL  
Rg  
V
SS  
S1  
When FET1 is measured,  
Gate and Source of FET2  
are short-circuited.  
S1  
V
SS  
PG  
DC  
Test Circuit 7  
V
F(S-S)  
S2  
I
S
G2  
G1  
V
VGS=0V  
When FET1 is  
measured,+4.5V is added to  
GS
of FET2.  
S1  
V
When FET2 is measured, the position of FET1 and FET2 is switched.  
3

EFC2J004NUZ  
I
S
— V  
I
— V  
SS  
S
GS  
6.0  
15  
12  
V
=6V  
Ta=25
C  
SS  
5.0  
4.0  
3.0  
2.0  
9
6
3
0
1.0  
0
0
1
0
0.01  
0.02  
0.03  
0.04  
0.05  
0.06  
0
0.2  
0.4  
0.6  
0.8  
1.0  
1.2  
1.4  
1.6  
1.8  
2.0  
Source to Source
V
o
ltage, V  
SS  
— V  
Gate to Source
V
o
ltage, V
 
–
– V  
GS  
R
(on)
–
– V  
R
(on)
–
– Ta  
SS  
GS  
SS  
10  
9
14  
12  
Ta=25
C  
I =5A  
S
8
10  
8
7
6
6
5
4
2
4
3
2
3
4
5
6
7
8
–
–
60
–
–
40
–
–
20  
0
20  
40  
60  
80 100
 
120 140 160  
Gate to Source
V
o
ltage, V  
GS  
— V  
Ambient Temperature, Ta
 
–
–
C  
I
— V  
SW Time
 
–
– R  
S
F(S-S)  
g
1000  
10  
7
7
5
V
=0V  
5
GS  
3
2
3
2
1.0  
7
5
100  
7
5
3
2
0.1  
3
2
7
5
3
2
t
10  
7
5
r
0.01  
7
V
V
=5V  
=3.8V  
5
SS  
3
2
3
2
GS  
I =5A  
S
0.001  
1.0  
1.0  
0.2  
0.4  
0.6  
0.8  
1.0  
1.2  
2
3
5
7
2
10  
Forward Source to Source
V
o
ltage, V  
— V  
Gate Resistance, Rg
 
–
–
k
  
F(S-S)  
V
—
Q
g  
S O A  
GS  
4.5  
4.0  
3.5  
3.0  
2.5  
2.0  
100  
7
V
=6V  
SS  
5
(PW
10
s)  
=60A  
I =14A  
I
I =14A  
SP  
S
S
3
2
10  
7
5
10ms  
3
2
1.0  
7
5
Operation in this area  
is limited by R
 
(on).  
SS  
3
2
1.5  
1.0  
0.1  
7
5
Ta=25
  
C
Single pulse  
3
2
0.5  
0
Surface mounted on ceramic substrate  
(5000mm

2

0.8mm)  
0.01  
0.01  
0
5
10  
15  
20  
25  
30  
35  
40  
2
3
5
7
2
3
5
7
2
3
5
7
10  
2
3
0.1  
1.0  
Total Gate Charge, Qg
 
–
–
n
C  
Source to Source
V
o
ltage, V  
— V  
SS  
4

EFC2J004NUZ  
P
— Ta  
T
1.6  
Surface mounted on ceramic substrate  
(5000mm

2

0.8mm)  
1.4  
1.2  
1.0  
0.8  
0.6  
0.4  
0.2  
0
0
25  
50  
75  
100  
125  
150  
175  
200  
Ambient Temperature, Ta
 
–
–
C  
R
—
P
ulse
 
Time  
JA  
100  
7
5
Duty Cycle=0.5  
3
2
0.2  
0.1  
10  
7
5
3
2
1.0  
7
5
3
2
Surface mounted on ceramic substrate  
(5000mm

2

0.8mm)  
0.1  
0.00001  
2
3
5
7
2
3
5
7
2
3
5
7
2
3
5
7
2
3
5
7
2
3
5
7
0.0001  
0.001  
0.01  
0.1  
1.0  
10  
Pulse Time, PT
 
–
– s  
5

EFC2J004NUZ  
PACKAGE DIMENSIONS  
unit : mm  
WLCSP6, 2.11×1.18×0.10  
CASE 567NP  
ISSUE B  
NOTES:  
1. DIMENSIONING
 
AND TOLERANCING PER  
ASME Y14.5M, 1994.  
2. CONTROLLING
 
DIMENSION: MILLIMETERS.  
D
A
B
E
MILLIMETERS  
DIM  
A
b
b1  
b2  
D
E
e
e2  
MIN  
0.08  
0.22  
0.27  
0.575  
NOM  
0.10  
0.25  
0.30  
0.605  
2.11 BSC  
1.18 BSC  
0.55 BSC  
0.6775 BSC  
MAX  
0.12  
0.28  
0.33  
0.635  
PIN A1  
REFERENCE  
2X  
0.05  
0.05  
C
C
2X  
TOP VIEW  
SIDE VIEW  
A
0.05  
0.05  
C
RECOMMENDED  
SOLDERING FOOTPRINT*  
C
SEATING  
PLANE  
4X  
C
2X  
0.605  
0.25  
PACKAGE  
OUTLINE  
4X
b2  
0.05  
e2  
0.55  
PITCH  
M
C A  
B
1
2
3
4X  
0.30  
e
1
0.678  
PITCH  
DIMENSIONS: MILLIMETERS  
6
5
4
4X
b1  
*For additional information on our Pb-Free strategy and soldering  
details, please download the ON Semiconductor Soldering and  
Mountin
g
T
e
chniques Reference Manual, SOLDERRM/D.  
2X  
b
M
0.05  
C A B  
M
0.05  
BOTTOM VIEW  
C A B  
1 : Source1  
2 : Gate1  
3 : Source1  
4 : Source2  
5 : Gate2  
6 : Source2  
ORDERING INFORMATION  
Device  
Marking  
NA  
Package  
Shipping (Qty / Packing)  
5,000 / Tape & Reel  
WLCSP6, 2.11×1.18×0.10  
(Pb-Free / Halogen Free)  
EFC2J004NUZTDG  
† For information on tape and reel specifications, including part orientation and tape sizes, please refer to our
T
a
pe and Reel Packaging Specifications  
Brochure, BRD8011/D.
 
http://www.onsemi.com/pub_link/Collateral/BRD8011-D.PDF  
Note on usage : Since the EFC2J004NUZ is a MOSFET product, please avoid using this device in the vicinity  
of highly charged objects. Please contact sales for use except the designated application.  
ON Semiconductor and the ON Semiconductor logo are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries  
in the United States and/or other countries. ON Semiconductor owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other  
Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or  
guarantee regarding the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or  
use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. Buyer is  
responsible for its products and applications using ON Semiconductor products, including compliance with all laws, regulations and safety requirements or  
standards, regardless of any support or applications information provided by ON Semiconductor. “Typical” parameters which may be provided in ON  
Semiconductor data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters,  
including “Typicals” must be validated for each customer application by customer’s technical experts. ON Semiconductor does not convey any license under its  
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systems or any FDA Class 3 medical devices or medical devices with a same or similar classification in a foreign jurisdiction or any devices intended for  
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expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or  
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