onsemi-FCH104N60

Part #onsemi-FCH104N60
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onsemi-FCH104N60
June 2014  
FCH104N60  
N-Channel SuperFET
 
II MOSFET  
®
600 V, 37 A, 104 m
Ω  
Features  
Description  
•
•
•
•
•
•
650 V @ T

J

= 150°C  
SuperFET

®

II MOSFET is Fairchild Semiconductor’s brand-new  
high voltage super-junction (SJ) MOSFET family that is utilizing  
charge balance technology for outstanding low on-resistance  
and lower gate charge performance. This advanced technology  
is tailored to minimize conduction loss, provide superior  
switching performance, and withstand extreme dv/dt rate and  
higher avalanche energy. Consequently, SuperFET II MOSFET  
is suitable for various AC/DC power conversion for system  
miniaturization and higher efficiency.  
Typ. R

DS(on)

= 96 m
Ω  
Ultra Low Gate Charge (Typ. Q

g

= 63 nC)  
Low Effective Output Capacitance (Typ. C

oss(eff.)

= 280 pF)  
100% Avalanche
T
e
sted  
RoHS Compliant  
Applications  
•
•
T
e
lecom / Sever Power Supplies  
Industrial Power Supplies  
D
G
G
D
S
TO-247  
S
Absolute Maximum Ratings
T

C

= 25

o

C unless otherwise noted.  
Symbol  
V

DSS  

Parameter  
FCH104N60  
600  
Unit  
Drain to Source Voltage  
Gate to Source Voltage  
V
– DC  
±20  
V

GSS  

I

D  

V
A
– AC  
(f > 1 Hz)  
±30  
– Continuous (T

C

= 25

o

C)  
– Continuous (T

C

= 100

o

C)  
– Pulsed  
37  
Drain Current  
24  
I

DM  

E

AS  

I

AR  

Drain Current  
(Note 1)  
(Note 2)  
(Note 1)  
(Note 1)  
111  
A
mJ  
A
Single Pulsed Avalanche Energy  
Avalanche Current  
809  
6.8  
E

AR  

Repetitive Avalanche Energy  
MOSFET dv/dt  
3.57  
100  
mJ  
dv/dt  
P

D  

V/ns  
Peak Diode Recovery dv/dt  
(Note 3)  
20  
(T

C

= 25

o

C)  
– Derate Above 25

o

C  
357  
W
W/

o

C  

o

C  
Power Dissipation  
2.85  
-55 to +150  
300  
T

J

, T

STG  

T

L  

Operating and Storage
T
e
mperature Range  
Maximum Lead
T
e
mperature for Soldering, 1/8” from Case for 5 Seconds  

o

C  
Thermal Characteristics  
Symbol  
Parameter  
Unit  
FCH104N60  
R

θ
JC  

R

θ
JA  

Thermal Resistance, Junction to Case, Max.  
Thermal Resistance, Junction to Ambient, Max.  
0.35  
40  

o

C/W  
1
©2014 Fairchild Semiconductor Corporation  
FCH104N60 Rev. C0  

Package Marking and Ordering Information  
Part Number  
Top Mark  
Package  
Packing Method  
Reel Size  
Tape Width  
Quantity  
FCH104N60  
FCH104N60  
TO-247  
Tube  
N/A  
N/A  
30 units  
Electrical Characteristics

T

C

= 25

o

C unless otherwise noted.  
Symbol  
Parameter  
Test Conditions  
Min.  
Typ.  
Max.  
Unit  
Off Characteristics  
V

GS

= 0 V, I

D

= 10 mA, T

J

= 25
°
C  
600  
650  
–
–
–
–
V
V
BV

DSS  

Drain to Source Breakdown Voltage  
V

GS

= 0 V, I

D

= 10 mA, T

J

= 150
°
C  
Δ
BV

DSS  

/
Δ
T

J  

Breakdown Voltage
T
e
mperature  
Coefficient  
I

D

= 10 mA, Referenced to 25

o

C  

DS

= 600 V, V

GS

= 0 V  
–
0.67  
–
V/

o

C  
V
–
–
–
–
1.98  
–
1
–
I

DSS  

I

GSS  

Zero Gate Voltage Drain Current  
Gate to Body Leakage Current  
μ
A  
V

DS

= 480 V, V

GS

= 0
V
,
T

C

= 125

o

C  
V

GS

= ±20 V, V

DS

= 0 V  
±100  
nA  
On Characteristics  
V

GS(th)  

R

DS(on)  

g

FS  

Gate Threshold Voltage  
V

GS

= V

DS

, I

D

= 250
μ
A  
V

GS

= 10 V, I

D

= 18.5 A  
V

DS

= 20
V
,
I

D

= 18.5 A  
2.5  
–
3.5  
104  
–
V
m
Ω  
S
Static Drain to Source On Resistance  
Forward Transconductance  
–
–
96  
33  
Dynamic Characteristics  
C

iss  

Input Capacitance  
–
–
–
–
–
–
–
–
3130  
75  
4165  
pF  
pF  
pF  
pF  
nC  
nC  
nC  
Ω
V

DS

= 380 V, V

GS

= 0 V,  
f = 1 MHz  
C

oss  

C

rss  

Output Capacitance  
100  
Reverse Transfer Capacitance  
Effective Output Capacitance  
T
o
tal Gate Charge at 10V  
Gate to Source Gate Charge  
Gate to Drain “Miller” Charge  
Equivalent Series Resistance  
3.66  
280  
63  
–
–
C

oss(eff.)  

Q

g(tot)  

Q

gs  

V

DS

= 0 V to 480
V
,
V

GS

= 0 V  
82  
–
V
V

DS

= 380 V, I

D

= 18.5 A,  

GS

= 10 V  
14  
(Note 4)  
Q

gd  

15  
–
ESR  
f = 1 MHz  
0.97  
–
Switching Characteristics  
t

d(on)  

t

r  

t

d(off)  

t

f  

Turn-On Delay Time  
Turn-On Rise Time  
Turn-Off Delay Time  
Turn-Off Fall Time  
–
–
–
–
26  
18  
72  
3.3  
62  
46  
ns  
ns  
ns  
ns  
V

DD

= 380 V, I

D

= 18.5 A,  
V

GS

= 10 V, R

g

= 4.7
Ω  
154  
17  
(Note 4)  
Drain-Source Diode Characteristics  
I

S  

Maximum Continuous Drain to Source Diode Forward Current  
Maximum Pulsed Drain to Source Diode Forward Current  
–
–
–
–
–
–
–
37  
114  
1.2  
–
A
A
I

SM  

V

SD  

t

rr  

Drain to Source Diode Forward Voltage  
Reverse Recovery Time  
V

GS

= 0 V, I

SD

= 18.5 A  
–
V
414  
8.8  
ns  
μ
C  
V

GS

= 0 V, I

SD

= 18.5 A,  
dI

F

/dt = 100 A/
μ
s  
Q

rr  

Reverse Recovery Charge  
–
Notes:  
1. Repetitive Rating: pulse width limited by maximum junction temperature.  
2. I
 
= 6.8 A, R
 
= 25
Ω
, Starting T
 
= 25
°
C  
AS  
G
J
3. I
 
≤
18.5 A, di/dt
≤
200 A/
μ
s, V
 
≤
380
V
, Starting T
 
= 25
°
C  
SD  
DD  
J
4. Essentially Independent of Operating
T
e
mperature.  
©2014 Fairchild Semiconductor Corporation  
FCH104N60 Rev. C0  
2

Typical Characteristics  
Figure 1. On-Region Characteristics  
Figure 2. Transfer Characteristics  
200  
100  
*Notes:  
V

GS

=
10.0V  
1. V

DS

= 10V  
8.0V  
6.0V  
5.5V  
5.0V  
4.5V  
4.0V  
100  
2. 250
μ
s Pulse Test  
150

o

C  
25

o

C  
-55

o

C  
10  
10  
*Notes:  
1. 250
μ
s Pulse Test  
2. T

C

= 25

o

C  
1
1
0.3  
2
3
4
5
6
7
1
10  
20  
V

GS

, Gate-Source Voltage[V]  
V

DS

, Drain-Source Voltage[V]  
Figure 3. On-Resistance Variation vs.  
Drain Current and Gate Voltage  
Figure 4. Body Diode Forward Voltage  
Variation vs. Source Current  
and Temperature  
200  
100  
0.24  
*Notes:  
1. V

GS

= 0V  
*Note: T

C

= 25

o

C  
2. 250
μ
s Pulse Test  
10  
0.20  
0.16  
150

o

C  
1
25

o

C  
0.1  
V

GS

= 10V  
0.12  
0.01  
0.001  
V

GS

= 20V  
0.08  
0.0  
0.3  
0.6  
0.9  
1.2  
1.5  
0
20  
40  
60  
80  
100  
V

SD

, Body Diode Forward Voltage [V]  
I

D

, Drain Current [A]  
Figure 5. Capacitance Characteristics  
Figure 6. Gate Charge Characteristics  
10  
20000  
*Note: I

D

= 18.5A  
10000  
1000  
100  
10  
V

DS

= 120V  
C

iss  

8
V

DS

= 300V  
V

DS

= 480V  
6
C

oss  

4
2
0
*Note:  
1. V

GS

= 0V  
2. f = 1MHz  
1
C
C
C
= C
 
+ C
 
(C =
 
shorted)  
gs gd
 
ds  
iss  
= C
 
+ C  
ds gd  
C

rss  

oss  
rss  
= C  
gd  
0.1  
0
14  
28  
42  
56  
70  
0.1  
1
10  
100  
600  
Q

g

, Total Gate Charge [nC]  
V

DS

, Drain-Source Voltage [V]  
©2014 Fairchild Semiconductor Corporation  
FCH104N60 Rev. C0  
3

Typical Characteristics
(Continued)  
Figure 7. Breakdown Voltage Variation  
vs. Temperature  
Figure 8. On-Resistance Variation  
vs. Temperature  
1.2  
2.5  
*Notes:  
1. V

GS

= 0V  
*Notes:  
1. V

GS

= 10V  
2. I

D

= 10mA  
1.1  
2. I

D

= 18.5A  
2.0  
1.5  
1.0  
0.5  
1.0  
0.9  
0.8  
-100  
-50  
0
50  
100  
150  
200  
-100  
-50  
0
50  
100  
150  
200  
T

J

, Junction Temperature [

o

C]  
T

J

, Junction Temperature [

o

C]  
Figure 9. Maximum Safe Operating Area  
Figure 10. Maximum Drain Current  
vs. Case Temperature  
40  
30  
20  
10  
0
300  
10
μ
s  
100  
100
μ
s  
10  
1ms  
10ms  
Operation in This Area  
is Limited by R

DS(on)  

DC  
1
0.1  
*Notes:  
1. T

C

= 25

o

C  
2. T

J

= 150

o

C  
3. Single Pulse  
100  
0.01  
25  
50  
75  
100  
125  
150  
1
10  
1000  
T

C

, Case Temperature [

o

C]  
V

DS

, Drain-Source Voltage [V]  
Figure 11. Eoss vs. Drain to Source Voltage  
20  
16  
12  
8
4
0
0
120  
240  
360  
480  
600  
V

DS

, Drain to Source Voltage [V]  
©2014 Fairchild Semiconductor Corporation  
FCH104N60 Rev. C0  
4

Typical Characteristics
(Continued)  
Figure 12. Transient Thermal Response Curve  
1
0.5  
0.1  
0.2  
0.1  
P

DM  

0.05  
t

1  

t

2  

0.02  
0.01  
0.01  
1E-3  
*Notes:  
1. Z

θ
JC

(t) = 0.35

o

C/W Max.  
2. Duty Factor, D= t

1

/t

2  

3. T

JM

– T

C

= P

DM

* Z

θ
JC

(t)  
Single pulse  
10

-5  

10

-4  

10

-3  

10

-2  

10

-1  

1
10  
Rectangular Pu
se Durat
on [sec]  
©2014 Fairchild Semiconductor Corporation  
FCH104N60 Rev. C0  
5

Figure 13. Gate Charge Test Circuit & Waveform  
I
= const.  
G
Figure 14. Resistive Switching Test Circuit & Waveforms  
R

L  

V

DS  

90%  
V

DS  

V

DD  

V

GS  

R

G  

10%  
V

GS  

DUT  
V
GS  
t

d(on)  

t

r  

t

d(off)  

t

f  

t

on  

t

off  

Figure 15. Unclamped Inductive Switching Test Circuit & Waveforms  
V

GS  

©2014 Fairchild Semiconductor Corporation  
FCH104N60 Rev. C0  
6

Figure 16. Peak Diode Recovery dv/dt Test Circuit & Waveforms  
+
DUT  
V

DS  

_
I

SD  

L
Driver  
R

G  

Same Type  
as DUT  
V

DD  

V

GS  

• dv/dt controlled by
 
R

G  

• I

SD

controlled by pulse period  
Gate Pulse Width  
————————–  
V

GS  

D =  
Gate Pulse Period  
10V  
( Driver )  
I

FM

, Body Diode Forward Current  
I

SD  

di/dt  
( DUT )  
I

RM  

Body Diode Reverse Current  
Body Diode Recovery dv/dt  
V

SD  

V

DS  

( DUT )  
V

DD  

Body Diode  
Forward Voltage Drop  
©2014 Fairchild Semiconductor Corporation  
FCH104N60 Rev. C0  
7

Mechanical Dimensions  
TO-247 3L  
Figure 17. TO-247,Molded, 3 Lead, Jedec Variation AB  
Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner  
without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or  
obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions, specif-  
ically the warranty therein, which covers Fairchild products.  
Always visit Fairchild Semiconductor’s online packaging area for the most recent package drawings:  
©2014 Fairchild Semiconductor Corporation  
FCH104N60 Rev. C0  
8

TRADEMARKS  
The following includes registered and unregistered trademarks and service marks, owned by Fairchild Semiconductor and/or its global subsidiaries, and is not  
intended to be an exhaustive list of all such trademarks.  
AccuPower™  
F-PFS™  
®*  
AX-CAP

®

*  
FRFET

®  

®
BitSiC™  
Global Power Resource

SM  

GreenBridge™  
Green FPS™  
Green FPS™ e-Series™  
G
max
™  
GTO™  
IntelliMAX™  
ISOPLANAR™  
Marking Small Speakers Sound Louder  
and Better™  
MegaBuck™  
MICROCOUPLER™  
MicroFET™  
MicroPak™  
MicroPak2™  
PowerTrench

®  

PowerXS™  
TinyBoost

®  

TinyBuck

®  

TinyCalc™  
TinyLogic

®  

Build it Now™  
CorePLUS™  
CorePOWER™  
CROSSVOLT
™  
CTL™  
Current Transfer Logic™  
DEUXPEED

®  

Dual Cool™  
EcoSPARK

®  

EfficentMax™  
ESBC™  
Programmable Active Droop™  
QFET

®  

QS™  
TINYOPTO™  
TinyPower™  
TinyPWM™  
Quiet Series™  
RapidConfigure™  
™
TinyWire™  
TranSiC™  
ng our world, 1mW/W/kW at a time™  
SignalWise™  
SmartMax™  
SMART START™  
Solutions for Your Success™  
SPM

®  

TriFault Detect™  
TRUECURRENT

®

*  
μ
SerDes™  
®
Fairchild

®  

MillerDrive™  
STEALTH™  
UHC

®  

Fairchild Semiconductor

®  

FACT Quiet Series™  
FACT

®  

MotionMax™  
SuperFET

®  

Ultra FRFET™  
UniFET™  
VCX™  
VisualMax™  
VoltagePlus™  
XS™  
mWSaver

®  

SuperSOT™-3  
SuperSOT™-6  
SuperSOT™-8  
SupreMOS

®  

SyncFET™  
Sync-Lock™  
FAST

®  

FastvCore™  
FETBench™  
FPS™  
OptoHiT™  
OPTOLOGIC

®  

OPTOPLANAR

®  

? ?
™  
*Trademarks of System General Corporation, used under license by Fairchild Semiconductor.  
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THESE SPECIFICATIONS DO NOT EXPAND THE TERMS OF FAIRCHILD’S WORLDWIDE TERMS AND CONDITIONS, SPECIFICALLY THE WARRANTY  
THEREIN, WHICH COVERS THESE PRODUCTS.  
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FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE  
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As used here in:  
1. Life
 
support devices or systems are devices or systems which, (a) are  
intended for surgical implant into the body or (b) support or sustain life,  
and (c) whose failure to perform when properly used in accordance with  
instructions for use provided in the labeling, can be reasonably  
expected to result in a significant injury of the user.  
2. A
 
critical component in any component of a life support, device, or  
system whose failure to perform can be reasonably expected to cause  
the failure of the life support device or system, or to affect its safety or  
effectiveness.  
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PRODUCT STATUS DEFINITIONS  
Definition of Terms  
Datasheet Identification  
Product Status  
Definition  
Datasheet contains the design specifications for product development. Specifications  
may change in any manner without notice.  
Advance Information  
Formative / In Design  
Datasheet contains preliminary data; supplementary data will be published at a later  
date. Fairchild Semiconductor reserves the right to make changes at any time without  
notice to improve design.  
Preliminary  
First Production  
Datasheet contains final specifications. Fairchild Semiconductor reserves the right to  
make changes at any time without notice to improve the design.  
No Identification Needed  
Obsolete  
Full Production  
Datasheet contains specifications on a product that is discontinued by Fairchild  
Semiconductor. The datasheet is for reference information only.  
Not In Production  
Rev. I68  
©2014 Fairchild Semiconductor Corporation  
FCH104N60 Rev. C0  
9