onsemi-FCMT080N65S3
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N‐Channel, SUPERFET
)
III,
Easy-Drive
650
V
,
8
0 m
W
, 38 A
FCMT080N65S3
General Description
SUPERFET III MOSFET is ON Semiconductor’s brand
−
new high
voltage super
−
junction (SJ) MOSFET family that is utilizing charge
balance technology for outstanding low on
−
resistance and lower gate
charge performance. This advanced technology is tailored to minimize
conduction loss, provide superior switching performance, and
withstand extreme dv/dt rate.
V
R
MAX
I MAX
D
DSS
DS(ON)
650 V
80 m
ꢀ
@ 10 V
38 A
D
Consequently, SUPERFET III MOSFET Easy
−
drive series helps
manage EMI issues and allows for easier design implementation.
The Power88 package is an ultra
−
slim surface
−
mount package
2
(1 mm
high) with a low profile and small footprint (8×8 mm ).
G
SUPERFET III MOSFET in a Power88 package offers excellent
switching performance due to lower parasitic source inductance and
separated power and drive sources. Power88 offers Moisture
Sensitivity Level 1 (MSL 1).
S1: Driver Source
S2: Power Source
S1
S2
POWER MOSFET
Features
G
•
700 V @ T
= 150
°
C
J
S1
S2
•
Typ R
= 70 m
ꢀ
DS(on)
S2
•
Ultra Low Gate Charge (Typ. Q
= 71 nC)
g
•
Low Effective Output Capacitance (Typ. C
•
100% Avalanche Tested
= 570 pF)
oss(eff.)
TDFN4 8X8
CASE 520AB
•
These Devices are Pb
−
Free and are RoHS Compliant
Applications
•
Telecom / Server Power Supplies
•
Industrial Power Supplies
•
UPS / Solar
MARKING DIAGRAM
FCMT
080N65S3
AWLYWW
FCMT080N65S3 =
Specific Device Code
A
WL
Y
= Assembly Location
= Wafer Lot
=
Y
e
ar
WW
= Work
Week
ORDERING INFORMATION
this data sheet.
©
Semiconductor Components Industries, LLC, 2018
1
Publication Order Number:
February, 2020
−
Rev. 1
FCMT080N65S3/D
FCMT080N65S3
ABSOLUTE MAXIMUM RATINGS
(T =
25
°
C, Unless otherwise specified)
C
Symbol
Parameter
Value
650
30
Unit
V
V
DSS
V
GSS
Drain to Source Voltage
Gate to Source Voltage
DC
V
AC (f > 1 Hz)
30
V
I
D
Drain Current
Continuous (T
= 25
°
C)
38
A
C
Continuous (T
= 100
°
C)
24
C
I
Drain Current
95
A
mJ
A
DM
E
MOSFET dv/dt
180
4.6
AS
AS
I
E
2.6
mJ
V/ns
AR
dv/dt
100
20
Power Dissipation
P
(T =
25
°
C)
C
260
2.08
−
55 to +150
300
W
W/
°
C
°
C
D
Derate Above 25
°
C
T , T
Operating and Storage
T
e
mperature Range
J
STG
T
Maximum Lead
T
e
mperature for Soldering, 1/8
″
from Case for 5 s
°
C
L
Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality
should not be assumed, damage may occur and reliability may be affected.
1. Repetitive
rating: pulse
−
width limited by maximum junction temperature.
2. I
= 4.6 A, R
= 25
ꢀ
starting T
= 25
°
C
AS
G
J
3. I
≤
19 A, di/dt
≤
200 A/
ꢁ
s, V
≤
400
V
,
s
tarting T
= 25
°
C
SD
DD
J
THERMAL CHARACTERISTICS
Symbol
Parameter
Value
0.48
45
Unit
Thermal Resistance, Junction to Case, Max.
°
C/W
R
R
ꢂ
JC
JA
ꢂ
2
4. Device
on 1 in
pad 2 oz copper pad on 1.5 x 1.5 in. board of FR
−
4 material.
ORDERING INFORMATION
†
Device
Marking
Package
Reel Size
Tape Width
Quantity
FCMT080N65S3
FCMT080N65S3
TDFN4
13
″
13.3 mm
3000 Units
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our
T
a
pe and Reel Packaging
Specifications Brochure, BRD8011/D.
2
FCMT080N65S3
ELECTRICAL CHARACTERISTICS
(T =
25
°
C unless otherwise noted)
C
Symbol
Parameter
Test Conditions
Min
Typ
Max
Unit
OFF CHARACTERISTICS
BV
Drain to Source Breakdown Voltage
650
700
−
−
−
−
−
−
V
V
V
= 0
V
, I
= 1 mA, T
= 25
_
C
DSS
GS
D
J
V
GS
= 0
V
, I
= 1 mA, T
= 150
_
C
D
J
ꢃ
BV
/
ꢃ
T
Breakdown Voltage
T
e
mperature
Coefficient
I
D
= 1 mA, Referenced to 25
_
C
0.63
V/
_
C
DSS
J
I
Zero Gate Voltage Drain Current
V
= 650
V
, V
= 0 V
−
−
−
−
3.0
−
10
−
ꢁ
A
nA
V
DSS
DS
GS
V
DS
= 520
V
, T
=
1
25
_
C
C
I
Gate to Body Leakage Current
V
GS
=
30
V
, V
= 0 V
100
GSS
DS
ON CHARACTERISTICS
V
Gate Threshold Voltage
V
GS
= V
, I
= 0.88 mA
2.5
−
−
4.5
80
−
GS(th)
DS(on)
DS
D
R
Static Drain to Source On Resistance
Forward Transconductance
V
V
= 10
V
, I
=
1
9 A
70
21
m
ꢀ
GS
DS
D
g
= 20
V
, I
=
1
9 A
−
S
FS
D
DYNAMIC CHARACTERISTICS
C
Input Capacitance
−
−
−
−
−
−
−
−
2765
65
−
−
−
−
−
−
−
−
pF
pF
pF
pF
nC
nC
nC
ꢀ
iss
V
= 400
V
, V
= 0 V, f = 1
M
Hz
GS
DS
C
Output Capacitance
oss
C
Effective Output Capacitance
Energy Related Output Capacitance
T
o
tal Gate Charge at 10V
Gate to Source Gate Charge
Gate to Drain “Miller” Charge
Equivalent Series Resistance
V
V
= 0 V to 400 V, V
= 0 V
570
94
oss(eff.)
DS
GS
C
= 0 V to 400 V, V
= 0 V
GS
oss(er.)
DS
Q
71
g(tot)
V
DS
= 400
V
, I
=
1
9 A, V
= 10 V
D
GS
Q
16
gs
Q
29
gd
ESR
f = 1 MHz
0.55
SWITCHING CHARACTERISTICS
t
Turn-On Delay Time
Turn-On Rise Time
Turn-Off Delay Time
Turn-Off Fall Time
−
−
−
−
24
28
71
5.4
−
−
−
−
ns
ns
ns
ns
d(on)
V
= 400
V
, I
=
1
9 A,
D
t
r
DD
GS
V
= 10
V
, R
=
4
.7
ꢀ
g
t
d(off)
t
f
SOURCE-DRAIN DIODE CHARACTERISTICS
I
Maximum Continuous Source to Drain Diode Forward Current
Maximum Pulsed Source to Drain Diode Forward Current
Source to Drain Diode Forward
−
−
−
−
−
−
38
95
A
A
V
S
I
SM
V
SD
1.2
V
GS
= 0
V
, I
=
1
9 A
SD
Voltage
t
Reverse Recovery Time
Reverse Recovery Charge
−
−
405
7.7
−
−
ns
rr
V
DD
= 400
V
, I
=
1
9 A,
SD
F
dI /dt
= 100 A/
ꢁ
s
Q
ꢁ
C
rr
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
5. Essentially
independent of operating temperature typical characteristics.
3
FCMT080N65S3
TYPICAL CHARACTERISTICS
100
10
100
V
GS
= 10 V
V
= 20 V
DS
250
ꢁ
s Pulse
T
e
st
5.5 V
5.0 V
10
7.0 V
6.5 V
1
T =
150
°
C
J
6.0 V
T =
25
°
C
J
250
ꢁ
s Pulse
T
e
st
= 25
°
C
T
C
T =
−
55
°
C
J
0.1
1
0.1
1
10
20
2.5
3.5
V ,
GATE
−
TO
−
SOURCE VOLTAGE (V)
GS
4.5
5.5
6.5
7.5
V
DS
, DRAIN
−
TO
−
SOURCE VOLTAGE (V)
Figure 1. On
−
Region Characteristics
Figure 2. Transfer Characteristics
100
10
1
0.15
V
= 0 V
T
C
= 25
°
C
GS
250
ꢁ
s Pulse
T
e
st
V
GS
= 10 V
0.10
0.05
T =
150
°
C
J
0.1
V
GS
= 20 V
T =
25
°
C
J
0.01
T =
−
55
°
C
J
0.001
0
20
40
60
80
0
0.5
, BODY DIODE FORWARD VOLTAGE (V)
SD
1.0
1.5
I ,
DRAIN CURRENT (A)
D
V
Figure 3. On
−
Resistance Variation vs. Drain
Figure 4. Body Diode Forward Voltage
Variation vs. Source Current and
Temperature
Current and Gate Voltage
100K
10K
1K
10
8
V
DS
= 130 V
V
I
D
= 19 A
= 400 V
C
DS
iss
6
C
100
oss
f = 1 MHz
= 0 V
4
V
GS
C
rss
10
1
C
C
C
= C
+ C
(C =
shorted)
2
0
iss
gs
gd
ds
= C
+ C
oss
rss
ds gd
= C
gd
0.1
1
10
100
1K
0
20
40
60
80
V
DS
, DRAIN
−
TO
−
SOURCE VOLTAGE (V)
Q ,
TOTAL GATE CHARGE (nC)
g
Figure 5. Capacitance Characteristics
Figure 6. Gate Charge Characteristics
4
FCMT080N65S3
TYPICAL CHARACTERISTICS
1.2
1.1
1.0
3.0
V
= 0 V
= 10 mA
V
= 10 V
GS
GS
I
D
I =
19 A
D
2.5
2.0
1.5
1.0
0.9
0.8
0.5
0
−
50
0
50
100
150
−
50
0
50
100
150
T , JUNCTION TEMPERATURE (
°
C)
J
T , JUNCTION TEMPERATURE (
°
C)
J
Figure 7. Breakdown Voltage Variation
vs. Temperature
Figure 8. On
−
Resistance Variation
vs. Temperature
200
100
40
30
20
30
ꢁ
s
100
ꢁ
s
1 ms
10
Operation in this
Area is Limited by
R
DS(on)
10 ms
DC
1
10
0
T
C
= 25
°
C
Single Pulse
T =
150
°
C
J
0.1
1
10
100
1000
25
50
75
100
125
150
V
DS
, DRAIN
−
TO
−
SOURCE VOLTAGE (V)
T ,
CASE TEMPERATURE (
°
C)
C
Figure 9. Maximum Safe Operating Area
Figure 10. Maximum Drain Current
vs. Case Temperature
20
15
10
5
0
0
130
260
390
520
650
V
DS
, DRAIN
−
TO
−
SOURCE VOLTAGE (V)
Figure 11. E
OSS
vs. Drain
−
to
−
Source Voltage
5
FCMT080N65S3
TYPICAL CHARACTERISTICS
2
1
50% Duty Cycle
20%
10%
5%
0.1
2%
Notes:
(t) = r(t) x R
P
DM
1%
Z
ꢂ
0.01
ꢂ
JC
JC
R
= 0.48
°
C/W
ꢂ
JC
t
Peak T
= P
x Z
(t) + T
JC C
1
ꢂ
J
DM
Single Pulse
Duty Cycle, D = t
/t
t
1
2
2
0.001
−
5
−
4
−
3
−
2
−
1
0
10
10
10
10
10
10
t, RECTANGULAR PULSE DURATIONTIME (s)
Figure 12. Transient Thermal Response Curve
6
FCMT080N65S3
V
GS
R
Q
g
L
V
DS
Q
Q
gs
gd
V
GS
DUT
I
G
= Const.
Charge
Figure 13. Gate Charge Test Circuit & Waveform
R
L
V
DS
GS
90%
90%
10%
90%
V
DS
V
DD
V
GS
R
G
10%
V
DUT
V
GS
t
t
d(off)
t
r
t
f
d(on)
t
on
t
off
Figure 14. Resistive Switching Test Circuit & Waveforms
L
2
1
2
E
AS
+
@
LI
AS
V
DS
BV
DSS
I
D
I
AS
R
G
V
DD
I (t)
D
DUT
V
DD
V
GS
V
DS
(t)
t
p
Time
t
p
Figure 15. Unclamped Inductive Switching Test Circuit & Waveforms
7
FCMT080N65S3
+
DUT
V
DS
−
I
SD
L
Driver
R
G
Same Type
as DUT
V
DD
V
GS
−
dv/dt controlled by R
G
−
I controlled
by pulse period
SD
Gate Pulse Width
D
+
Gate Pulse Period
V
GS
10 V
(Driver)
I
, Body Diode Forward Current
FM
I
di/dt
SD
(DUT)
I
RM
Body Diode Reverse Current
Body Diode Recovery dv/dt
V
DS
V
DD
V
SD
(DUT)
Body Diode
Forward Voltage Drop
Figure 16. Peak Diode Recovery dv/dt Test Circuit & Waveforms
8
MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS
TDFN4 8×8, 2P
CASE 520AB
ISSUE O
DATE 24 APR 2019
GENERIC
MARKING DIAGRAM*
XXXX = Specific Device Code
A
L
Y
W
G
= Assembly Location
= Wafer Lot
=
Y
e
ar
= Work Week
= Pb
−
Free Package
*This information is generic. Please refer to
XXXXXXXX
XXXXXXXX
AWLYWW
device data sheet for actual part marking.
Pb
−
Free indicator, “G” or microdot “
G
”, may
or may not be present. Some products may
not follow the Generic Marking.
Electronic versions are uncontrolled except when accessed directly from the Document Repository.
Printed versions
are uncontrolled
except when stamped
“CONTROLLED COPY” in red.
DOCUMENT NUMBER:
DESCRIPTION:
98AON73688G
TDFN4 8×8, 2P
PAGE 1 OF 1
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©
Semiconductor Components Industries, LLC, 2018
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,
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onsemi
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−
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