onsemi-FCPF11N60T

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March 2014  
FCP11N60/FCPF11N60  
General Description  
Features  
SuperFET® MOSFET is Fairchild Semiconductor’s first  
genera-tion of high voltage super-junction (SJ) MOSFET  
family that is utilizing charge balance technology for  
outstanding low on-resistance and lower gate charge  
performance. This technology is tailored to minimize  
conduction loss, provide superior switch-ing performance,  
dv/dt rate and higher avalanche energy. Con-sequently,  
SuperFET MOSFET is very suitable for the switching  
power applications such as PFC, server/telecom power,  
FPD TV power, ATX power and industrial power  
applications.  
•
•
•
•
•
650V @T
 
= 150
°
C  
Typ. Rds(on)=0.32
Ω  
Ultra low gate charge (typ. Qg=40nC)  
Low effective output capacitance (typ. Coss.eff=95pF)  
100% avalanche tested  
j
•
RoHS
C
ompliant  
D
G
G
G
D
S
D
TO-220F  
TO-220  
S
S
Absolute Maximum Ratings  
T =
 
25°C unless otherwise noted  
C
Symbol  
Parameter  
FCP11N60  
FCPF11N60  
Units  
A
I
– Continuous (T
 
= 25°C)  
Drain Current  
11  
7
11*  
7*  
D
C
– Continuous (T
 
= 100°C)  
A
C
I
(Note 1)  
Drain Current  
– Pulsed  
33  
33*  
A
DM  
V
E
I
Gate-Source Voltage  
±
30  
V
GSS  
AS  
(Note 2)  
(Note 1)  
(Note 1)  
(Note 3)  
Single Pulsed Avalanche Energy  
Avalanche Current  
340  
11  
mJ  
A
AR  
E
Repetitive Avalanche Energy  
Peak Diode Recovery dv/dt  
12.5  
4.5  
mJ  
V/ns  
W
AR  
dv/dt  
P
Power Dissipation (T
 
= 25°C)  
125  
1.0  
36  
D
C
– Derate above 25°C  
Operating and Storage
T
e
mperature Range  
0.29  
W/°C  
°C  
T , T  
-55 to +150  
J
STG  
Maximum lead temperature for soldering purposes,  
T
300  
°C  
L
1/8
”
from case for 5 seconds  
* Drain current limited by maximum junction termperature  
Thermal Characteristics  
Symbol  
Parameter  
FCP11N60  
1.0  
FCPF11N60  
Units  
°C
/
W  
°C
/
W  
°C
/
W  
R
R
R
Thermal Resistance, Junction-to-Case  
Thermal Resistance, Case-to-Sink  
3.5  
—  
θ
JC  
0.5  
θ
CS  
θ
JA  
Thermal Resistance, Junction-to-Ambient  
62.5  
62.5  
©2008 Fairchild Semiconductor Corporation  
FCP11N60/FCPF11N60 Rev. C0  
1

Package Marking and Ordering Information  
Part Number  
FCP11N60  
Top Mark  
FCP11N60  
FCPF11N60  
FCPF11N60T  
Package  
TO-220  
Packing Method  
Reel Size  
N/A  
Tape Width  
N/A  
Quantity  
50 units  
50 units  
50 units  
Tube  
Tube  
Tube  
FCPF11N60  
FCPF11N60T  
TO-220F  
TO-220F  
N/A  
N/A  
N/A  
N/A  
Electrical Characteristics  
T =
 
25°C unless otherwise noted  
C
Symbol  
Parameter  
Test Conditions  
Min  
Typ  
Max Units  
Off Characteristics  
V
V
= 0
V
, I
 
=
2
50
µ
A, T
 
= 25°C  
D J  
600  
—  
—  
—  
—  
V
V
GS  
GS  
BV  
Drain-Source Breakdown Voltage  
DSS  
= 0 V, I
 
= 250
µ
A, T
 
= 150°C  
650  
D
J
∆
BV  
Breakdown Voltage
T
e
mperature Coef-  
ficient  
DSS  
I
= 250
µ
A, Referenced to 25°C  
—  
—  
0.6  
—  
—  
V/°C  
V
D
/
∆
T  
J
Drain-Source Avalanche Breakdown  
Voltage  
BV  
I
V
= 0
V
, I
 
= 11 A  
700  
DS  
GS  
D
V
V
V
V
= 600
V
, V
 
= 0 V  
—  
—  
—  
—  
—  
—  
—  
—  
1
µ
A  
µ
A  
nA  
nA  
DSS  
DS  
DS  
GS  
GS  
GS  
Zero Gate Voltage Drain Current  
= 480
V
, T
 
=
1
25°C  
10  
C
I
I
= 30
V
, V
 
= 0 V  
Gate-Body Leakage Current, Forward  
Gate-Body Leakage Current, Reverse  
100  
-100  
GSSF  
DS  
= -30
V
, V
 
= 0 V  
GSSR  
DS  
On Characteristics  
V
V
V
V
= V
 
, I
 
= 250
µ
A  
Gate Threshold Voltage  
3.0  
—  
—  
5.0  
0.38  
—  
V
Ω
S
GS(th)  
DS  
GS  
DS  
GS  
D
R
Static Drain-Source  
On-Resistance  
DS(on)  
= 10
V
, I
 
=
5
.5 A  
0.32  
9.7  
D
g
= 40
V
, I
 
=
5
.5 A  
(Note 4)  
Forward Transconductance  
—  
FS  
D
Dynamic Characteristics  
C
C
C
Input Capacitance  
—  
—  
—  
1148 1490  
pF  
pF  
pF  
iss  
V
= 25
V
, V
 
= 0 V,  
GS  
DS  
Output Capacitance  
671  
63  
870  
82  
oss  
rss  
f = 1.0 MHz  
Reverse Transfer Capacitance  
V
= 480
V
, V
 
= 0 V,  
DS  
GS  
C
C
Output Capacitance  
—  
—  
35  
95  
—  
—  
pF  
pF  
oss  
oss  
f = 1.0 MHz  
eff.  
V
= 0V to 480
V
, V
 
= 0 V  
GS  
Effective Output Capacitance  
DS  
Switching Characteristics  
t
t
t
t
Turn-On Delay Time  
Turn-On Rise Time  
Turn-Off Delay Time  
Turn-Off Fall Time  
T
o
tal Gate Charge  
Gate-Source Charge  
Gate-Drain Charge  
—  
—  
—  
—  
—  
—  
—  
34  
98  
80  
205  
250  
120  
52  
ns  
ns  
d(on)  
V
= 300
V
, I
 
= 11 A,  
DD  
D
r
R
= 25
Ω  
G
119  
56  
ns  
d(off)  
f
(Note 4, 5)  
(Note 4, 5)  
ns  
Q
Q
Q
40  
nC  
nC  
nC  
g
V
V
= 480
V
, I
 
= 11 A,  
DS  
GS  
D
7.2  
21  
—  
= 10 V  
gs  
gd  
—  
Drain-Source Diode Characteristics and Maximum Ratings  
I
Maximum Continuous Drain-Source Diode Forward Current  
—  
—  
—  
—  
—  
—  
—  
11  
33  
1.4  
—  
A
A
S
I
Maximum Pulsed Drain-Source Diode Forward Current  
SM  
V
t
V
V
= 0
V
, I
 
= 11 A  
Drain-Source Diode Forward Voltage  
Reverse Recovery Time  
—  
V
SD  
GS  
GS  
S
= 0
V
, I
 
= 11 A,  
390  
5.7  
ns  
µ
C  
rr  
S
dI /
 
dt = 100 A/
µ
s  
(Note 4)  
Q
Reverse Recovery Charge  
—  
F
rr  
Notes:  
1. Repetitive Rating : Pulse width limited by maximum junction temperature  
2. I
 
= 5.5A, V
 
= 50V, R
 
= 25
Ω,
Starting T =
 
25°C  
AS  
DD  
G
J
3. I
 
≤
11A, di/dt
≤
200A/
µ
s, V
 
≤
BV  
Starting T =
 
25°C  
SD  
DD  
DSS,  
J
4. Pulse Test : Pulse width
≤
300
µ
s, Duty cycle
≤
2%  
5. Essentially independent of operating temperature  
©2008 Fairchild Semiconductor Corporation  
FCP11N60/FCPF11N60 Rev. C0  
2

Typical Characteristics  
10

2  

V

GS  

Top :  
15.0 V  
10.0 V  
8.0 V  
7.0 V  
6.5 V  
6.0 V  
10

1  

10

1  

10

0  

Bottom :
 
5.5 V  
150

o

C  
25

o

C  
-55

o

C  
10

0  

* Notes :  
* Note  
1. V

DS

= 40V  
2. 250
µ
s Pulse Test  
1. 250
µ
s Pulse Test  
2. T

C

= 25

o

C  
-1  
10  
-1  
10  
-1  
10  
10

0  

10

1  

2
4
6
8
10  
V

DS

, Drain-Source Voltage [V]  
V

GS

, Gate-Source Voltage
 
[V]  
Figure 1. On-Region Characteristics  
Figure 2. Transfer Characteristics  
1.0  
0.8  
0.6  
0.4  
0.2  
0.0  
10

1  

V

GS

= 10V  
V

GS

= 20V  
10

0  

150

o

C  
25

o

C  
*
N
otes :  
1. V

G
S

= 0V  
2. 250
µ
s Pulse Test  
* Note : T

J

= 25

o

C  
-1  
10  
0
5
10  
15  
20  
25  
30  
35  
40  
0.2  
0.4  
0.6  
0.8  
1.0  
1.2  
1.4  
1.6  
I

D

, Drain Current [A]  
V

SD

, Source-Drain Voltage
 
[V]  
Figure 3. On-Resistance Variation
 
vs.  
Drain Current and Gate Voltage  
Figure 4. Body Diode Forward Voltage  
Variation vs. Source Current  
and Temperature  
12  
10  
8
6000  
C

iss

= C

gs

+ C

gd

(C

ds

= shorted)  

oss

= C

ds

+ C

gd  

C

rss

= C

gd  

V

DS

= 100V  
V

DS

= 250V  
C
5000  
4000  
3000  
2000  
1000  
0
V

DS

= 400V  
C

oss  

6
* Notes :  
1. V

GS

= 0 V  
2. f = 1 MHz  
C
4
iss  
C

rss  

2
* Note : I

D

= 11A  
0
10

-1  

10

0  

10

1  

0
5
10  
15  
20  
25  
30  
35  
40  
45  
Q

G

, Total Gate Charge [nC]  
V

DS

, Drain-Source Voltage [V]  
Figure 5. Capacitance Characteristics  
Figure 6. Gate
 
Charge Characteristics  
©2008 Fairchild Semiconductor Corporation  
FCP11N60/FCPF11N60 Rev. C0  
3

Typical Characteristics
 
(Continued)  
3.0  
2.5  
2.0  
1.5  
1.0  
0.5  
0.0  
1.2  
1.1  
1.0  
*
N
otes :  
1. V

G
S

= 0 V  
2. I

D

= 250
µ
A  
0.9  
* Notes :  
1. V

G
S

= 10 V  
2. I

D

= 5.5 A  
0.8  
-100  
-50  
0
50  
100  
150  
200  
-100  
-50  
0
50  
100  
150  
200  
T

J

, Junction Temperature [

o

C
]  
T

J

, Junction Temperature [

o

C]  
Figure 7. Breakdown Voltage Variation  
vs. Temperature  
Figure 8. On-Resistance Variation  
vs. Temperature  
10

2  

10

1  

10

0  

10

2  

Operation in This Area  
is Limited by R

D
S(on)  

Operation in This Area  
is Limited by R

D
S(on)  

100 us  
100 us  
1
m
s  
10

1  

10

0  

1
m
s  
10 ms  
10 ms  
DC  
100 ms  
DC  
*
N
otes :  
*
N
otes :  
-1  
10  
1. T

C

= 25

o  

C
-1  
10  
1. T

C

= 25

o  

C
2. T

J

= 150

o  

C
2. T

J

= 150

o  

3. Single Pulse  
C
3. Single Pulse  
-2  
-2  
10  
10  
10

0  

10

1  

10

2  

10

3  

10

0  

10

1  

10

2  

10

3  

V

DS

, Drain-Source Voltage [V]  
V

D
S

,
D
rain-Source Voltage [V]  
Figure 9-1. Maximum Safe Operating Area  
for FCP11N60  
Figure 9-2. Maximum Safe Operating Area  
for FCPF11N60  
12.5  
10.0  
7.5  
5.0  
2.5  
0.0  
25  
50  
75  
100  
125  
150  
T

C

, Case Temperature [

o

C]  
Figure 10. Maximum Drain Current  
vs. Case
 
Temperature  
©2008 Fairchild Semiconductor Corporation  
FCP11N60/FCPF11N60 Rev. C0  
4

Typical Characteristics
 
(Continued)  
10

0  

D
=
0.5  
0.2  
*
N
o
tes  
1.

J
C

(
t)  
2. D
 
uty F
 
actor, D
 
=t

1

/t

2  

:
Z
=
1.0

o

C /W
 
M
a
x.  
0.1  
10

-1  

θ
0.05  
3. T

J
M  

–
T

C  

=
P

D M
 

* Z

J
C

(
t)  
θ
0.02  
0.01  
P

DM  

t

1  

t

2  

single pulse  
10

-2  

10

-5  

10

-4  

10

-3  

10

-2  

10

-1  

10

0  

10

1  

t

1

, S
 
q
uare W
 
ave P
 
ulse D
 
uration [sec]  
Figure 11-1. Transient Thermal Response Curve for FCP11N60  
D=0
.
5  
10

0  

0.2  
0.1  
*
N
o
tes  
1.

J
C

(
t)  
2. D
 
uty Factor, D
 
=t

1

/t

2  

:
Z
=
3.5

o

C /W
 
M ax.  
θ
0.05  
3. T

J
M  

–
T

C  

=
P

D M
 

* Z

J
C

(
t)  
θ
10

-1  

0.02  
0.01  
P

DM  

t

1  

t

2  

single pulse  
10

-2  

10

-5  

10

-4  

10

-3  

10

-2  

10

-1  

10

0  

10

1  

t

1

,
S
quare W
 
ave Pu
l
s
e Duration [sec]  
Figure 11-2. Transient Thermal Response Curve for FCPF11N60  
©2008 Fairchild Semiconductor Corporation  
FCP11N60/FCPF11N60 Rev. C0  
5

Figure 12. Gate Charge Test Circuit & Waveform  
V

GS  

Same Type  
50K
Ω
 
as DUT  
Q

g  

12V  
200nF  
10V  
300nF  
V

DS  

V

GS  

Q

gs  

Q

gd  

DUT  
3mA  
Charge  
Figure 13.
 
Resistive Switching Test Circuit & Waveforms  
R

L  

V

DS  

90%  
V

DS  

V

DD  

V

GS  

R

G  

10%  
V

GS  

DUT  
10V  
t

d(on)  

t

r  

t

d(off)  

t

f  

t

on  

t

off  

Figure 14.
 
Unclamped Inductive Switching Test Circuit & Waveforms  
BV

DSS  

——————–  
BV

DSS

– V

DD  

L
1
2
2
—-  
E

AS  

=
L I

AS  

V

DS  

I

D  

BV

DSS  

I

AS  

R

G  

V

DD  

I

D

(t)  
V

DD  

V

DS

(t)  
DUT  
10V  
t

p  

t

p  

Time  
©2008 Fairchild Semiconductor Corporation  
FCP11N60/FCPF11N60 Rev. C0  
6

Figure 15.
 
Peak Diode Recovery dv/dt Test Circuit & Waveforms  
+
DUT  
V

DS  

_
I

SD  

L
Driver  
R

G  

Same Type  
as DUT  
V

DD  

V

GS  

• dv/dt controlled by
 
R

G  

• I

SD

controlled by pulse period  
Gate Pulse Width  
————————–  
V

GS  

D =  
Gate Pulse Period  
10V  
( Driver )  
I

FM

, Body Diode Forward Current  
I

SD  

di/dt  
( DUT )  
I

RM  

Body Diode Reverse Current  
Body Diode Recovery dv/dt  
V

SD  

V

DS  

( DUT )  
V

DD  

Body Diode  
Forward Voltage Drop  
©2008 Fairchild Semiconductor Corporation  
FCP11N60/FCPF11N60 Rev. C0  
7

SUPPLIER “B” PACKAGE  
SHAPE  
‘ꢀꢁꢂꢂ  
3.50  
10.67  
9.65  
SUPPLIER “A” PACKAGE  
SHAPE  
E
3.40  
2.50  
16.30  
13.90  
IF PRESENT, SEE NOTE “D”  
E
16.51  
15.42  
9.40  
8.13  
E
1
2
3
4.10  
2.70  
[2.46]  
C
14.04  
12.70  
2.13  
2.06  
FRONT VIEWS  
H
4.70  
4.00  
1.62  
1.42  
1.62  
1.10  
2.67  
2.40  
“A1”  
8.65  
7.59  
1.00  
0.55  
SEE NOTE “F”  
ꢃƒ  
ꢄƒ  
ꢃƒ  
ꢄƒ  
6.69  
6.06  
OPTIONAL  
CHAMFER  
E
14.30  
11.50  
NOTE “I”  
BOTTOM VIEW  
NOTES:  
A) REFERENCE
 
JEDEC, TO-220, VARIATION AB  
B) ALL
 
DIMENSIONS ARE IN MILLIMETERS.  
C) DIMENSIONS
 
COMMON TO ALL PACKAGE  
SUPPLIERS EXCEPT WHERE NOTED [
 
].  
D) LOCATION
 
OF MOLDED FEATURE MAY VARY  
(LOWER LEFT CORNER, LOWER CENTER  
AND CENTER OF THE PACKAGE)  
3
2
1
E DOES
 
NOT COMPLY JEDEC STANDARD VALUE.  
F) “A1” DIMENSIONS AS BELOW:  
SINGLE GAUGE = 0.51 – 0.61  
DUAL GAUGE
 
= 1.10 – 1.45  
G) DRAWING
 
FILE NAME: TO220B03REV9  
H
PRESENCE IS SUPPLIER DEPENDENT  
I) SUPPLIER
 
DEPENDENT MOLD LOCKING HOLES  
IN HEATSINK.  
0.60  
0.36  
2.85  
2.10  
BACK VIEW  
SIDE VIEW  

10.36  
9.96  
2.66  
2.42  
B
A
B
3.28  
3.08  
7.00  
3.40  
3.20  
0.70  
SEE NOTE “F”  
SEE NOTE “F”  
6.88  
6.48  
1 X
4
5°  
16.07  
15.67  
B
16.00  
15.60  
B
(3.23)  
3
1
1.47  
1.24  
2.96  
2.56  
2.14  
0.90  
0.70  
0.50  
10.05  
9.45  
M
A
30°  
0.45  
0.25  
0.60  
0.45  
B
2.54  
2.54  
4.90  
4.50  
B
NOTES:  
A. EXCEPT WHERE NOTED CONFORMS TO  
EIAJ SC91A.  
B
DOES NOT COMPLY EIAJ STD. VALUE.  
C. ALL DIMENSIONS ARE IN MILLIMETERS.  
D. DIMENSIONS ARE EXCLUSIVE OF BURRS,  
MOLD FLASH AND TIE BAR PROTRUSIONS.  
E. DIMENSION AND TOLERANCE AS PER ASME  
Y14.5-1994.  
F. OPTION 1 – WITH SUPPORT PIN HOLE.  
OPTION 2 – NO SUPPORT PIN HOLE.  
G. DRAWING FILE NAME: TO220M03REV5  

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