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June 2014
FDB024N08BL7
N-Channel PowerTrench
MOSFET
80 V, 229 A, 2.4 m
Ω
®
Features
Description
•
•
•
•
•
•
•
R
DS(on)
= 1.7 m
Ω
( Typ.) @ V
GS
= 10
V
,
I
D
= 100 A
This N-Channel MOSFET is produced using Fairchild
Semiconductor’s advance PowerTrench
®
process that has been
tailored to minimize the on-state resistance while maintaining
superior switching performance.
Low FOM R
DS(on) *
Q
G
Low Reverse Recovery Charge, Q
rr
= 112 nC
Soft Reverse Recovery Body Diode
Enables Highly Efficiency in Synchronous Rectification
Fast Switching Speed
Applications
•
•
•
Synchronous Rectification for ATX / Server /
T
e
lecom PSU
RoHS Compliant
Battery Protection Circuit
Motor drives and Uninterruptible Power Supplies
•
Qualified according to JEDEC Standards JESD22-A113F and
IPC/JEDEC J-STD-020D.1
D(Pin4, tab)
1. Gate
4
2. Source
3. Source
4. Drain
5. Source
6. Source
7. Source
G
(Pin1)
1
2
3
5
D2-PAK
(TO-263)
6
7
S(Pin2,3,5,6,7)
MOSFET Maximum Ratings
T
C
= 25
o
C unless otherwise noted
Symbol
V
DSS
V
GSS
Parameter
FDB024N08BL7
Unit
V
Drain to Source Voltage
Gate to Source Voltage
80
±20
V
– Continuous (T
C
= 25
o
C, Silicon Limited)
– Continuous (T
C
= 100
o
C, Silicon Limited)
– Continuous (T
C
= 25
o
C, Package Limited)
229*
162*
120
I
D
Drain Current
A
I
DM
Drain Current
– Pulsed
(Note 1)
(Note 2)
(Note 3)
916
A
mJ
E
AS
dv/dt
Single Pulsed Avalanche Energy
Peak Diode Recovery dv/dt
917
6.0
V/ns
W
W/
o
C
o
C
(T
C
= 25
o
C)
– Derate Above 25
o
C
246
P
D
Power Dissipation
1.64
T
J
, T
STG
T
L
Operating and Storage
T
e
mperature Range
-55 to +175
Maximum Lead
T
e
mperature for Soldering,
1/8” from Case for 5 Seconds
300
o
C
*Calculated continuous current based on maximum allowable junction temperature. Package limitation current is 120 A.
Thermal Characteristics
Symbol
R
θ
JC
R
θ
JA
Parameter
Thermal Resistance, Junction to Case, Max.
Thermal Resistance, Junction to Ambient, Max.
Unit
FDB024N08BL7
0.61
62.5
o
C/W
©2012 Fairchild Semiconductor Corporation
FDB024N08BL7 Rev.C4
1
Package Marking and Ordering Information
Part Number
Top Mark
Package
Packing Method
Reel Size
Tape Width
Quantity
FDB024N08B
D2PAK-7L
T
a
pe and Reel
330 mm
24 mm
800 units
FDB024N08BL7
Electrical Characteristics
T
C
= 25
o
C unless otherwise noted
Symbol
Parameter
Test Conditions
Min.
Typ.
Max.
Unit
Off Characteristics
BV
DSS
Drain to Source Breakdown Voltage
I
D
= 250
μ
A, V
GS
= 0 V
D
= 250
μ
A, Referenced to 25
o
C
DS
= 64 V, V
GS
= 0 V
80
–
–
–
–
V
Δ
BV
DSS
Δ
T
J
Breakdown Voltage
T
e
mperature
Coefficient
I
0.05
V/
o
C
V
–
–
–
–
–
–
1
I
DSS
I
GSS
Zero Gate Voltage Drain Current
Gate to Body Leakage Current
μ
A
V
DS
= 64 V, T
C
= 150
o
C
500
±100
V
GS
= ±20 V, V
DS
= 0 V
nA
On Characteristics
V
GS(th)
R
DS(on)
g
FS
Gate Threshold Voltage
V
GS
= V
DS
, I
D
= 250
μ
A
V
GS
= 10 V, I
D
= 100 A
V
DS
= 10
V
,
I
D
= 100 A
2.5
–
4.5
2.4
–
V
m
Ω
S
Static Drain to Source On Resistance
Forward Transconductance
–
–
1.7
227
Dynamic Characteristics
C
iss
Input Capacitance
–
–
–
–
–
–
–
–
–
10170
1670
35
13530
pF
pF
pF
pF
nC
nC
nC
nC
Ω
V
DS
= 40 V, V
GS
= 0 V,
f = 1 MHz
C
oss
C
rss
Output Capacitance
2220
Reverse Transfer Capacitance
Engry Related Output Capacitance
T
o
tal Gate Charge at 10V
–
C
oss
(er)
Q
g(tot)
Q
gs
V
DS
= 40 V, V
GS
= 0 V
3025
137
56
–
178
V
DS
= 40 V, V
GS
= 10 V,
Gate to Source Gate Charge
Gate Charge Threshold to Plateau
Gate to Drain “Miller” Charge
Equivalent Series Resistance (G-S)
–
–
–
–
I
D
= 100 A
Q
gs2
Q
gd
25
(Note 4)
28
ESR
f = 1MHz
2.4
Switching Characteristics
t
d(on)
t
r
t
d(off)
t
f
Turn-On Delay Time
Turn-On Rise Time
Turn-Off Delay Time
Turn-Off Fall Time
–
–
–
–
47
66
87
41
104
142
184
92
ns
ns
ns
ns
V
DD
= 40 V, I
D
= 100 A,
V
GS
= 10 V, R
G
= 4.7
Ω
(Note 4)
Drain-Source Diode Characteristics
I
S
Maximum Continuous Drain to Source Diode Forward Current
Maximum Pulsed Drain to Source Diode Forward Current
–
–
–
–
–
–
–
229*
916
1.3
–
A
A
I
SM
V
SD
t
rr
Drain to Source Diode Forward Voltage
Reverse Recovery Time
V
GS
= 0 V, I
SD
= 100 A
–
V
80
112
ns
nC
V
GS
= 0 V, V
DD
= 40 V, I
SD
= 100 A,
dI
F
/dt = 100 A/
μ
s
Q
rr
Reverse Recovery Charge
–
Notes:
1. Repetitive rating: pulse width limited by maximum junction temperature.
2. L = 3 mH, I
= 24.72 A, R
= 25
Ω
, starting T
= 25
°
C.
AS
G
J
3. I
≤
100 A, di/dt
≤
200 A/
μ
s, V
≤
BV
, starting T
= 25
°
C.
SD
DD
DSS
J
4. Essentially independent of operating temperature typical characteristics.
©2012 Fairchild Semiconductor Corporation
FDB024N08BL7 Rev.C4
2
Typical Performance Characteristics
Figure 1. On-Region Characteristics
Figure 2. Transfer Characteristics
500
500
*Notes:
1. V
DS
= 10V
100
10
2. 250
μ
s Pulse Test
100
175
o
C
25
o
C
V
GS
= 15.0V
10.0V
10
8.0V
6.5V
6.0V
5.5V
5.0V
1
*Notes:
1. 250
μ
s Pulse Test
2. T
C
= 25
o
C
-55
o
C
0.1
0.01
1
0.1
1
5
2.5 3.0 3.5 4.0 4.5 5.0 5.5 6.0 6.5
V
DS
, Drain-Source Voltage[V]
V
GS
, Gate-Source Voltage[V]
Figure 3. On-Resistance Variation vs.
Figure 4. Body Diode Forward Voltage
Variation vs. Source Current
and Temperature
Drain Current and Gate Voltage
2.0
1.8
1.6
1.4
1.2
1.0
500
100
V
GS
= 10V
25
o
C
175
o
C
10
V
GS
= 20V
*Notes:
1. V
GS
= 0V
*Note: T
C
= 25
o
C
2. 250
μ
s Pulse Test
1
0.2
0
100
200
300
400
0.4
0.6
0.8
1.0
1.2 1.3
I
D
, Drain Current [A]
V
SD
, Body Diode Forward Voltage [V]
Figure 5. Capacitance Characteristics
Figure 6. Gate Charge Characteristics
10
30000
10000
V
DS
= 16V
DS
= 40V
V
DS
= 64V
8
C
iss
V
6
4
2
0
1000
C
oss
*Note:
1. V
GS
= 0V
2. f = 1MHz
100
10
C
rss
C
C
C
= C
+ C
(
C =
shorted
)
gs gd
ds
iss
= C
+ C
ds gd
oss
rss
= C
gd
*Note: I
D
= 100A
90 120
0
30
60
150
0.1
1
10
80
Q
g
, Total Gate Charge [nC]
V
DS
, Drain-Source Voltage [V]
©2012 Fairchild Semiconductor Corporation
FDB024N08BL7 Rev.C4
3
Typical Performance Characteristics
(Continued)
Figure 7. Breakdown Voltage Variation
vs. Temperature
Figure 8. On-Resistance Variation
vs. Temperature
2.1
1.8
1.5
1.2
1.08
1.04
1.00
0.96
0.9
0.6
*Notes:
1. V
GS
= 10V
*Notes:
1. V
GS
= 0V
2. I
D
= 100A
2. I
D
= 250
μ
A
0.92
-80
-40
0
40
80
120 160 200
-80
-40
0
40
80
120 160 200
o
o
T
J
, Junction Temperature
[
C
]
T
J
, Junction Temperature
[
C
]
Figure 9. Maximum Safe Operating Area
Figure 10. Maximum Drain Current
vs. Case Temperature
2000
1000
10us
300
V
GS
= 10V
250
100us
100
1ms
200
150
100
10ms
DC
10
Operation in This Area
is Limited by R
DS(on)
1
*Notes:
1. T
C
= 25
o
C
2. T
J
= 175
o
C
0.1
50
R
θ
JC
= 0.61
o
C/W
3. Single Pulse
0.01
0
25
0.1
1
10
100
50
75
100
125
150
175
o
V
DS
, Drain-Source Voltage [V]
T
C
, Case Temperature
[
C
]
Figure 11. Eoss vs. Drain to Source Voltage
Figure 12. Unclamped Inductive
Switching Capability
6
5
4
3
2
1
0
50
If R = 0
t
AV
= (L)
(
I
AS
)
/
(
1.3*RATED BV
DSS
-V
DD
If R = 0
t
AV
= (L/R)In
[
(
I
AS
*R
)
/
(
1.3*RATED BV
DSS
-V
DD
)
+1
]
)
STARTING T
J
= 25
o
C
10
STARTING T
J
= 150
o
C
1
0.1
0
20
40
60
80
1
10
100
1000
V
DS
, Drain to Source Voltage
[
V
]
t
AV
, Time In Avalanche [ms]
©2012 Fairchild Semiconductor Corporation
FDB024N08BL7 Rev.C4
4
Typical Performance Characteristics
(Continued)
Figure 12. Transient Thermal Response Curve
1
0.5
0.2
0.1
P
DM
0.1
t
1
0.05
t
2
*Notes:
0.02
0.01
1. Z
θ
JC
(t) = 0.61
o
C/W Max.
2. Duty Factor, D= t
1
/t
2
3. T
JM
– T
C
= P
DM
* Z
θ
JC
(t)
Single pulse
0.01
0.005
10
-5
10
-4
10
-3
10
-2
10
-1
1
Rectangular Pulse Duration [sec]
©2012 Fairchild Semiconductor Corporation
FDB024N08BL7 Rev.C4
5
Figure 13. Gate Charge Test Circuit & Waveform
Figure 14. Resistive Switching Test Circuit & Waveforms
R
L
V
DS
90%
V
DS
V
DD
V
GS
R
G
10%
V
GS
DUT
V
GS
t
d(on)
t
r
t
d(off)
t
f
t
on
t
off
Figure 15. Unclamped Inductive Switching Test Circuit & Waveforms
V
GS
©2012 Fairchild Semiconductor Corporation
FDB024N08BL7 Rev.C4
6
Figure 16. Peak Diode Recovery dv/dt Test Circuit & Waveforms
+
DUT
V
DS
_
I
SD
L
Driver
R
G
Same Type
as DUT
V
DD
V
GS
• dv/dt controlled by
R
G
• I
SD
controlled by pulse period
Gate Pulse Width
————————–
V
GS
D =
Gate Pulse Period
10V
( Driver )
I
FM
, Body Diode Forward Current
I
SD
di/dt
( DUT )
I
RM
Body Diode Reverse Current
Body Diode Recovery dv/dt
V
SD
V
DS
( DUT )
V
DD
Body Diode
Forward Voltage Drop
©2012 Fairchild Semiconductor Corporation
FDB024N08BL7 Rev.C4
7
Mechanical Dimensions
2
Figure 17. TO263 (D PAK), Molded, 7-Lead, Surface Mount
Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner
without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or
obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions, specif-
ically the warranty therein, which covers Fairchild products.
Always visit Fairchild Semiconductor’s online packaging area for the most recent package drawings:
©2012 Fairchild Semiconductor Corporation
FDB024N08BL7 Rev.C4
8
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intended to be an exhaustive list of all such trademarks.
AccuPower™
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*
BitSiC™
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®*
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®
®
tm
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GreenBridge™
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Green FPS™ e-Series™
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max
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Marking Small Speakers Sound Louder
and Better™
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Datasheet contains the design specifications for product development. Specifications
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Not In Production
Rev. I68
©2012 Fairchild Semiconductor Corporation
FDB024N08BL7 Rev.C4
9
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