onsemi-FDC3535
| Part # | onsemi-FDC3535 |
Download  | onsemi-FDC3535 |
April 2015
FDC3535
P-Channel Power Trench
MOSFET
-80 V, -2.1 A, 183 m
®
Features
General Description
Max r
DS(on)
= 183 m
at V
GS
= -10 V, I
D
= -2.1 A
Max r
DS(on)
= 233 m
at V
GS
= -4.5 V, I
D
= -1.9 A
High performance trench technology for extremely low r
DS(on)
This P-Channel MOSFET is produced
using Fairchild
Semiconductor‘s advanced
Power Trench
®
process that has
been optimized for r
DS(on)
ruggedness.
,
switching performance and
High power and current handling capability in a widely used
surface mount package
Applications
Load Switch
Fast switching speed
100% UIL
T
e
sted
RoHS Compliant
Synchronous Rectifier
S
S
4
G
3
D
D
D
D
D
D
5
6
2
1
G
D
Pin 1
D
SuperSOT
TM
-6
MOSFET Maximum Ratings
T
A
= 25 °C unless otherwise noted
Symbol
V
DS
V
GS
Parameter
Ratings
-80
Units
Drain to Source Voltage
Gate to Source Voltage
Drain Current
-Continuous
-Pulsed
V
V
±20
-2.1
-10
(Note 1a)
I
D
A
mJ
W
E
AS
P
D
Single Pulse Avalanche Energy
Power Dissipation
(Note 3)
(Note 1a)
(Note 1b)
37
1.6
Power Dissipation
0.7
T
J
, T
STG
Operating and Storage Junction
T
e
mperature Range
-55 to +150
°C
Thermal Characteristics
R
R
Thermal Resistance, Junction to Case
Thermal Resistance, Junction to Ambient
30
78
JC
JA
°C/W
(Note 1a)
Package Marking and Ordering Information
Device Marking
Device
Package
Reel Size
Tape Width
Quantity
.535
FDC3535
SSOT-6
7 ’’
8 mm
3000 units
1
©2010 Fairchild Semiconductor Corporation
FDC3535 Rev. 1.2
Electrical Characteristics
T
J
= 25 °C unless otherwise noted
Symbol
Parameter
Test Conditions
Min
Typ
Max
Units
Off Characteristics
BV
DSS
Drain to Source Breakdown Voltage
I
D
= -250
A, V
GS
= 0 V
-80
V
BV
DSS
T
J
Breakdown Voltage
T
e
mperature
Coefficient
I
D
= -250
A, referenced to 25 °C
-64
mV/°C
I
DSS
I
GSS
Zero Gate Voltage Drain Current
Gate to Source Leakage Current
V
DS
= -64 V, V
GS
= 0 V
V
GS
= ±20 V, V
DS
= 0 V
-1
A
±100
nA
On Characteristics
V
GS(th)
Gate to Source Threshold Voltage
V
GS
= V
DS
, I
D
= -250
I
D
= -250
A, referenced to 25 °C
GS
= -10
V
,
I
D
= -2.1 A
A
-1
-1.6
5
-3
V
V
GS(th)
Gate to Source Threshold Voltage
Temperature Coefficient
mV/°C
T
J
r
DS(on)
g
FS
V
147
176
246
6.3
183
233
307
Static Drain to Source On Resistance
Forward Transconductance
V
GS
= -4.5
V
,
I
D
= -1.9 A
m
S
V
GS
= -10
V
,
I
D
= -2.1 A, T
J
= 125 °C
V
DD
= -10
V
,
I
D
= -2.1 A
Dynamic Characteristics
C
iss
C
oss
C
rss
R
g
Input Capacitance
659
49
880
65
pF
pF
pF
V
DS
= -40 V, V
GS
= 0 V,
f = 1 MHz
Output Capacitance
Reverse Transfer Capacitance
Gate Resistance
24
40
5.7
Switching Characteristics
t
d(on)
t
r
t
d(off)
t
f
Turn-On Delay Time
Rise Time
6.5
3.1
23
13
10
38
10
20
10
ns
ns
V
DD
= -40
V
,
I
D
= -2.1 A,
V
GS
= -10 V, R
GEN
= 6
Turn-Off Delay Time
Fall Time
ns
2.9
14
ns
Total Gate Charge
Total Gate Charge
Total Gate Charge
Gate to Drain “Miller” Charge
V
GS
= 0 V to -10 V
nC
nC
nC
nC
Q
g(TOT)
V
GS
= 0 V to -4.5 V
6.8
1.6
2.7
V
DD
= -40 V
D
= -2.1 A
I
Q
gs
Q
gd
Drain-Source Diode Characteristics
V
SD
t
rr
Source to Drain Diode
Forward Voltage
Reverse Recovery Time
V
GS
= 0 V, I
S
= -2.1 A
I
F
= -2.1 A, di/dt = 100 A/
s
(Note 2)
-0.81
25
-1.3
40
V
ns
nC
Q
rr
Reverse Recovery Charge
23
38
NOTES:
1. R
JA
is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of the drain pins.
R
JC
is guaranteed by design while R
CA
is determined by the user’s board design.
b.175 °C/W when mounted on
a minimum pad of
2 oz
copper
a. 78 °C/W when mounted on
a 1 in
2
pad of
2 oz
copper
2. Pulse Test: Pulse Width < 300
s, Duty cycle < 2.0 %.
3. Starting T
J
= 25
o
C, L = 3 mH, I
AS
= -5 A, V
DD
= -80 V, V
GS
= -10 V.
©2010 Fairchild Semiconductor Corporation
FDC3535 Rev. 1.2
2
Typical Characteristics
T
J
= 25 °C unless otherwise noted
10
4
3
2
1
0
V
= -4.5 V
V
= -10 V
GS
GS
V
GS
= -2.5 V
V
GS
= -3 V
V
= -3.5 V
GS
8
6
4
2
0
V
GS
= -3.5 V
V
= -3 V
GS
PULSE DURATION = 80
DUTY CYCLE = 0.5% MAX
s
V
GS
= -10 V
V
GS
= -4.5 V
V
= -2.5 V
GS
PULSE DURATION = 80
s
DUTY CYCLE = 0.5% MAX
0
1
2
3
4
5
0
2
4
6
8
10
–
I
D
,
DRAIN CURRENT (A)
-V
DS
, DRAIN TO SOURCE VOLTAGE (V)
Figure 1.
On-Region Characteristics
Figur
e
2
. Normalize
d
O
n-Resistance
vs Drain Current and Gate Voltage
600
500
400
300
200
100
2.0
1.8
I
D
= – 2.1 A
V
GS
= -10 V
PULSE DURATION = 80
I
D
= -2.1 A
s
DUTY CYCLE = 0.5% MAX
1.6
1.4
1.2
1.0
0.8
0.6
0.4
T
J
= 125
o
C
T
J
= 25
o
C
2
4
6
8
10
-75 -50 -25
0
25 50 75
100 125 150
T
J
,
JUNCTION TEMPERATURE
(
o
C
)
-V
GS
, GATE TO SOURCE VOLTAGE (V)
Figur
e
3
. Normalized On
–
R
esistance
vs Junction Temperature
Figur
e
4
. On-Resistanc
e
v
s Gat
e
t
o
Source Voltage
10
8
20
10
PULSE DURATION = 80
DUTY CYCLE = 0.5% MAX
s
V
GS
= 0 V
V
DS
= -5 V
1
0.1
6
T
J
= 150
o
C
T
J
= 25
o
C
4
T
J
= 150
o
C
T
J
= 25
o
C
T
J
= -55
o
C
0.01
0.001
2
T
J
= -55
o
C
0
1
2
3
4
5
0.0
0.2
0.4
0.6
0.8
1.0
1.2
-V
GS
, GATE TO SOURCE VOLTAGE (V)
-V
SD
, BODY DIODE FORWARD VOLTAGE (V)
Figure 5.
Transfer Characteristics
Figur
e
6
. Sourc
e
t
o
D
rain
Diode
Forward Voltage vs Source Current
©2010 Fairchild Semiconductor Corporation
FDC3535 Rev. 1.2
3
Typical Characteristics
T
J
= 25 °C unless otherwise noted
10
1000
100
10
I
D
= -2.1 A
C
i
s
s
8
V
DD
= -40 V
6
V
DD
= -50 V
V
DD
= -30 V
4
2
0
C
oss
C
rss
f = 1 MHz
= 0 V
V
GS
0
3
6
9
12
15
0.1
1
10
100
Q
g
, GATE CHARGE (nC)
-V
DS
, DRAIN TO SOURCE VOLTAGE (V)
Figure 7.
Gate Charge Characteristics
Figur
e
8
. Capacitanc
e
v
s
D
rain
to Source Voltage
2.5
2.0
1.5
1.0
0.5
0.0
7
6
T
J
= 2
5
o
C
V
GS
= -10 V
5
T
J
= 100
o
C
4
3
V
GS
= -4.5 V
T
J
= 125
o
C
2
R
JA
= 78
o
C/W
50
1
0.01
25
75
100
125
150
0.1
1
10
T
,
Ambient TEMPERATURE
(
o
C
)
t
AV
, TIME IN AVALANCHE (ms)
C
Figur
e
9
. Unclamped Inductive
Switching Capability
Figur
e
1
0. Maximu
m
C
ontinuou
s
D
rain
Current vs Ambient Temperature
1000
20
10
SINGLE PULSE
JA
= 175
o
C/W
T
A
= 25
o
100 us
V
GS
= -10 V
R
C
100
10
1 ms
1
10 ms
THIS AREA IS
LIMITED BY r
DS(on)
0.1
100 ms
SINGLE PULSE
T
= MAX RATED
J
1 s
o
= 175
C/W
JA
R
10 s
DC
1
o
0.01
0.005
T
= 25
C
A
0.5
10
-4
10
-3
10
-2
t, PULSE WIDTH (s)
10
-1
1
10
100 1000
0.1
1
10
100
300
-V
DS
, DRAIN to SOURCE VOLTAGE (V)
Figure 11.
Forward Bias Safe
Operating Area
Figur
e
1
2. Single Puls
e
M
aximum
Power Dissipation
©2010 Fairchild Semiconductor Corporation
FDC3535 Rev. 1.2
4
Typical Characteristics
T
J
= 25 °C unless otherwise noted
2
DUTY CYCLE-DESCENDING ORDER
1
D = 0.5
0.2
0.1
0.05
0.02
0.01
0.1
P
DM
t
1
t
2
0.01
NOTES:
DUTY FACTOR: D = t
1
/t
2
SINGLE PULSE
R
JA
= 175
o
C/W
PEAK T
J
= P
DM
x Z
JA
x R
JA
+ T
A
0.001
10
-4
10
-3
10
-2
10
-1
t, RECTANGULAR PULSE DURATION (sec)
1
100
10
1000
Figure 13.
Junction-to-Ambient Transient Thermal Response Curve
©2010 Fairchild Semiconductor Corporation
FDC3535 Rev. 1.2
5
SYMM
C
L
0.95
0.95
C
3.00
2.80
A
1.00 MIN
6
4
B
3.00
2.60
2.60
1.70
1.50
C
1
3
0.50
0.30
0.95
0.70 MIN
M
0.20
A B
1.90
LAND PATTERN RECOMMENDATION
SEE DETAIL A
(0.30)
1.10 MAX
H
1.00
0.70
C
0.10
0.20
0.08
0.10
0.00
NOTES: UNLESS OTHERWISE SPECIFIED
A) THIS
PACKAGE CONFORMS TO JEDEC MO-193.
VAR. AA, ISSUE E.
C
B) ALL
DIMENSIONS ARE IN MILLIMETERS.
C PACKAGE
LENGTH DOES NOT INCLUDE MOLD
FLASH, PROTRUSIONS
OR GATE BURRS. MOLD
FLASH, PROTRUSIONS OR GATE BURRS SHALL
NOT EXCEED 0.25mm PER END. PACKAGE WIDTH
DOES NOT INCLUDE INTERLEAD FLASH OR
PROTRUSION. INTERLEAD FLASH OR
GAGE PLANE
0.25
PROTRUSION SHALL NOT EXCEED 0.25mm PER
SIDE. PACKAGE LENGTH AND WIDTH DIMENSIONS
ARE DETERMINED AT DATUM H.
D) DRAWING
FILE NAME: MKT-MA06AREVF
0.55
0.35
SEATING PLANE
0.60 REF
DETAIL A
SCALE: 50X
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