onsemi-FDC3612

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August 2016  
FDC3612  
100V N-Channel PowerTrench

MOSFET  
General Description  
Features  
This N-Channel MOSFET has been designed  
specifically to improve the overall efficiency of DC/DC  
converters using either synchronous or conventional  
switching PWM controllers.
 
It has been optimized for  
low gate charge, low R

DS(ON)

and fast switching speed.  
•
2.6 A, 100 V  
R

DS(ON)

= 125 m
Ω
@ V

GS

= 10 V  
R

DS(ON)

= 135 m
Ω
@ V

GS

= 6 V  
•
High performance trench technology for extremely  
low R

DS(ON)  

Applications  
•
Low gate charge (14nC typ)  
•
High power and current handling capability  
•
Fast switching speed  
•
DC/DC converter  
S
D
D
1
2
3
6
5
4
G
D
SuperSOT

T
M

-6  
D
Absolute Maximum Ratings
 
T

A

=25

o

C unless otherwise noted  
Symbol  
Parameter  
Ratings  
Units  
V

DSS  

Drain-Source Voltage  
100  
V
V
A
V

GSS  

Gate-Source Voltage  
20  
2.6  
I

D  

Drain Current
 
– Continuous  
(Note 1a)  
– Pulsed  
20  
37  
(Note 3)  
E

AS  

P

D  

Single Pulse Avalanche Energy  
mJ  
Maximum Power Dissipation  
(Note 1a)  
(Note 1b)  
1.6  
0.8  
W
T

J

, T

STG  

Operating and Storage Junction Temperature Range  
–55 to +150  
°
C  
Thermal Characteristics  
Thermal Resistance, Junction-to-Ambient  
Thermal Resistance, Junction-to-Case  
(Note 1a)  
(Note 1)  
78  
30  
R

θ
JA  

R

θ
JC  

°
C/W  
°
C/W  
Package Marking and Ordering Information  
Device Marking  
Device  
Reel Size  
Tape width  
Quantity  
.362  
FDC3612  
7’’  
8mm  
3000 units  
FDC3612 Rev 1.4  
20
12
Fairchild Semiconductor Corporation  

Electrical Characteristics  
T

A

= 25°C unless otherwise noted  
Symbol  
Parameter  
Test Conditions  
Min Typ Max
 
Units  
Drain-Source Avalanche Ratings

(Note 2)  

W

DSS  

I

AR  

Drain-Source Avalanche Energy  
Drain-Source Avalanche Current  
Single Pulse, V

DD

= 50 V, I

D

=2.6 A  
90  
2.6  
mJ  
A
Off Characteristics  
BV

DSS  

Drain–Source Breakdown Voltage  
100  
V
V

GS

= 0 V, I

D

= 250
µ
A  
∆
BV
DSS  
Breakdown Voltage Temperature  
99  
I

D

= 250
µ
A, Referenced to 25
°
C  
mV/
°
C  
Coefficient  
∆
T

J  

I

DSS  

I

GSSF  

I

GSSR  

Zero Gate Voltage Drain Current  
Gate–Body Leakage, Forward  
Gate–Body Leakage, Reverse  
V

DS

= 80 V,
 
V

GS

= 0 V  
V

GS

= 20 V, V

DS

= 0 V  
V

GS

= –20 V, V

DS

= 0 V  
10  
100  
–100  
µ
A  
nA  
nA  
On Characteristics  
(Note 2)  
V

GS(th)  

Gate Threshold Voltage  
2
2.3  
– 6  
4
V
V

DS

= V

GS

, I

D

= 250
µ
A  
I

D

= 250
µ
A, Referenced to 25
°
C  
∆
V
GS(th)  
Gate Threshold Voltage  
mV/
°
C  
Temperature Coefficient  
∆
T

J  

V

GS

= 10 V,
 
I

D

= 2.6 A  
86  
91  
125  
135  
240  
Static Drain–Source  
On Resistance  
m
Ω  
V
V
V
V

GS

= 6.0 V, I

D

= 2.5 A  
R

DS(on)  

157  

GS

= 10 V,
 
I

D

= 2.6 A;T

J

= 125
°
C  
I

D(on)  

g

FS  

On–State Drain Current  
Forward Transconductance  

GS

= 10 V,
 
V

DS

= 5 V  

DS

= 10 V,
 
I

D

= 2.6 A  
10  
A
S
10  
Dynamic Characteristics  
C

iss  

C

oss  

C

rss  

R

g  

Input Capacitance  
660  
55  
40  
pF  
pF  
pF  
V

DS

= 50 V,  
V

GS

= 0 V,  
Output Capacitance  
Reverse Transfer Capacitance  
Gate Resistance  
f = 1.0 MHz  
3.0  
0.1  
1.4  
Ω
Switching Characteristics
 

(Note 2)  

t

d(on)  

t

r  

t

d(off)  

t

f  

Turn–On Delay Time  
Turn–On Rise Time  
Turn–Off Delay Time  
Turn–Off Fall Time  
Total Gate Charge  
Gate–Source Charge  
Gate–Drain Charge  
6
3.5  
23  
3.7  
14  
2.3  
3.6  
11  
7
37  
7.4  
20  
ns  
ns  
ns  
V
V

DD

= 50 V,  

GS

= 10
 
V,  
I

D

= 1 A,  

GEN

= 6
Ω  
R
ns  
Q

g  

Q

gs  

Q

gd  

nC  
nC  
nC  
V

DS

= 50 V,  
I

D

= 2.6 A,  
V

GS

= 10 V  
Drain–Source Diode Characteristics and Maximum Ratings  
I

S  

Maximum Continuous Drain–Source Diode Forward Current  
Drain–Source Diode Forward  
1.3  
1.2  
A
V
V

SD  

V

GS

= 0 V,
 
I

S

= 1.3 A  
(Note 2)  
(Note 2)  
0.76  
Voltage  
t

rr  

Q

rr  

Diode Reverse Recovery Time  
Diode Reverse Recovery Charge  
31  
56  
nS  
nC  
I

F

= 2.6 A  
d

iF

/d

t

= 100 A/µs  
Notes:  
1.
R

θ
JA

is the sum of the junction-to-case and case-to-ambient resistance where the case thermal reference is defined as the solder mounting surface of the drain  
pins. R

θ
JC

is guaranteed by design while R

θ
CA

is determined by the user’s board design.  
a. 78°C/W
 
when mounted on a 1in

2

pad of 2oz copper on FR-4 board.  
b. 156°C/W
 
when mounted on a minimum pad.  
2.
Pulse Test: Pulse Width
≤
300
µ
s, Duty Cycle
≤
2.0%  
3.  
E
of 37 mJ is based on starting T
 
= 25
°
C; N-ch: L = 3 mH, I
 
= 5 A, V
 
= 100 V, V
 
= 10 V. 100% test at L = 0.3 mH, I
 
= 11 A.  
J AS
 
DD GS
 
AS  
AS  
FDC3612 Rev 1.4  

Typical Characteristics  
1.8  
1.6  
1.4  
1.2  
1
20  
V

GS

= 10V  
4.5V  
5.0V  
16  
V

GS

= 3.5V  
4.0V  
12  
8
4.0V  
4.5V  
5.0V  
6.0V  
10V  
3.5V  
4
0.8  
0
0
4
8
12  
16  
20  
0
2
V
4
6
8
I

D

, DRAIN CURRENT (A)  

DS

, DRAIN-SOURCE VOLTAGE (V)  
Figure 1. On-Region Characteristics.  
Figure 2. On-Resistance Variation with  
Drain Current and Gate Voltage.  
0.26  
0.23  
0.2  
2.2  
1.8  
1.4  
1
I

D

= 2.6A  

GS

= 10V  
I

D

= 1.3A  
V
T

A

= 125

o

C  
0.17  
0.14  
0.11  
0.08  
0.05  
0.6  
0.2  
T

A

= 25

o

C  
-50  
-25  
0
25  
50  
75  
100  
125  
150  
2
4
V
6
8
10  
T

J

, JUNCTION TEMPERATURE (

o

C)  

GS

, GATE TO SOURCE VOLTAGE (V)  
Figure 3. On-Resistance Variation with  
Temperature.  
Figure 4. On-Resistance Variation with  
Gate-to-Source Voltage.  
100  
20  
16  
12  
8
V

GS

= 0V  
V

DS

= 5V  
10  
T

A

= 125

o

C  
1
0.1  
25

o

C  
-55

o

C  
T

A

= 125

o

C  
0.01  
0.001  
25

o  

4
-55

o

C  
0.0001  
0
0
0.2  
0.4  
0.6  
0.8  
1
1.2  
2
2.5  
V
3
3.5  
4
4.5  
V

SD

, BODY DIODE FORWARD VOLTAGE (V)  

GS

, GATE TO SOURCE VOLTAGE (V)  
Figure 5. Transfer Characteristics.  
Figure 6. Body Diode Forward Voltage Variation  
with Source Current and Temperature.  
FDC3612 Rev 1.4  

Typical Characteristics  
10  
1000  
800  
600  
400  
200  
0
f = 1MHz  
V

GS

= 0 V  
I

D

= 2.6A  
V

DS

= 25V  
50V  
8
6
4
2
0
75V  
C

ISS  

C

OSS  

C

RSS  

0
3
6
9
12  
15  
0
20  
40  
60  
80  
100  
Q

g

, GATE CHARGE (nC)  
V

DS

, DRAIN TO SOURCE VOLTAGE (V)  
Figure 7. Gate Charge Characteristics.  
Figure 8. Capacitance Characteristics.  
5
0  
40  
30  
20  
10  
0
SINGLE PULSE  
10  
R

DS(on)

LIMIT  
R

θ
JA

= 156°C/W  
T

A

= 25°C  
100
μ
s  
1
0.1  
1ms  
10ms  
100ms  
V

GS

=10V  
SINGLE PULSE  
R

θ
JA

= 156

o

C/W  

A

= 25

o

C  
1s  
0.01  
DC  
T
0.001  
0.1  
1
10  
100  
200  
0.001  
0.01  
0.1  
1
10  
100  
V
, DRAIN to SOURCE VOLTAGE (V)  
DS  
t

1

, TIME (sec)  
Figure 9. Maximum Safe Operating Area.  
Figure 10. Single Pulse Maximum  
Power Dissipation.  
1
D = 0.5  
R

θ
JA

(t) = r(t) + R

θ
JA  

R

θ
JA

= 156 °C/W  
0.2  
P(pk)  
0.1  
0.1  
t

1  

0.05  
t

2  

T

J

– T

A

= P * R

θ
JA

(t)  
Duty Cycle, D = t

1

/ t

2  

0.02  
0.01  
SINGLE PULSE  
0.01  
0.0001  
0.001  
0.01  
0.1  
1
10  
100  
1000  
Figure 11. Transient Thermal Response Curve.  
Thermal characterization performed using the conditions described in Note 1b.  
Transient thermal response will change depending on the circuit board design.  
FDC3612 Rev 1.4  

SYMM  
C
L
0.95  
0.95  
C
3.00  
2.80  
A
1.00 MIN  
6
4
B
3.00  
2.60  
2.60  
1.70  
1.50  
C
1
3
0.50  
0.30  
0.95  
0.70 MIN  
M
0.20  
A B  
1.90  
LAND PATTERN RECOMMENDATION  
SEE DETAIL A  
(0.30)  
1.10 MAX  
H
1.00  
0.70  
C
0.10  
0.20  
0.08  
0.10  
0.00  
NOTES: UNLESS OTHERWISE SPECIFIED  
A) THIS
 
PACKAGE CONFORMS TO JEDEC MO-193.  
VAR. AA, ISSUE E.  
C
B) ALL
 
DIMENSIONS ARE IN MILLIMETERS.  
C PACKAGE
 
LENGTH DOES NOT INCLUDE MOLD  
FLASH, PROTRUSIONS
 
OR GATE BURRS. MOLD  
FLASH, PROTRUSIONS OR GATE BURRS SHALL  
NOT EXCEED 0.25mm PER END. PACKAGE WIDTH  
DOES NOT INCLUDE INTERLEAD FLASH OR  
PROTRUSION. INTERLEAD FLASH OR  
GAGE PLANE  
0.25  
8°  
0°  
PROTRUSION SHALL NOT EXCEED 0.25mm PER  
SIDE. PACKAGE LENGTH AND WIDTH DIMENSIONS  
ARE DETERMINED AT DATUM H.  
D) DRAWING
 
FILE NAME: MKT-MA06AREVF  
0.55  
0.35  
SEATING PLANE  
0.60 REF  
DETAIL A  
SCALE: 50X  

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Buyer is responsible for its products and applications using ON Semiconductor products, including compliance with all laws, regulations and safety requirements or standards,  
regardless of any support or applications information provided by ON Semiconductor. “Typical” parameters which may be provided in ON Semiconductor data sheets and/or  
specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer  
application by customer’s technical experts. ON Semiconductor does not convey any license under its patent rights nor the rights of others. ON Semiconductor products are not  
designed, intended, or authorized for use as a critical component in life support systems or any FDA Class 3 medical devices or medical devices with a same or similar classification  
in a foreign jurisdiction or any devices intended for implantation in the human body. Should Buyer purchase or use ON Semiconductor products for any such unintended or unauthorized  
application, Buyer shall indemnify and hold ON Semiconductor and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and  
expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such  
claim alleges that ON Semiconductor was negligent regarding the design or manufacture of the part. ON Semiconductor is an Equal Opportunity/Affirmative Action Employer. This  
literature is subject to all applicable copyright laws and is not for resale in any manner.  
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