onsemi-FDC6432SH
| Part # | onsemi-FDC6432SH |
| Download | onsemi-FDC6432SH |
April 2003
FDC6432SH
12V P-Channel PowerTrench
MOSFET, 30V
PowerTrench SyncFET
General Description
Features
This complementary P-Channel MOSFET with
SyncFET has been designed specifically to improve the
overall efficiency of DC/DC converters using either
•
SyncFET
2.4 A, 30V
R
DS(ON)
= 90
m
Ω
@ V
GS
= 10 V
R
DS(ON)
= 105
m
Ω
@ V
GS
= 4.5 V
synchronous
or
conventional
switching
PWM
•
P channel
–2.5 A, –12V
R
R
DS(ON)
= 90
m
Ω
@ V
GS
= –4.5 V
R
DS(ON)
= 125 m
Ω
@ V
GS
= –2.5 V
R
DS(ON)
= 220
m
Ω
@ V
GS
= –1.8 V
controllers. It
has been optimized for providing an
extremely low R
DS(ON)
in a small package.
Applications
DC/DC converter
•
Fast switching speed.
Power management
•
High performance trench technology for extremely
low R
DS(ON)
Q2(P)
G2
S2
G1
D1,2
S1
4
5
6
3
2
1
Pin 1
D1,2
Q1(N)
SuperSOT™-6
Absolute Maximum Ratings
T
A
=25
o
C unless otherwise noted
Symbol
Parameter
Ratings
Units
Q1 (N)
Q2 (P)
–12
±8
–2.5
–7
V
DSS
V
GSS
I
D
Drain-Source Voltage
Gate-Source Voltage
Drain Current– Continuous
– Pulsed
30
V
V
A
±16
2.4
7
(Note 1a)
Power Dissipation for Single Operation
(Note 1a)
(Note 1b)
1.3
0.7
P
D
W
T
J
, T
STG
Operating and Storage Junction Temperature Range
–55 to +150
°
C
Thermal Characteristics
Thermal Resistance, Junction-to-Ambient
(Note 1a)
(Note 1b)
100
175
60
R
θ
JA
°
C/W
Thermal Resistance, Junction-to-Case
(Note 1)
R
θ
JC
Package Marking and Ordering Information
Device Marking
Device
Reel Size
Tape width
Quantity
.432
FDC6432SH
7’’
8mm
3000 units
FDC6432SH Rev
B (W)
2003 Fairchild Semiconductor Corp.
Electrical Characteristics
T
A
= 25°C unless otherwise noted
Symbol
Parameter
Test Conditions
Q
Min
Typ Max
Units
Off Characteristics
Drain-Source Breakdown
V
GS
= 0 V,
V
GS
= 0 V,
I
D
= 1 mA
Q1
Q2
30
BV
DSS
V
Voltage
I
D
= –250 µA
–12
∆
BV
DSS
Breakdown Voltage
I
D
= 1 mA, Ref to 25°C
Q1
Q2
25
mV/°C
–10
Temperature Coefficient
I
D
= –250 µA, Ref to 25°C
∆
T
J
Zero Gate Voltage Drain
Current
V
DS
= 24 V,
V
GS
= 0 V
Q1
Q2
Q1
Q2
500
µA
1
I
DSS
I
GSS
V
DS
= –10 V,
V
GS
= 0 V
V
GS
= ±16 V,
V
DS
= 0 V
±100
Gate-Body Leakage
nA
V
GS
= ±8 V,
V
DS
= 0 V
±100
On Characteristics
V
DS
= V
GS
,
,
I
D
= 1 mA
Q1
Q2
1
1.5
3
V
GS(th)
Gate Threshold Voltage
V
V
DS
= V
GS
I
D
= –250 µA
–0.4
–0.7
–1.5
∆
V
GS(th)
Gate Threshold Voltage
Temperature Coefficient
I
D
= 1 mA, Ref to 25°C
Q1
Q2
–7
3
mV/°C
I
D
= –250 µA, Ref to 25°C
∆
T
J
V
GS
= 10V,
I
D
= 2.4A
75
85
90
Static Drain-Source
On-Resistance
R
DS(on)
V
GS
= 4.5V,
I
D
= 2.2A
Q1
105
140
m
Ω
m
Ω
V
GS
=10V,I
D
=2.4A,T
J
=125°C
100
V
GS
= –4.5V,
I
D
= –2.5A
V
GS
= –2.5V,
I
D
= –2.0A
V
GS
= –1.8V,
I
D
= –1.6A
V
GS
=–4.5V,I
D
=2.5A,T
J
=125°C
75
97
90
Static Drain-Source
On-Resistance
125
220
120
R
DS(on)
Q2
154
86
V
DS
= 10 V,
I
D
= 1 mA
Q1
Q2
Q1
Q2
7
g
FS
R
G
Forward Transconductance
Gate Resistance
S
V
DS
= –5 V
I
D
= –2.5A
7
5
V
GS
= 15 mV,
f = 1.0 MHz
Ω
13
Dynamic Characteristics
Q1
Q2
Q1
Q2
Q1
Q2
270
514
50
C
iss
C
oss
C
rss
Input Capacitance
pF
pF
pF
For Q1:
V
DS
=15V, V
GS
=0V, f=1MHz
For Q2:
Output Capacitance
234
20
V
DS
= –6V, V
GS
=0V, f=1MHz
Reverse Transfer Capacitance
167
Switching Characteristics
(Note 2)
Q1
Q2
Q1
Q2
Q1
Q2
5
10
23
16
22
32
35
td(on)
Turn-on Delay Time
Turn-on Rise Time
Turn-off Delay Time
Turn-off Fall Time
Total Gate Charge
Gate-Source Charge
Gate-Drain Charge
ns
ns
For Q1:
13
8
V
DS
= 15 V, I
D
= 1 A,
V
GS
= 10 V, R
GEN
= 6
Ω
For Q2:
tr
12
18
22
td(off)
tf
ns
V
DS
= –10 V, I
D
= –1 A,
V
GS
= –4.5 V, R
GEN
= 6
Ω
Q1
1.2
2.4
ns
Q2
29
46
3.5
8
Q1
Q2
Q1
Q2
Q1
Q2
2.5
5.7
0.7
1.2
0.6
1.7
For Q1:
Qg
nC
nC
nC
V
DS
= 15 V, I
D
= 2.4 A,
V
GS
= 5 V
Qgs
Qgd
For Q2:
V
DS
= –10 V, I
D
= –2.5 A,
V
GS
= –4.5 V
FDC6432SH Rev B (W)
Electrical Characteristics
T
A
= 25°C unless otherwise noted
Symbol
Parameter
Test Conditions
Q
Min
Typ Max
Units
Drain-Source Diode Characteristics
Drain-Source Diode Forward
V
GS
= 0 V, I
S
= 0.7A, Note 2
Q1
0.6
–0.7
10
700
mV
ns
A
V
SD
Voltage
V
GS
= 0 V, I
S
= –0.8A, Note 2
Q2
Q1
1200
t
RR
Reverse Recovery Time
Q2
Q1
Q2
Q1
Q2
24
For Q1:
IF = 2.4A, dIF/dt = 300A/µs
For Q2:
Maximum Reverse Recovery
Current
0.8
–0.5
4
I
RM
Q
RR
IF = –2.5A, dIF/dt = 100A/µs
nC
Reverse Recovery Charge
6
Notes:
1.
R
θ
JA
is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of
the drain pins.
R
θ
JC
is guaranteed by design while R
θ
CA
is determined by the user’s board design.
a)
100°C/W when
b)
175°C/W when mounted
on a minimum pad of 2 oz
copper
mounted on a 1in
2
pad
of 2 oz copper
Scale 1 : 1 on letter size paper
2.
Pulse Test: Pulse Width < 300
µ
s, Duty Cycle < 2.0%
FDC6432SH Rev B (W)
Typical Characteristics
: Q1
8
1.8
1.6
1.4
1.2
1
4.5V
V
GS
= 10V
6.0V
3.0V
3.5V
V
GS
= 3.0V
6
4
2
0
3.5V
4.0V
4.5V
5.0V
2.5V
6.0V
6
10V
0.8
0
1
2
3
0
2
4
I
D
, DRAIN CURRENT (A)
8
V
DS
, DRAIN TO SOURCE VOLTAGE (V)
Figure 1. On-Region Characteristics.
Figure 2. On-Resistance Variation with
Drain Current and Gate Voltage.
1.7
1.6
1.5
1.4
1.3
1.2
1.1
1
0.3
I
D
= 2.4A
I
D
= 1.2A
V
GS
= 10V
0.25
0.2
T
A
= 125
o
C
0.15
0.1
0.9
0.8
0.7
T
A
= 25
o
C
0.05
-50
-25
0
25
50
75
100
125
150
2
4
6
8
10
T
J
, JUNCTION TEMPERATURE (
o
C)
V
GS
, GATE TO SOURCE VOLTAGE (V)
Figure 3. On-Resistance Variation with
Temperature.
Figure 4. On-Resistance Variation with
Gate-to-Source Voltage.
1
7
25
o
C
V
GS
= 0V
V
DS
= 5V
6
T
A
= -55
o
C
125
o
C
5
0.1
T
A
= 125
o
C
4
3
2
1
0
25
o
C
0.01
-55
o
C
0.4
0.001
0
0.1
0.2
0.3
0.5
0.6
0.7
1
1.5
2
2.5
3
3.5
V
SD
, BODY
DIODE FORWARD VOLTAGE (V)
V
GS
, GATE TO SOURCE VOLTAGE (V)
Figure 5. Transfer Characteristics.
Figure 6. Body Diode Forward Voltage Variation
with Source Current and Temperature.
FDC6432SH Rev B (W)
Typical Characteristics
: Q1
10
400
300
200
100
0
V
DS
= 10V
20V
I
D
= 2.4A
f = 1 MHz
GS
= 0 V
15V
V
8
6
4
2
0
C
iss
C
oss
C
rss
0
1
2
3
4
5
0
5
10
15
20
25
30
Q
g
, GATE CHARGE (nC)
V
DS
, DRAIN TO SOURCE VOLTAGE (V)
Figure 7. Gate Charge Characteristics.
Figure 8. Capacitance Characteristics.
10
8
100
SINGLE PULSE
R
θ
JA
= 175°C/W
T
A
= 25°C
10
1
R
DS(ON)
LIMIT
100
µ
s
1ms
10ms
100ms
1s
6
4
10s
DC
V
GS
= 10V
SINGLE PULSE
0.1
0.01
2
R
θ
JA
= 175
o
C/W
T
A
= 25
o
C
0
0.01
0.1
1
10
100
1000
0.1
1
10
100
t
1
, TIME (sec)
V
DS
, DRAIN-SOURCE VOLTAGE (V)
Figure 9. Maximum Safe Operating Area.
Figure 10. Single Pulse Maximum
Power Dissipation.
1
D = 0.5
R
R
θ
JA
(t) = r(t) * R
θ
JA
θ
JA
= 175
o
C/W
0.2
0.1
P(pk)
0.1
0.05
0.02
0.01
t
1
t
2
T
J
– T
A
= P * R
θ
JA
(t)
Duty Cycle, D = t
1
/ t
2
SINGLE PULSE
0.01
0.0001
0.001
0.01
0.1
1
10
100
1000
t
1
, TIME (sec)
Figure 11. Transient Thermal Response Curve.
Thermal characterization performed using the conditions described in Note 1b.
Transient thermal response will change depending on the circuit board design.
FDC6432SH Rev B (W)
Typical Characteristics
: Q2
8
2.8
2.6
2.4
2.2
2
V
GS
= -4.5V
-3.5V
-2.5V
-3.0V
7
6
5
4
3
2
1
0
V
GS
=-1.8V
-2.0V
-2.0V
1.8
1.6
1.4
1.2
1
-1.8V
-2.5V
-3.0V
4
-1.5V
-3.5V
-4.5V
7
0.8
0
0.5
1
1.5
2
2.5
150
2.5
0
1
2
3
5
6
8
-V
DS
, DRAIN TO SOURCE VOLTAGE (V)
-I
D
, DRAIN CURRENT (A)
Figure 12. On-Region Characteristics.
Figure 13. On-Resistance Variation with
Drain Current and Gate Voltage.
0.29
1.4
1.3
1.2
1.1
1
I
D
= -2.5A
V
GS
= -4.5V
I
D
= -1.3A
0.25
0.21
0.17
T
A
= 125
o
C
0.13
T
A
= 25
o
C
0.09
0.9
0.8
0.05
-50
-25
0
25
50
75
100
125
1
2
3
4
5
T
J
, JUNCTION TEMPERATURE (
o
C)
-V
GS
, GATE TO SOURCE VOLTAGE (V)
Figure 14. On-Resistance Variation with
Temperature.
Figure 15. On-Resistance Variation with
Gate-to-Source Voltage.
8
10
25
o
C
V
DS
= -5V
7
6
5
4
3
2
1
0
V
GS
= 0V
1
T
A
= -55
o
C
125
o
C
T
A
= 125
o
C
0.1
25
o
C
0.01
-55
o
C
0.001
0.0001
0.5
1
1.5
2
0
0.2
0.4
0.6
0.8
1
1.2
-V
GS
, GATE TO SOURCE VOLTAGE (V)
-V
SD
, BODY
DIODE FORWARD VOLTAGE (V)
Figure 16. Transfer Characteristics.
Figure 17. Body Diode Forward Voltage Variation
with Source Current and Temperature.
FDC6432SH Rev B (W)
Typical Characteristics
: Q2
5
800
700
600
500
400
300
200
100
0
I
D
= -2.5A
V
DS
= -4V
f = 1 MHz
GS
= 0 V
-6V
V
C
ISS
4
-8V
3
2
1
0
C
OSS
C
RSS
0
1
2
3
4
5
6
7
0
3
6
9
12
Q
g
, GATE CHARGE (nC)
-V
DS
, DRAIN TO SOURCE VOLTAGE (V)
Figure 18. Gate Charge Characteristics.
Figure 19. Capacitance Characteristics.
10
10
8
R
DS(ON)
LIMIT
100
µ
s
SINGLE PULSE
1ms
10ms
100ms
1s
R
θ
JA
= 175°C/W
T
A
= 25°C
1
10s
DC
6
4
V
GS
= -4.5V
0.1
SINGLE PULSE
R
θ
JA
= 175
o
C/W
2
T
A
= 25
o
C
0.01
0
0.01
0.1
1
10
100
0.1
1
10
100
1000
-V
DS
, DRAIN-SOURCE VOLTAGE (V)
t
1
, TIME (sec)
Figure 20. Maximum Safe Operating Area.
Figure 21. Single Pulse Maximum
Power Dissipation.
1
D = 0.5
R
R
θ
JA
(t) = r(t) * R
θ
JA
θ
JA
= 175
o
C/W
0.2
0.1
P(pk)
0.1
t
1
0.05
t
2
0.02
0.01
T
J
– T
A
= P * R
θ
JA
(t)
Duty Cycle, D = t
1
/ t
2
SINGLE PULSE
0.01
0.0001
0.001
0.01
0.1
1
10
100
1000
t
1
, TIME (sec)
Figure 22. Transient Thermal Response Curve.
Thermal characterization performed using the conditions described in Note 1b.
Transient thermal response will change depending on the circuit board design.
FDC6432SH Rev B (W)
TRADEMARKS
The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is
not intended to be an exhaustive list of all such trademarksꢀ
ACEx
PACMAN
POP
Power247
PowerTrench
QFET
QS
SPM
Stealth
SuperSOT-3
SuperSOT-6
SuperSOT-8
ImpliedDisconnect
ISOPLANAR
LittleFET
MicroFET
MicroPak
MICROWIRE
MSX
FACT
ActiveArray
Bottomless
CoolFET
CROSSVOLT
DOME
EcoSPARK
E
2
CMOS
TM
EnSigna
TM
FACT Quiet Series
â
FAST
â
FASTr
FRFET
GlobalOptoisolator
GTO
HiSeC
I
2
C
SyncFET
â
QT Optoelectronics
TinyLogic
Quiet Series
RapidConfigure
RapidConnect
TruTranslation
UHC
UltraFET
MSXPro
OCX
â
OCXPro
OPTOLOGIC
Across the board
ꢀ
A
round the worldꢀ
The Power Franchise
Programmabl
e
A
ctive Droop
â
â
SILENT SWITCHER
VCX
SMAR
T
S
TART
OPTOPLANAR
DISCLAIMER
FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER
NOTICE T
O
A
NY PRODUCTS HEREIN TO IMPROVE RELIABILIT
Y
,
F
UNCTION OR DESIGNꢀ FAIRCHILD
DOES NO
T
A
SSUM
E
A
NY LIABILIT
Y
A
RISING OUT OF TH
E
A
PPLICATION OR USE O
F
A
NY PRODUCT
OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT
RIGHTS, NOR THE RIGHTS OF OTHERSꢀ
LIFE SUPPORT POLICY
FAIRCHILDS PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOU
T
T
HE EXPRESS WRITTE
N
A
PPROVA
L
O
F FAIRCHILD SEMICONDUCTOR CORPORATIONꢀ
As used herein:
1ꢀ Life support devices or systems are devices or
systems which, (a) are intended for surgical implant into
the body, or (b) support or sustain life, or (c) whose
failure to perform when properly used in accordance
with instructions for use provided in the labeling, can be
reasonably expected to result in significant injury to the
userꢀ
2ꢀ A critical component is any component of a life
support device or system whose failure to perform can
be reasonably expected to cause the failure of the life
support device or system, or to affect its safety or
effectivenessꢀ
PRODUCT STATUS DEFINITIONS
Definition of Terms
Datasheet Identification
Product Status
Definition
Advance Information
Formative or
In Design
This datasheet contains the design specifications for
product developmentꢀ Specifications may change in
any manner without noticeꢀ
Preliminary
First Production
This datasheet contains preliminary data, and
supplementary data will be published at a later dateꢀ
Fairchild Semiconductor reserves the right to make
changes at any time without notice in order to improve
designꢀ
No Identification Needed
Obsolete
Full Production
This datasheet contains final specificationsꢀ Fairchild
Semiconductor reserves the right to make changes at
any time without notice in order to improve designꢀ
Not In Production
This datasheet contains specifications on a product
that has been discontinued by Fairchild semiconductorꢀ
The datasheet is printed for reference information onlyꢀ
Revꢀ I2
