onsemi-FDD5N53TM
| Part # | onsemi-FDD5N53TM |
| Download | onsemi-FDD5N53TM |
January 2009
UniFET
TM
FDD5N53/FDU5N53
tm
N-Channel MOSFET
530V, 4A, 1.5
Ω
Features
Description
•
•
•
•
•
•
•
R
DS(on)
= 1.25
Ω
( Typ.)@ V
GS
= 10
V
,
I
D
= 2A
Low gate charge ( Typ. 11nC)
Low C
rss
( Typ. 5pF)
These N-Channel enhancement mode power field effect
transistors are produced using Fairchild’s proprietary, planar
stripe, DMOS technology.
This advanced technology has been especially tailored to
minimize on-state resistance, provide superior switching
performance, and withstand high energy pluse in the avalanche
and commutation mode. These devices are well suited for high
efficient switched mode power suppliesand active power
factor correction.
Fast switching
100% avalanche tested
Improved dv/dt capability
RoHS compliant
D
D
G
G
S
I-PAK
FDU Series
G
S
D-PAK
FDD Series
D
S
MOSFET Maximum Ratings
T
C
= 25
o
C unless otherwise noted*
Symbol
V
DSS
V
GSS
Parameter
FDD5N53/FDU5N53
Units
Drain to Source Voltage
Gate to Source Voltage
530
V
V
±30
-Continuous (T
C
= 25
o
C)
-Continuous (T
C
= 100
o
C)
– Pulsed
4
I
D
Drain Current
A
2.4
I
DM
Drain Current
(Note 1)
(Note 2)
(Note 1)
(Note 1)
(Note 3)
16
A
mJ
A
E
AS
I
AR
Single Pulsed Avalanche Energy
Avalanche Current
256
4
E
AR
dv/dt
Repetitive Avalanche Energy
Peak Diode Recovery dv/dt
4
4.5
mJ
V/ns
W
W/
o
C
o
C
(T
C
= 25
o
C)
– Derate above 25
o
C
40
P
D
Power Dissipation
0.3
T
J
, T
STG
T
L
Operating and Storage
T
e
mperature Range
-55 to +150
Maximum Lead
T
e
mperature for Soldering Purpose,
1/8” from Case for 5 Seconds
300
o
C
Thermal Characteristics
Symbol
Parameter
Thermal Resistance, Junction to Case
Thermal Resistance, Junction to Ambient
Ratings
1.4
Units
R
θ
JC
R
θ
JA
o
C/W
110
©2009 Fairchild Semiconductor Corporation
FDD5N53/FDU5N53 Rev. A
1
Package Marking and Ordering Information
T
C
= 25
o
C unless otherwise noted
Device Marking
FDD5N53
Device
Package
D-PAK
D-PAK
I-PAK
Reel Size
380mm
380mm
–
Tape Width
16mm
16mm
–
Quantity
2500
2000
70
FDD5N53TM
FDD5N53TF
FDU5N53TU
FDD5N53
FDU5N53
Electrical Characteristics
Symbol
Parameter
Test Conditions
Min.
Typ.
Max.
Units
Off Characteristics
BV
DSS
Drain to Source Breakdown Voltage
I
D
= 250
μ
A, V
GS
= 0V, T
J
= 25
o
C
530
–
–
–
–
V
Δ
BV
DSS
Δ
T
J
Breakdown Voltage
T
e
mperature
Coefficient
I
D
= 250
μ
A, Referenced to 25
o
C
0.6
V/
o
C
V
DS
= 530V, V
GS
= 0V
–
–
–
–
–
–
1
I
DSS
I
GSS
Zero Gate Voltage Drain Current
Gate to Body Leakage Current
μ
A
V
DS
= 424V, T
C
= 125
o
C
10
V
GS
= ±30V, V
DS
= 0V
±100
nA
On Characteristics
V
GS(th)
R
DS(on)
g
FS
Gate Threshold Voltage
V
GS
= V
DS
, I
D
= 250
μ
A
V
GS
= 10V, I
D
= 2A
V
DS
= 40V, I
D
= 2A
3.0
–
–
5.0
1.5
–
V
Ω
S
Static Drain to Source On Resistance
Forward Transconductance
1.25
4.3
(Note 4)
–
Dynamic Characteristics
C
iss
Input Capacitance
–
–
–
–
–
480
66
5
640
88
8
pF
pF
pF
nC
nC
V
DS
= 25V, V
GS
= 0V
f = 1MHz
C
oss
C
rss
Q
g(tot)
Q
gs
Output Capacitance
Reverse Transfer Capacitance
T
o
tal Gate Charge at 10V
Gate to Source Gate Charge
11
3
15
–
V
V
DS
= 400V, I
D
= 5A
GS
= 10V
Q
gd
Gate to Drain “Miller” Charge
–
5
–
nC
(Note 4, 5)
Switching Characteristics
t
d(on)
t
r
t
d(off)
t
f
Turn-On Delay Time
Turn-On Rise Time
Turn-Off Delay Time
Turn-Off Fall Time
–
–
–
–
13
22
28
20
36
54
66
50
ns
ns
ns
ns
V
DD
= 250V, I
D
= 5A
G
= 25
Ω
R
(Note 4, 5)
Drain-Source Diode Characteristics
I
S
Maximum Continuous Drain to Source Diode Forward Current
Maximum Pulsed Drain to Source Diode Forward Current
–
–
–
–
–
–
–
4
16
1.4
–
A
A
I
SM
V
SD
t
rr
Drain to Source Diode Forward Voltage
Reverse Recovery Time
V
GS
= 0V, I
SD
= 4A
–
V
300
1.8
ns
μ
C
V
GS
= 0V, I
SD
= 5A
dI
F
/dt = 100A/
μ
s
(Note 4)
Q
rr
Reverse Recovery Charge
–
Notes:
1: Repetitive
Rating: Pulse width limited by maximum junction temperature
2: L
= 32mH, I
= 4A, V
= 50V, R
= 25
Ω
, Starting T
= 25°C
AS
DD
G
J
3:
I
≤
4A, di/dt
≤
200A/
μ
s, V
≤
BV ,
Starting T
= 25°C
SD
DD
DSS J
4: Pulse
Test: Pulse width
≤
300
μ
s, Duty Cycle
≤
2%
5: Essentially
Independent of Operating Temperature Typical Characteristics
FDD5N53/FDU5N53 Rev. A
2
Typical Performance Characteristics
Figure 1. On-Region Characteristics
Figure 2. Transfer Characteristics
20
20
V
GS
=
15.0V
10.0V
10
10
8.0 V
7.0 V
6.5 V
6.0 V
5.5 V
150
o
C
25
o
C
1
1
-55
o
C
*Notes:
1. 250
μ
s Pulse Test
2. T
C
= 25
o
C
*Notes:
1. V
DS
= 20V
0.1
2. 250
μ
s Pulse Test
0.04
0.1
0.1
1
10
30
4
5
6
7
8
V
DS
,Drain-Source Voltage[V]
V
GS
,Gate-Source Voltage[V]
Figure 3. On-Resistance Variation vs.
Drain Current and Gate Voltage
Figure 4. Body Diode Forward Voltage
Variation vs. Source Current
and Temperature
3.0
70
2.5
150
o
C
10
V
GS
= 10V
2.0
25
o
C
V
GS
= 20V
1.5
*Notes:
1. V
GS
= 0V
*Note: T
J
= 25
o
C
2. 250
μ
s Pulse Test
1
0.4
1.0
0.8
1.2
1.6
0
3
6
9
12
V
SD
, Body Diode Forward Voltage [V]
I
D
, Drain Current [A]
Figure 5. Capacitance Characteristics
Figure 6. Gate Charge Characteristics
1000
10
C
C
C
= C
+ C
(
C =
shorted
)
gs gd
ds
iss
V
DS
= 100V
= C
+ C
ds gd
oss
rss
V
DS
= 250V
= C
gd
V
DS
= 400V
8
6
4
2
0
750
500
250
0
*Note:
1. V
GS
= 0V
2. f = 1MHz
C
iss
C
oss
C
rss
*Note: I
D
= 5A
0.1
1
10
30
0
4
8
12
Q
g
, Total Gate Charge [nC]
V
DS
, Drain-Source Voltage [V]
FDD5N53/FDU5N53 Rev. A
3
Typical Performance Characteristics
(Continued)
Figure 7. Breakdown Voltage Variation
Figure 8. On-Resistance Variation
vs. Temperature
vs. Temperature
3.0
1.2
2.5
2.0
1.5
1.0
1.1
1.0
0.9
*Notes:
1. V
GS
= 10V
*Notes:
1. V
GS
= 0V
0.5
2. I
D
= 2A
2. I
D
= 250
μ
A
0.0
-75
0.8
-75
-25
25
75
125
175
-25
25
75
125
175
T
J
, Junction Temperature
[
o
C
]
T
J
, Junction Temperature
[
o
C
]
Figure 9. Maximum Safe Operating Area
Figure 10.
Maximum Drain Current
vs. Case Temperature
4.5
30
30
μ
s
4
10
100
μ
s
1ms
3
2
1
0
10ms
1
DC
Operation in This Area
is Limited by R
DS(on)
0.1
*Notes:
1. T
C
= 25
o
C
2. T
J
= 150
o
C
3. Single Pulse
0.01
25
50
75
100
125
150
1
10
V
DS
, Drain-Source Voltage [V]
100
800
T
C
, Case Temperature
[
o
C
]
Figure 11. Transient Thermal Response Curve
3
1
0.5
0.2
P
DM
0.1
t
1
0.1
t
2
0.05
*Notes:
0.02
1. Z
θ
JC
(t) = 1.4
o
C/W Max.
2. Duty Factor, D= t
1
/t
2
3. T
JM
– T
C
= P
DM
* Z
θ
JC
(t)
0.01
Single pulse
0.01
10
-5
10
-4
10
-3
10
-2
10
-1
10
0
10
1
Rectangular Pulse Duration [sec]
FDD5N53/FDU5N53 Rev. A
4
Gate Charge Test Circuit & Waveform
Resistive Switching Test Circuit & Waveforms
Unclamped Inductive Switching Test Circuit & Waveforms
FDD5N53/FDU5N53 Rev. A
5
Peak Diode Recovery dv/dt Test Circuit & Waveforms
+
D
U
T
V
D
S
_
I
S
D
L
D
r i v
e
r
R
G
S
a
m
e
T
y
p
e
V
a
s
D
U
T
D
D
V
G
S
•
d
v
/ d
c
t
c
o
n
t r o
l l e
d
b
y
R
G
•
I
S
o
n
t r o
l l e
d
b
y
p
u
l s
e
p
e
r i o
d
D
G
a
t e
P
u
l s
e
W
i d
t h
V
– – – – – – – – – – – – – – – – – – – – – – – – – –
D
=
G
S
G
a
t e
P
u
l s
e
P
e
r i o
d
1
0
V
(
D
r i v
e
r
)
I
F
,
B
o
d
y
D
i o
d
e
F
o
r w
a
r d
C
u
r r e
n
t
M
I
S
D
d
i / d
t
(
D
U
T
)
I
R
d
M
B
o
d
y
D
e
i o
R
e
R
e
v
e
r s
d
e
C
u
r r e
n
t
V
D
S
(
D
U
T
)
B
o
d
y
S
D
i o
d
e
c
o
v
e
r y
v
/ d
t
V
V
D
D
D
B
o
d
y
D
i o
d
e
FDD5N53/FDU5N53 Rev. A
6
Mechanical Dimensions
D-PAK
Dimensions in Millimeters
FDD5N53/FDU5N53 Rev. A
7
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Datasheet Identification
Product Status
Definition
Datasheet contains the design specifications for product development. Specifications may
change in any manner without notice.
Advance Information
Formative / In Design
Datasheet contains preliminary data; supplementary data will be published at a later date.
Fairchild Semiconductor reserves the right to make changes at any time without notice to
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Not In Production
Rev. I37
FDD5N53/FDU5N53 Rev. A
9
