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March 2015
FDD8424H
Dual N & P-Channel PowerTrench
®
MOSFET
N-Channel: 40V, 20A, 24m
Ω
P-Channel: -40V, -20A, 54m
Ω
Features
General Description
Q1: N-Channel
These dual
N and P-Channel
enhancement mode
Power
MOSFE
T
s
a
re produced using Fairchild Semiconductor’s
advanced PowerTrench- process that has been especially
tailored to
minimize on-state resistance and
yet maintain
superior switching performance.
Max r
DS(on)
= 24m
Ω
at V
GS
= 10V, I
D
= 9.0A
Max r
DS(on)
= 30m
Ω
at V
GS
= 4.5V, I
D
= 7.0A
Q2: P-Channel
Max r
DS(on)
= 54m
Ω
at V
GS
= -10
V
,
I
D
= -6.5A
Application
Inverter
Max r
DS(on)
= 70m
Ω
at V
GS
= -4.5
V
,
I
D
= -5.6A
Fast switching speed
H-Bridge
RoHS Compliant
D1
D2
D1/D2
G1
G2
G2
S2
G1
S1
S1
N-Channel
S2
P-Channel
Dual DPAK 4L
MOSFET Maximum Ratings
T
C
= 25°C unless otherwise noted
Symbol
V
DS
V
GS
Parameter
Q1
Q2
-40
±20
-20
-20
-6.5
-40
35
Units
Drain to Source Voltage
Gate to Source Voltage
40
±20
20
V
V
Drain Current
– Continuous
(Package Limited)
– Continuous
(Silicon Limited)
– Continuous
T
C
= 25°C
26
I
D
A
T
A
= 25°C
9.0
55
– Pulsed
Power Dissipation for Single Operation
T
C
= 25°C
(Note 1)
T
A
= 25°C
(Note 1a)
T
A
= 25°C
(Note 1b)
(Note 3)
30
P
D
3.1
1.3
W
E
AS
Single Pulse Avalanche Energy
29
33
mJ
°C
T
J
, T
STG
Operating and Storage Junction
T
e
mperature Range
-55 to +150
Thermal Characteristics
R
θ
JC
Thermal Resistance, Junction to Case, Single Operation for Q1
Thermal Resistance, Junction to Case, Single Operation for Q2
(Note 1)
(Note 1)
4.1
3.5
°C/W
R
θ
JC
Package Marking and Ordering Information
Device Marking
Device
Package
Reel Size
13”
Tape Width
16mm
Quantity
FDD8424H
FDD8424H
TO-252-4L
2500 units
1
©2013 Fairchild Semiconductor Corporation
FDD8424H Rev.1.5
Electrical Characteristics
T
J
= 25°C unless otherwise noted
Symbol
Parameter
Test Conditions
Type
Min
Typ
Max
Units
Off Characteristics
I
D
= 250
μ
A, V
GS
= 0V
I
D
= -250
μ
A, V
GS
= 0V
Q1
Q2
40
-40
BV
DSS
Drain to Source Breakdown Voltage
V
Δ
BV
DSS
Δ
T
J
Breakdown Voltage
T
e
mperature
Coefficient
I
D
= 250
μ
A, referenced to 25°C
Q1
Q2
34
-32
mV/°C
μ
A
I
D
= -250
μ
A, referenced to 25°C
V
DS
= 32V,
V
GS
= 0V
Q1
Q2
1
-1
I
DSS
I
GSS
Zero Gate Voltage Drain Current
Gate to Source Leakage Current
V
DS
= -32V,
V
GS
= 0V
Q1
Q2
±100
±100
nA
nA
V
GS
= ±20V, V
DS
= 0V
On Characteristics
V
GS
= V
DS
, I
D
= 250
μ
A
Q1
Q2
1
-1
1.7
-1.6
3
-3
V
GS(th)
Gate to Source Threshold Voltage
V
V
GS
= V
DS
, I
D
= -250
μ
A
Δ
V
GS(th)
Δ
T
J
Gate to Source Threshold Voltage
T
e
mperature Coefficient
I
D
= 250
μ
A, referenced to 25°C
I
D
= -250
μ
A, referenced to 25°C
Q1
Q2
-5.3
4.8
mV/°C
V
V
GS
= 10V,
I
D
= 9.0A
GS
= 4.5V,
I
D
= 7.0A
19
23
29
24
30
37
Q1
Q2
V
GS
= 10V,
I
D
= 9.0A, T
J
= 125°C
r
DS(on)
Static Drain to Source On Resistance
m
Ω
V
GS
= -10
V
,
I
D
= -6.5A
V
GS
= -4.5
V
,
I
D
= -5.6A
V
GS
= -10V,
I
D
= -6.5A, T
J
= 125°C
42
58
62
54
70
80
V
DS
= 5V,
I
D
= 9.0A
Q1
Q2
29
13
g
FS
Forward Transconductance
S
V
DS
= -5
V
,
I
D
= -6.5A
Dynamic Characteristics
Q1
Q2
750
1000
1000
1330
Q1
C
iss
C
oss
C
rss
R
g
Input Capacitance
pF
pF
pF
Ω
V
DS
= 20V, V
GS
= 0
V
, f =
1
MHZ
Q1
Q2
115
140
155
185
Output Capacitance
Reverse Transfer Capacitance
Gate Resistance
Q2
V
DS
= -20V, V
GS
= 0V, f = 1MHZ
Q1
Q2
75
75
115
115
Q1
Q2
0.1
0.1
1.1
3.3
3.3
9.9
f = 1MHz
Switching Characteristics
Q1
Q2
7
7
14
14
t
d(on)
t
r
t
d(off)
t
f
Turn-On Delay Time
Rise Time
ns
ns
Q1
DD
= 20
V
,
I
D
= 9.0A,
V
GS
= 10V, R
GEN
= 6
Ω
V
Q1
Q2
13
3
24
10
Q1
Q2
17
20
31
36
Q2
Turn-Off Delay Time
Fall Time
ns
V
DD
= -20V, I
D
= -6.5A,
V
GS
= -10V, R
GEN
= 6
Ω
Q1
Q2
6
3
12
10
ns
Q1
Q2
14
17
20
24
Q
g(TOT)
Q
gs
Q
gd
T
o
tal Gate Charge
Gate to Source
Charge
Gate to Drain “Miller” Charge
nC
nC
nC
Q1
V
GS
= 10V, V
DD
= 20
V
,
I
D
= 9.0A
Q1
Q2
2.3
3.0
Q2
Q1
Q2
3.2
3.6
V
GS
= -10
V
,
V
DD
= -20V, I
D
= -6.5A
©2013 Fairchild Semiconductor Corporation
FDD8424H Rev.1.5
2
Electrical Characteristics
T
J
= 25°C unless otherwise noted
Symbol
Parameter
Test Conditions
Type
Min
Typ
Max
Units
Drain-Source Diode Characteristics
Q1
Q2
20
-20
I
S
Maximum Continuous Drain to Source Diode Forward Current
Maximum Pulsed Drain to Source Diode Forward Current
A
A
Q1
Q2
55
-40
I
SM
V
SD
t
rr
(Note 2)
Source to Drain Diode
Forward
Voltage
V
GS
= 0V, I
S
= 9.0A
GS
= 0V, I
S
= -6.5A
Q1
I
F
= 9.0A, di/dt = 100A/s
Q2
(Note 2)
Q1
(Note 2)
Q2
0.87
0.88
1.2
-1.2
V
V
Q1
Q2
25
29
38
44
Reverse Recovery Time
ns
nC
Q1
Q2
19
29
29
44
Q
rr
Reverse Recovery Charge
I
F
= -6.5A, di/dt = 100A/s
Notes:
2
1.
R
is determined with the device mounted on a 1in
pad 2 oz copper pad on a 1.5 x 1.5 in. board of FR-4 material. R
is guaranteed by design while R
is determined
θ
CA
θ
JA
θ
JC
by the
user’s board design.
b. 96°C/W when mounted on
a
minimum pad of 2 oz copper
a. 40°C/W when mounted on
a 1 in
pad of
2 oz
copper
Q1
2
Scale 1 : 1 on letter size paper
a. 40°C/W when mounted on
b. 96°C/W when mounted on
a
minimum pad of 2 oz copper
Q2
2
a 1 in
pad of
2 oz
copper
Scale 1 : 1 on letter size paper
2. Pulse Test: Pulse Width < 300
μ
s, Duty cycle < 2.0%.
3. Starting T
= 25°C, N-ch: L = 0.3mH, I
= 14A, V
= 40V, V
= 10V;
P-ch: L = 0.3mH, I
= -15A, V
= -40V, V
= -10V.
J
AS
DD
GS
AS
DD
GS
©2013 Fairchild Semiconductor Corporation
FDD8424H Rev.1.5
3
Typical Characteristics (Q1 N-Channel)
T
J
= 25°C unless otherwise noted
60
50
40
30
20
10
0
3.0
2.5
2.0
1.5
1.0
0.5
V
GS
= 4.0V
PULSE DURATION = 80
μ
s
DUTY CYCLE = 0.5%MAX
V
GS
= 3.0V
V
GS
= 10V
PULSE DURATION = 80
μ
s
DUTY CYCLE = 0.5%MAX
V
GS
= 4.0V
V
GS
= 3.5V
V
GS
= 4.5V
V
GS
= 4.5V
V
GS
= 3.5V
V
GS
= 3.0V
V
GS
= 10V
50
0
1
2
3
4
0
10
20
30
40
60
I
D
, DRAIN CURRENT(A)
V
DS
, DRAIN TO SOURCE VOLTAGE (V)
Figure 1.
On- Region Characteristics
Figur
e
2
. N
o r m a l i z e d O n – R e s i s ta n c e
vs Drain Current and Gate Voltage
1.8
1.6
1.4
1.2
1.0
0.8
0.6
50
40
30
20
10
I
D
= 9A
PULSE DURATION = 80
μ
s
DUTY CYCLE = 0.5%MAX
I
D
= 9A
V
GS
= 10V
T
J
= 125
o
C
T
J
= 25
o
C
-75 -50 -25
0
25 50 75
100 125 150
2
4
6
8
10
T
J
, JUNCTION TEMPERATURE
(
o
C
)
V
GS
, GATE TO SOURCE VOLTAGE (V)
F i gu re 3 .
N orma li zed
On -Res is ta nc e
vs Junction Temperature
Figur
e
4
. On-Resistance
vs Gate to
Source Voltage
60
50
40
30
20
10
0
60
PULSE DURATION = 80
μ
s
DUTY CYCLE = 0.5%MAX
V
GS
= 0V
10
1
V
DS
= 5V
T
J
= 150
o
C
T
J
= 25
o
C
0.1
T
J
= 150
o
C
T
J
= 25
o
C
T
J
= -55
o
C
0.01
T
J
= -55
o
C
0.001
0.0
0.3
0.6
0.9
1.2
1.5
1.5
2.0
2.5
3.0
3.5
4.0
4.5
V
SD
, BODY DIODE FORWARD VOLTAGE (V)
V
GS
, GATE TO SOURCE VOLTAGE (V)
Figure 5.
Transfer Characteristics
Figur
e
6
. Source
to Drain Diode
Forward Voltage vs Source Current
©2013 Fairchild Semiconductor Corporation
FDD8424H Rev.1.5
4
Typical Characteristics (Q1 N-Channel)
T
J
= 25°C unless otherwise noted
10
8
2000
1000
I
D
= 9A
C
iss
6
V
DD
= 20V
V
DD
= 15V
C
oss
4
V
DD
= 25V
100
30
2
f = 1MHz
= 0V
C
rss
V
GS
0
0.1
1
10
40
0
4
8
Q
,
GATE CHARGE(nC)
12
16
100
80
V
DS
,
DRAIN TO SOURCE VOLTAGE (V)
g
Figure 7.
Gate Charge Characteristics
Figur
e
8
. C
a p a c i t a n c e v s
D r a i n
to Source Voltage
30
25
20
15
10
5
30
Limited by Package
V
GS
= 10V
T
J
= 25
o
C
10
T
J
= 125
o
C
V
GS
= 4.5V
R
θ
JC
= 4.1
o
C/W
1
0.001
0
25
0.01
0.1
1
10
50
75
100
125
150
T
C
,
CASE TEMPERATURE
(
o
C
)
t
AV
, TIME IN AVALANCHE(ms)
Figure9. U
n c l a m p e d I n d u c t i v e
Switching Capability
F i g u r e 1 0 . M a x i m u m
C o n t i n u o u s D r a i n
Current vs Cas
e
T
emperature
100
10
1
10000
10us
FOR TEMPERATURES
o
V
GS
= 10V
ABOVE 25
C DERATE PEAK
CURRENT AS FOLLOWS:
100us
1000
100
10
150
–
T
C
I = I
———————–
25
125
THIS AREA IS
LIMITED BY r
DS(on)
T
C
= 25
o
C
SINGLE PULSE
1ms
T
J
= MAX RATED
θ
JC
= 4.1
o
C/W
T
C
= 25
o
C
10ms
DC
SINGLE PULSE
θ
JC
= 4.1
o
C/W
R
R
0.1
10
-5
10
-4
10
-3
t, PULSE WIDTH (s)
10
-2
10
-1
10
0
10
1
1
10
V
DS
,
DRAIN to SOURCE VOLTAGE (V)
Figure 11. Forward Bias Safe
Operating Area
Figur
e
1
2. Si
n g l e
P u l s e M a x i m u m
Power Dissipation
©2013 Fairchild Semiconductor Corporation
FDD8424H Rev.1.5
5
Typical Characteristics (Q1 N-Channel)
T
J
= 25°C unless otherwise noted
2
DUTY CYCLE-DESCENDING ORDER
1
D = 0.5
0.2
0.1
0.05
0.02
0.01
P
DM
0.1
t
1
t
2
NOTES:
DUTY FACTOR: D = t
/t
1
2
SINGLE PULSE
R
θ
JC
= 4.1
o
C/W
0.01
PEAK T
= P
J
x Z
x R
+ T
DM
θ
JC
θ
JC
C
0.005
10
-5
10
-4
10
-3
10
-2
10
-1
10
0
10
1
t, RECTANGULAR PULSE DURATION (s)
Figure 13.
Transient Thermal Response Curve
©2013 Fairchild Semiconductor Corporation
FDD8424H Rev.1.5
6
Typical Characteristics (Q2 P-Channel)
T
J
= 25°C unless otherwise noted
3.0
2.5
2.0
1.5
1.0
0.5
40
30
20
10
0
V
GS
= -3V
PULSE DURATION = 80
μ
s
DUTY CYCLE = 0.5%MAX
PULSE DURATION = 80
μ
s
DUTY CYCLE = 0.5%MAX
V
GS
=
–
10V
V
GS
= -3.5V
V
GS
=
–
4.5V
V
GS
=
–
4V
V
GS
= -4V
V
GS
= -4.5V
V
GS
=
–
3.5V
V
GS
=
–
3V
V
GS
= -10V
0
10
20
30
40
0
1
2
3
4
-V
DS
, DRAIN TO SOURCE VOLTAGE (V)
–
I
D
, DRAIN CURRENT(A)
Figure 14.
On- Region Characteristics
Figure 15. Normalized on-Resistance vs Drain
Current and Gate
Voltage
1.6
160
I
D
= -6.5A
PULSE DURATION = 80
μ
s
DUTY CYCLE = 0.5%MAX
V
GS
= -10V
1.4
1.2
1.0
0.8
0.6
120
I
D
= -6.5A
T
J
= 125
o
C
80
40
T
J
= 25
o
C
0
-75 -50 -25
0
25 50 75
100 125 150
2
4
6
8
10
T
J
,
JUNCTION TEMPERATURE
(
o
C
)
-V
GS
, GATE TO SOURCE VOLTAGE (V)
Figure 17. On-Resistance vs Gate to
Source Voltage
Figure 16. Normalized On-Resistance
vs Junction Temperature
40
40
10
V
GS
= 0V
PULSE DURATION = 80
μ
s
DUTY CYCLE = 0.5%MAX
30
20
10
0
V
DS
= -5V
1
0.1
T
J
= 25
o
C
T
J
= 150
o
C
T
J
= 25
o
C
T
J
= -55
o
C
0.01
0.001
T
J
= 150
o
C
T
J
= -55
o
C
0.0
0.3
0.6
0.9
1.2
1.5
1
2
3
4
5
-V
SD
, BODY DIODE FORWARD VOLTAGE (V)
-V
GS
,
GATE TO SOURCE VOLTAGE (V)
Figure 18. Transfer Characteristics
Figure 19. Source to Drain Diode
Forward Voltage vs Source Current
©2013 Fairchild Semiconductor Corporation
FDD8424H Rev.1.5
7
Typical Characteristics (Q2 P-Channel)
T
J
= 25°C unless otherwise noted
10
2000
1000
C
iss
I
D
= -6.5A
8
V
DD
= -15V
C
oss
V
DD
= -20V
V
DD
= -25V
6
4
C
rss
100
30
2
f = 1MHz
= 0V
V
GS
0
40
0.1
1
10
0
4
8
12
16
20
-V
DS
, DRAIN TO SOURCE VOLTAGE (V)
Q ,
GATE CHARGE(nC)
g
Figure 21. Capacitance vs Drain
to Source Voltage
Figure 20. Gate Charge Characteristics
25
20
15
10
5
30
10
T
J
= 25
o
C
V
GS
=
–
10V
T
J
= 125
o
C
V
GS
=
–
4.5V
R
θ
JC
= 3.5
o
C/W
1
0.001
0
0.01
0.1
1
10
100
25
50
75
100
125
150
T
C
, CASE TEMPERATURE
(
o
C
)
t
AV
, TIME IN AVALANCHE(ms)
Figure 22. Unclamped Inductive
Switching Capability
Fi gu re 23. Max imu m
Co nti nu ou s
Dr ain
Current vs
Case Temperature
1
0
10
1
10000
V
GS
= -10V
10us
FOR TEMPERATURES
o
ABOVE 25
C DERATE PEAK
100us
CURRENT AS FOLLOWS:
1000
100
10
150
–
T
C
I = I
———————–
25
THIS AREA IS
LIMITED BY r
ds(on)
125
T
C
= 25
o
C
1ms
SINGLE PULSE
T
J
= MAX RATED
10ms
R
θ
JC
= 3.5
o
C/W
C
=
25
o
C
SINGLE PULSE
R
θ
JC
= 3.5
o
C/W
DC
T
0.1
10
-5
10
-4
10
-3
10
-2
10
-1
10
0
10
1
10
2
10
3
t, PULSE WIDTH (s)
80
1
10
-V
DS
, DRAIN to SOURCE VOLTAGE (V)
Figur
e
2
4. Forward Bias Safe
Operating Area
Figure 25. Single Pulse
Maximum
Power Dissipation
©2013 Fairchild Semiconductor Corporation
FDD8424H Rev.1.5
8
Typical Characteristics (Q2 P-Channel)
T
J
= 25°C unless otherwise noted
2
1
DUTY CYCLE-DESCENDING ORDER
D = 0.5
0.2
0.1
P
DM
0.05
0.02
0.01
0.1
t
1
t
2
NOTES:
DUTY FACTOR: D = t
/t
1
2
PEAK T
= P
x Z
x R
+ T
SINGLE PULSE
J
DM
θ
JC
θ
JC
C
0.01
R
θ
JC
= 3.5
o
C/W
0.005
10
-5
10
-4
10
-3
10
-2
10
-1
10
0
10
1
t, RECTANGULAR PULSE DURATION (s)
Figure 26. Transient Thermal Response Curve
©2013 Fairchild Semiconductor Corporation
FDD8424H Rev.1.5
9
6.73
6.35
A
6.00 MIN
5.46
5.21
1.25
1.15
B
M
0.10
C
A
B
6.50 MIN
6.22
5.97
6.25
1.01
0.64
3.00 MIN
1
5
1.14
4.56
0.80 MIN
0.68
0.81
0.61
F
0.70
0.55
1.14
M
0.10
C
A
B
4.56
C
2.39
2.18
SEE
NOTE D
0.61
0.46
4.32 MIN
5.21 MIN
10.41
9.40
SEE DETAIL “A”
5
1
0.10
C
NOTES: UNLESS OTHERWISE SPECIFED
0.51
A. THIS PACKAGE CONFORMS TO JEDEC, TO252
VARIATION AD.
0.127 MAX
GAGE PLANE
SEATING PLANE
B. ALL DIMENSIONS ARE IN MILLIMETERS.
C. DIMENSIONS ARE EXCLUSIVE OF BURRS,
MOLD FLASH AND TIE BAR PROTRUSIONS
D. HEATSINK TOP EDGE COULD BE IN CHAMFERED
CORNERS OR EDGE PROTRUSION.
E. DIMENSIONS
AND TOLERANCES AS PER ASME
Y14.5-2009.
1.78
1.40
F
(2.82)
F
EXCEPTION TO TO-252 STANDARD.
G. FILE NAME: TO252B05REV3
H. FAIRCHILDSEMICONDUCTOR
0-10°
0.61
0.46
DETAIL A
SCALE 2:1
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