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March 2015
FDD86102LZ
N-Channel
Shielded Gate
PowerTrench
®
MOSFET
100 V, 35 A, 22.5 m
Ω
Features
General Description
This N-Channel MOSFET is produced using Fairchild
Semiconductor’s advanced PowerTrench
®
process that
incorporates Shielded Gate technology. This process has been
optimized for the on-state resistance and switching loss. G-S
zener has been added to enhance ESD voltage level.
Shielded Gate MOSFET Technology
Max r
DS(on)
= 22.5 m
Ω
at V
GS
= 10
V
,
I
D
= 8 A
Max r
DS(on)
= 31 m
Ω
at V
GS
= 4.5
V
,
I
D
= 7 A
HBM ESD protection level > 6 kV typical (Note 4)
Applications
Very low Qg and Qgd compared to competing trench
technologies
DC – DC Conversion
Inverter
Fast switching speed
100% UIL tested
RoHS Compliant
Synchronous Rectifier
D
D
G
G
S
D-PAK
(TO-252)
S
MOSFET Maximum Ratings
T
C
= 25 °C unless otherwise noted
Symbol
V
DS
V
GS
Parameter
Ratings
Units
Drain to Source Voltage
Gate to Source Voltage
Drain Current
-Continuous
-Continuous
100
V
V
±20
T
C
= 25 °C
T
A
= 25 °C
35
I
D
(Note 1a)
(Note 3)
8
A
-Pulsed
40
E
AS
Single Pulse Avalanche Energy
Power Dissipation
84
54
mJ
W
T
C
= 25 °C
T
A
= 25 °C
P
D
Power Dissipation
(Note 1a)
3.1
T
J
, T
STG
Operating and Storage Junction
T
e
mperature Range
-55 to +150
°C
Thermal Characteristics
R
θ
JC
R
θ
JA
Thermal Resistance, Junction to Case
Thermal Resistance, Junction to Ambient
2.3
40
°C/W
(Note 1a)
Package Marking and Ordering Information
Device Marking
Device
Package
Reel Size
13 ’’
Tape Width
16 mm
Quantity
FDD86102LZ
FDD86102LZ
D-PAK(TO-252)
2500 units
©2012 Fairchild Semiconductor Corporation
FDD86102LZ Rev.1.3
1
Electrical Characteristics
T
J
= 25 °C unless otherwise noted
Symbol
Parameter
Test Conditions
Min
Typ
Max
Units
Off Characteristics
BV
DSS
Drain to Source Breakdown Voltage
I
D
= 250
μ
A, V
GS
= 0 V
100
V
Δ
BV
DSS
Δ
T
J
Breakdown Voltage
T
e
mperature
Coefficient
I
D
= 250
μ
A, referenced to 25 °C
69
mV/°C
I
DSS
I
GSS
Zero Gate Voltage Drain Current
Gate to Source Leakage Current
V
DS
= 80 V, V
GS
= 0 V
V
GS
= ±20 V, V
DS
= 0 V
1
μ
A
μ
A
±10
On Characteristics
(Note 2)
V
GS(th)
Gate to Source Threshold Voltage
V
GS
= V
DS
, I
D
= 250
μ
A
1.0
1.5
-6
3.0
V
Δ
V
GS(th)
Δ
T
J
Gate to Source Threshold Voltage
T
e
mperature Coefficient
I
D
= 250
μ
A, referenced to 25 °C
GS
= 10
V
, I
D
= 8 A
V
GS
= 4.5
V
, I
D
= 7 A
GS
= 10
V
, I
D
= 8 A, T
J
= 125 °C
mV/°C
V
17.8
23.2
31.1
31
22.5
31
r
DS(on)
g
FS
Static Drain to Source On Resistance
Forward Transconductance
m
Ω
V
40
V
DS
= 5
V
, I
D
= 8 A
S
Dynamic Characteristics
C
iss
C
oss
C
rss
R
g
Input Capacitance
1157
181
7.7
1540
245
15
pF
pF
pF
Ω
V
DS
= 50 V, V
GS
= 0 V,
f = 1 MHz
Output Capacitance
Reverse Transfer Capacitance
Gate Resistance
0.6
Switching Characteristics
t
d(on)
t
r
t
d(off)
t
f
Turn-On Delay Time
Rise Time
6.6
2.3
20
14
10
32
10
26
13
ns
ns
V
DD
= 50 V, I
D
= 8 A,
V
GS
= 10 V, R
GEN
= 6
Ω
Turn-Off Delay Time
Fall Time
ns
2.3
18
ns
Q
g
T
o
tal Gate Charge
T
o
tal Gate Charge
Gate to Source Gate Charge
Gate to Drain “Miller” Charge
V
GS
= 0 V to 10 V
V
GS
= 0 V to 4.5 V
nC
nC
nC
nC
Q
g
8.7
2.7
2.4
V
DD
= 50 V,
D
= 8 A
I
Q
gs
Q
gd
Drain-Source Diode Characteristics
V
GS
= 0 V, I
S
= 8 A
(Note 2)
(Note 2)
0.82
0.75
43
1.3
1.2
70
V
SD
Source to Drain Diode
Forward Voltage
V
V
GS
= 0 V, I
S
= 2.6 A
t
rr
Reverse Recovery Time
ns
I
F
= 8 A, di/dt = 100 A/
μ
s
Q
rr
Reverse Recovery Charge
43
70
nC
Notes
:
1. R
R
is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of the drain pins.
θ
JA
θ
JC
is guaranteed by design while
R
is determined by the user’s board design.
θ
JA
a. 40 °C/W when mounted
on a
b. 96 °C/W when mounted on
a
minimum pad of 2 oz copper.
2
1 in
pad of
2 oz
copper.
2. Pulse Test: Pulse Width < 300
μ
s, Duty cycle < 2.0%.
3. Starting
T =
25
°
C, L = 1 mH, I
= 13 A, V
= 90 V, V
= 10 V.
J
AS
DD
GS
4. The diode connected between the gate and source serves only as protection against ESD. No gate overvoltage rating is implied.
©2012 Fairchild Semiconductor Corporation
FDD86102LZ Rev.1.3
2
Typical Characteristics
T
J
= 25 °C unless otherwise noted
40
5
4
3
2
1
0
V
GS
= 10 V
V
GS
= 4.5 V
V
GS
= 3.5 V
V
GS
= 2.5 V
V
GS
= 3 V
30
20
V
GS
= 3 V
V
GS
= 3.5 V
V
GS
= 2.5 V
10
V
GS
= 10 V
V
GS
= 4.5 V
PULSE DURATION = 80
μ
s
DUTY CYCLE = 0.5% MAX
PULSE DURATION = 80
μ
s
DUTY CYCLE = 0.5% MAX
0
0
1
2
3
4
5
0
10
20
30
40
I
D
,
DRAIN CURRENT (A)
V
DS
,
DRAIN TO SOURCE VOLTAGE (V)
Figure 1.
On-Region Characteristics
Figur
e
2
. N
o r m a l i z e d O n – R e s i s ta n c e
vs Drain Current and Gate Voltage
2.0
120
PULSE DURATION = 80
μ
s
DUTY CYCLE = 0.5% MAX
I
D
= 8 A
I
D
= 8 A
1.8
1.6
1.4
1.2
1.0
0.8
0.6
V
GS
= 10 V
90
60
30
0
T
J
= 125
o
C
T
J
= 25
o
C
-75 -50 -25
0
25 50 75
100 125 150
2
4
6
8
10
T
J
,
JUNCTION TEMPERATURE
(
o
C
)
V
GS
,
GATE TO SOURCE VOLTAGE (V)
F i gu re 3 .
N orma li zed
On – Res is ta nc e
vs Junction Temperature
Figur
e
4
. On-Resistance
vs Gate to
Source Voltage
40
50
V
GS
= 0 V
10
PULSE DURATION = 80
μ
s
DUTY CYCLE = 0.5% MAX
30
20
10
0
T
J
= 150
o
C
V
DS
= 5 V
1
0.1
T
J
= 25
o
C
T
J
= 150
o
C
T
J
= 25
o
C
T
J
= -55
o
C
0.01
T
J
= -55
o
C
0.001
0
1
2
3
4
5
0.0
0.2
0.4
0.6
0.8
1.0
1.2
V
GS
, GATE TO SOURCE VOLTAGE (V)
V
SD
, BODY DIODE FORWARD VOLTAGE (V)
Figure 5.
Transfer Characteristics
Figur
e
6
. Source
to Drain Diode
Forward Voltage vs Source Current
©2012 Fairchild Semiconductor Corporation
FDD86102LZ Rev.1.3
3
Typical Characteristics
T
J
= 25 °C unless otherwise noted
10
2000
1000
V
DD
= 25 V
I
D
= 8 A
C
iss
8
6
4
2
0
V
DD
= 50 V
C
oss
100
10
1
V
DD
= 75 V
C
rss
f = 1 MHz
= 0 V
V
GS
0.1
1
10
100
0
5
10
15
20
V
DS
, DRAIN TO SOURCE VOLTAGE (V)
Q
g
, GATE CHARGE (nC)
Figure 7.
Gate Charge Characteristics
Figur
e
8
. C
a p a c i t a n c e v s D r a i n
to Source Voltage
10
-1
10
-2
10
-3
10
-4
10
-5
10
-6
10
-7
10
-8
10
-9
40
V
GS
= 0 V
T
J
= 25
o
C
10
T
J
= 125
o
C
T
J
= 100
o
C
T
J
= 25
o
C
T
J
= 125
o
C
1
0.001
0
5
10
15
20
25
30
35
0.01
0.1
1
10 30
V
GS
, GATE TO SOURCE VOLTAGE (V)
t
AV
, TIME IN AVALANCHE (ms)
Figur
e
9
. U
n c l a m p e d I n d u c t i v e
Switching Capability
Figur
e
1
0. Gate Leakage Current vs Gate to
Source Voltage
40
30
20
10
0
100
10
100us
V
GS
= 10 V
THIS AREA IS
LIMITED BY r
DS(on)
1
V
GS
= 4.5 V
1 ms
SINGLE PULSE
T
J
= MAX RATED
R
θ
JC
= 2.3
o
C/W
10 ms
DC
R
θ
JC
= 2.3
o
C/W
T
C
= 25
o
C
0.1
0.05
25
50
75
100
125
150
0.1
1
10
100
300
T
C
, C
ASE TEMPERATURE
(
o
C
)
V
DS
, DRAIN to SOURCE VOLTAGE (V)
Figur
e
1
1. Maximum Continuous Drain
Current vs
Case Temperature
Figur
e
1
2. Forward BiasSafe
Operating Area
©2012 Fairchild Semiconductor Corporation
FDD86102LZ Rev.1.3
4
Typical Characteristics
T
J
= 25 °C unless otherwise noted
10000
1000
SINGLE PULSE
R
θ
JC
= 2.3
o
C/W
100
T
C
= 25
o
C
10
10
-5
10
-4
10
-3
10
-2
10
-1
1
t, PULSE WIDTH (sec)
Figure 13.
Single Pulse Maximum
Power Dissipation
2
1
DUTY CYCLE-DESCENDING ORDER
D = 0.5
0.2
0.1
0.05
0.02
0.01
P
DM
0.1
t
1
t
2
NOTES:
DUTY FACTOR: D = t
/t
SINGLE PULSE
θ
JC
= 2.3
o
C/W
1
2
R
0.01
PEAK T
= P
x Z
x R
+ T
θ
JC
θ
Jc
C
J
DM
0.005
10
-5
10
-4
10
-3
t, RECTANGULAR PULSE DURATION (sec)
10
-2
10
-1
1
Figure 14.
Junction-to-Case Transient Thermal Response Curve
©2012 Fairchild Semiconductor Corporation
FDD86102LZ Rev.1.3
5
ON Semiconductor and
are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.
ON Semiconductor owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of ON Semiconductor’s product/patent
coverage may be accessed at
www.onsemi.com/site/pdf/Patent
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. ON Semiconductor reserves the right to make changes without further notice to any products herein.
ON Semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
Buyer is responsible for its products and applications using ON Semiconductor products, including compliance with all laws, regulations and safety requirements or standards,
regardless of any support or applications information provided by ON Semiconductor. “Typical” parameters which may be provided in ON Semiconductor data sheets and/or
specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer
application by customer’s technical experts. ON Semiconductor does not convey any license under its patent rights nor the rights of others. ON Semiconductor products are not
designed, intended, or authorized for use as a critical component in life support systems or any FDA Class 3 medical devices or medical devices with a same or similar classification
in a foreign jurisdiction or any devices intended for implantation in the human body. Should Buyer purchase or use ON Semiconductor products for any such unintended or unauthorized
application, Buyer shall indemnify and hold ON Semiconductor and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and
expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such
claim alleges that ON Semiconductor was negligent regarding the design or manufacture of the part. ON Semiconductor is an Equal Opportunity/Affirmative Action Employer. This
literature is subject to all applicable copyright laws and is not for resale in any manner.
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