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April 2015
FDD86250
N-Channel
Shielded Gate
PowerTrench
®
MOSFET
150 V, 51 A, 22 m
Ω
Features
General Description
This N-Channel MOSFET is produced using Fairchild
Semiconductor‘s advanced PowerTrench
®
process that
incorporates Shielded Gate technology. This process has been
optimized for the on-state resistance and yet maintain superior
switching performance.
Shielded Gate MOSFET Technology
Max r
DS(on)
= 22 m
Ω
at V
GS
= 10 V, I
D
= 8 A
Max r
DS(on)
= 31 m
Ω
at V
GS
= 6
V
,
I
D
= 6.5 A
100% UIL tested
Application
RoHS Compliant
DC – DC Conversion
D
D
G
S
G
D-PAK
(TO-252)
S
MOSFET Maximum Ratings
T
C
= 25 °C unless otherwise noted.
Symbol
V
DS
V
GS
Parameter
Ratings
Units
Drain to Source Voltage
Gate to Source Voltage
Drain Current
-Continuous
-Continuous
150
V
V
±20
T
C
= 25 °C
T
C
= 100 °C
T
A
= 25 °C
(Note 5)
(Note 5)
(Note 1a)
(Note 4)
(Note 3)
51
27
8
I
D
A
-Continuous
-Pulsed
164
E
AS
Single Pulse Avalanche Energy
Power Dissipation
Power Dissipation
180
mJ
W
T
C
= 25 °C
T
A
= 25 °C
132
P
D
(Note 1a)
3.1
T
J
, T
STG
Operating and Storage Junction
T
e
mperature Range
-55 to +150
°C
Thermal Characteristics
R
θ
JC
R
θ
JA
Thermal Resistance, Junction-to-Case
Thermal Resistance, Junction-to-Ambient
0.94
40
°C/W
(Note 1a)
Package Marking and Ordering Information
Device Marking
Device
Package
Reel Size
13 ’’
Tape Width
16 mm
Quantity
FDD86250
FDD86250
D-PAK(TO-252)
2500 units
©2010 Fairchild Semiconductor Corporation
FDD86250 Rev.
2.0
1
Electrical Characteristics
T
J
= 25 °C unless otherwise noted.
Symbol
Parameter
Test Conditions
Min.
Typ.
Max.
Units
Off Characteristics
BV
DSS
Drain to Source Breakdown Voltage
I
D
= 250
μ
A, V
GS
= 0 V
150
V
Δ
BV
DSS
Δ
T
J
Breakdown Voltage
T
e
mperature
Coefficient
I
D
= 250
μ
A, referenced to 25 °C
106
mV/°C
I
DSS
I
GSS
Zero Gate Voltage Drain Current
Gate to Source Leakage Current
V
DS
= 120 V, V
GS
= 0 V
V
GS
= ±20 V, V
DS
= 0 V
1
μ
A
±100
nA
On Characteristics
V
GS(th)
Gate to Source Threshold Voltage
V
GS
= V
DS
, I
D
= 250
μ
A
2.0
2.9
-10
4.0
V
Δ
V
GS(th)
Δ
T
J
Gate to Source Threshold Voltage
T
e
mperature Coefficient
I
D
= 250
μ
A, referenced to 25 °C
mV/°C
V
GS
= 10 V, I
D
= 8 A
18.4
21.4
35.8
28
22
31
45
r
DS(on)
g
FS
Static Drain to Source On Resistance
Forward Transconductance
V
GS
= 6 V, I
D
= 6.5 A
m
Ω
V
GS
= 10 V, I
D
= 8 A, T
J
= 125 °C
V
DS
= 10
V
,
I
D
= 8 A
S
Dynamic Characteristics
C
iss
C
oss
C
rss
R
g
Input Capacitance
1585
167
7
2110
225
15
pF
pF
pF
Ω
V
DS
= 75 V, V
GS
= 0 V,
Output Capacitance
Reverse Transfer Capacitance
Gate Resistance
f = 1 MHz
0.6
Switching Characteristics
t
d(on)
t
r
t
d(off)
t
f
Turn-On Delay Time
Rise Time
11.2
3.7
20
20
10
32
10
33
18
ns
ns
V
DD
= 75
V
,
I
D
= 8 A,
V
GS
= 10 V, R
GEN
= 6
Ω
Turn-Off Delay Time
Fall Time
ns
4
ns
Q
g
T
o
tal Gate Charge
T
o
tal Gate Charge
Gate to Source Charge
Gate to Drain “Miller” Charge
V
GS
= 0 V to 10 V
23
nC
nC
nC
nC
Q
g
V
GS
= 0 V to 5 V
12.8
6.7
4.7
V
DD
= 75 V,
I
D
= 8 A
Q
gs
Q
gd
Drain-Source Diode Characteristics
V
GS
= 0 V, I
S
= 8 A
(Note 2)
(Note 2)
0.78
0.73
71
1.3
1.2
V
V
SD
Source-Drain Diode
Forward Voltage
V
GS
= 0 V, I
S
= 2.6 A
t
rr
Reverse Recovery Time
113
166
ns
I
F
= 8 A, di/dt = 100 A/
μ
s
Q
rr
Reverse Recovery Charge
104
nC
Notes
:
1:
R
R
is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of the drain pins.
θ
JA
θ
JC
is guaranteed by design while
R
is determined by the user’s board design.
θ
JA
b) 96 °C/W when mounted on
a minimum pad
a)
40 °C/W when mounted
on a
1 in
pad of
2 oz
copper
2
2:
Pulse
T
e
st: Pulse Width < 300
μ
s, Duty cycle < 2.0%.
3:
Starting T
= 25
°
C, L = 1.0 mH, I
= 19 A, V
= 135 V, V
= 10 V.
J
AS
DD
GS
4:
Pulsed Id please refer to Fig 11 SOA graph for more details.
5:
Computed continuous current limited to Max Junction Temperature only, actual continuous current will be limited by thermal & electro-mechanical application board design.
©2010 Fairchild Semiconductor Corporation
FDD86250 Rev.
2.0
2
Typical Characteristics
T
J
= 25 °C unless otherwise noted.
40
4
3
2
1
0
V
GS
= 10 V
V
GS
= 4.5 V
V
GS
= 6 V
V
GS
= 5.5 V
V
GS
= 5 V
30
V
GS
= 5 V
20
V
GS
= 5.5 V
10
V
GS
= 4.5 V
V
GS
= 10 V
V
GS
= 6 V
PULSE DURATION = 80
μ
s
DUTY CYCLE = 0.5% MAX
PULSE DURATION = 80
μ
s
DUTY CYCLE = 0.5% MAX
0
0
1
2
3
4
5
0
10
20
30
40
I
D
,
DRAIN CURRENT (A)
V
DS
,
DRAIN TO SOURCE VOLTAGE (V)
Figure 1.
On-Region Characteristics
Figur
e
2
. N
o r m a l i z e d O n – R e s i s ta n c e
vs. Drain Current and Gate Voltage
2.4
80
I
D
= 8 A
PULSE DURATION = 80
μ
s
DUTY CYCLE = 0.5% MAX
2.2
2.0
1.8
1.6
1.4
1.2
1.0
0.8
0.6
0.4
I
D
= 8 A
V
GS
= 10 V
60
40
20
0
T
J
= 125
o
C
T
J
= 25
o
C
-75 -50 -25
0
25 50 75
100 125 150
4
6
8
10
T
J
,
JUNCTION TEMPERATURE
(
o
C
)
V
GS
,
GATE TO SOURCE VOLTAGE (V)
F i gu re 3 .
N orma li zed
On – Res is ta nc e
vs. Junction Temperature
Figur
e
4
. On-Resistance
vs. Gate to
Source Voltage
40
40
V
GS
= 0 V
10
PULSE DURATION = 80
μ
s
DUTY CYCLE = 0.5% MAX
30
20
10
0
T
J
= 150
o
C
V
DS
= 5 V
1
0.1
T
J
= 150
o
C
T
J
= 25
o
C
T
J
= 25
o
C
T
J
= -55
o
C
0.01
0.001
T
J
= -55
o
C
2
3
4
5
6
0.0
0.2
0.4
0.6
0.8
1.0
1.2
V
GS
, GATE TO SOURCE VOLTAGE (V)
V
SD
, BODY DIODE FORWARD VOLTAGE (V)
Figure 5.
Transfer Characteristics
Figur
e
6
. Source
to Drain Diode
Forward Voltage vs. Source Current
©2010 Fairchild Semiconductor Corporation
FDD86250 Rev.
2.0
3
Typical Characteristics
T
J
= 25 °C unless otherwise noted.
10
4000
1000
I
D
= 8 A
V
DD
= 50 V
C
iss
8
V
DD
= 75 V
6
C
oss
100
10
1
V
DD
= 100 V
4
2
0
C
rss
f = 1 MHz
= 0 V
V
GS
0
5
10
15
20
25
0.1
1
10
100
V
DS
, DRAIN TO SOURCE VOLTAGE (V)
Q
g
, GATE CHARGE (nC)
Figure 7.
Gate Charge Characteristics
Figur
e
8
. C
a p a c i t a n c e v s . D r a i n
to Source Voltage
60
50
40
30
20
10
0
100
V
GS
= 10 V
T
J
= 25
o
C
10
V
GS
= 6 V
T
J
= 100
o
C
T
J
= 125
o
C
R
θ
JC
= 0.94
o
C/W
1
0.001
25
50
75
100
125
150
0.01
0.1
1
10
40
T
C
, C
ASE TEMPERATURE
(
o
C
)
t
AV
, TIME IN AVALANCHE (ms)
Figur
e
9
. U
n c l a m p e d I n d u c t i v e
Switching Capability
Figur
e
1
0. Maximum Continuous Drain
Current vs.
Case Temperature
200
100
10000
SINGLE PULSE
R
θ
JC
= 0.94
o
C/W
10
μ
s
T
C
= 25
o
C
10
1
100
μ
s
THIS AREA IS
LIMITED BY r
DS(on)
1000
100
1 ms
10 ms
DC
SINGLE PULSE
T
J
= MAX RATED
0.1
R
θ
JC
= 0.94
o
C/W
C
= 25
o
C
T
0.01
0.1
1
10
100
500
10
-5
10
-4
10
-3
10
-2
10
-1
1
t, PULSE WIDTH (sec)
V
DS
, DRAIN to SOURCE VOLTAGE (V)
Figur
e
1
1. Forward BiasSafe
Operating Area
Figur
e
1
2. Single Pulse Maximum
Power Dissipation
©2010 Fairchild Semiconductor Corporation
FDD86250 Rev.
2.0
4
Typical Characteristics
T
J
= 25 °C unless otherwise noted.
2
DUTY CYCLE-DESCENDING ORDER
1
D = 0.5
0.2
P
DM
0.1
0.05
0.02
0.01
t
1
0.1
t
2
NOTES:
(t) = r(t) x R
Z
θ
JC
θ
JC
SINGLE PULSE
o
R
= 0.94
C/W
θ
JC
Peak T
= P
x Z
(t) + T
J
DM
θ
JC C
Duty Cycle, D = t
/ t
1
2
0.005
10
-5
10
-4
10
-3
t, RECTANGULAR PULSE DURATION (sec)
10
-2
10
-1
1
Figure 13.
Junction-to-Case Transient Thermal Response Curve
©2010 Fairchild Semiconductor Corporation
FDD86250 Rev.
2.0
5
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ON Semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
Buyer is responsible for its products and applications using ON Semiconductor products, including compliance with all laws, regulations and safety requirements or standards,
regardless of any support or applications information provided by ON Semiconductor. “Typical” parameters which may be provided in ON Semiconductor data sheets and/or
specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer
application by customer’s technical experts. ON Semiconductor does not convey any license under its patent rights nor the rights of others. ON Semiconductor products are not
designed, intended, or authorized for use as a critical component in life support systems or any FDA Class 3 medical devices or medical devices with a same or similar classification
in a foreign jurisdiction or any devices intended for implantation in the human body. Should Buyer purchase or use ON Semiconductor products for any such unintended or unauthorized
application, Buyer shall indemnify and hold ON Semiconductor and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and
expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such
claim alleges that ON Semiconductor was negligent regarding the design or manufacture of the part. ON Semiconductor is an Equal Opportunity/Affirmative Action Employer. This
literature is subject to all applicable copyright laws and is not for resale in any manner.
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