onsemi-FDFMA3N109

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July 2014  
FDFMA3N109  
Integrated N-Channel PowerTrench

®

MOSFET and Schottky Diode  
General Description  
Features  
MOSFET:  
This device is designed specifically as a single package  
solution for a boost topology in cellular handset and  
other ultra-portable applications.
 
It features a MOSFET  
with low input capacitance, total gate charge and on-  
state resistance, and an independently connected  
schottky diode with low forward voltage and reverse  
leakage current to maximize boost efficiency.  
•
2.9 A, 30 V
 
R

DS(ON)

= 123 m
Ω
@ V

GS

= 4.5 V  
R

DS(ON)

= 140 m
Ω
@ V

GS

= 3.0 V  
= 163 m
Ω
@ V

GS

= 2.5 V  
R

DS(ON)  

Schottky:  
•
V

F

< 0.46 V @ 500mA  
•
Low profile – 0.8 mm maximum – in the new package  
MicroFET 2×2 mm  
The MicroFET 2×2 package offers exceptional thermal  
performance for its physical size and is well suited to  
switching and linear mode applications.  
)
•
HBM ESD protection level = 1.8kV typical (Note 3  
•
RoHS Compliant  
PIN 1  
A
NC  
D
1
2
3
6
5
4
A
K
K
D
NC  
D
G
S
K
G
S
MicroFET 2×2  
Absolute Maximum Ratings
 
T

A

=25

o

C unless otherwise noted  
Symbol  
Parameter  
Ratings  
Units  
V

DS  

V

GS  

I

D  

Drain-Source Voltage  
Gate-Source Voltage  
30  
V
V
±
12  
2.9  
Drain Current – Continuous (T

C

= 25°C, V

GS

= 4.5V)  
– Continuous (T

C

= 25°C, V

GS

= 2.5V)  
– Pulsed  
2.7  
A
10  
P

D  

Power Dissipation for Single Operation  
Power Dissipation for Single Operation  
Operating and Storage Temperature  
Schottky Repetitive Peak Reverse Voltage  
Schottky Average Forward Current  
(Note 1a)  
(Note 1b)  
1.5  
W
0.65  
T

J

, T

STG  

V

RRM  

I

O  

–55 to +150  
°
C  
V
28  
1
A
Thermal Characteristics  
Thermal Resistance, Junction-to-Ambient  
(Note 1a)  
(Note 1b)  
(Note 1c)  
(Note 1d)  
83  
R

θ
JA  

R

θ
JA  

R

θ
JA  

R

θ
JA  

Thermal Resistance, Junction-to-Ambient  
Thermal Resistance, Junction-to-Ambient  
Thermal Resistance, Junction-to-Ambient  
193  
101  
228  
°C/W  
Package Marking and Ordering Information  
Device Marking  
Device  
Reel Size  
Tape width  
8mm  
Quantity  
109  
FDFMA3N109  
7’’  
3000 units  
FDFMA3N109 Rev
 
B3  
©
2008 Fairchild Semiconductor Corporation  

Electrical Characteristics  
T

A

= 25°C unless otherwise noted  
Symbol  
Parameter  
Test Conditions  
Min Typ Max Units  
Off Characteristics  
BV

DSS  

Drain–Source Breakdown Voltage  
30  
V
V

GS

= 0 V,  
I

D

= 250
µ
A  
∆
BV

DSS  

∆
T

J  

Breakdown Voltage Temperature  
Coefficient  
I

D

= 250
µ
A, Referenced to 25°C  
25  
mV/°C  
I

DSS  

Zero Gate Voltage Drain Current  
Gate–Body Leakage Current  
V

DS

= 24 V,  
V

GS

= 0 V  
1
µ
A  
µ
A  
I

GSS  

V

GS

= ± 12 V,
 
V

DS

= 0 V  
±10  
On Characteristics  
V

GS(th)  

Gate Threshold Voltage  
0.4  
1.0  
–3  
1.5  
V
V

DS

= V

GS  

,
I

D

= 250
µ
A  
∆
V

GS(th)  

∆
T

J  

Gate Threshold Voltage  
Temperature Coefficient  
I

D

= 250
µ
A, Referenced to 25°C  
mV/
°
C  
V

GS

= 4.5V, I

D

= 2.9A  
75  
84  
123  
140  
163  
166  
203  
268  
V

GS

= 3.0V, I

D

= 2.7A  
V

GS

= 2.5V, I

D

= 2.5A  
92  
Static Drain–Source  
On–Resistance  
R

DS(on)  

m
Ω  
V

GS

= 4.5V, I

D

= 2.9A, T

C

= 85°C  
V

GS

= 3.0V, I

D

= 2.7A, T

C

= 150°C  
V

GS

= 2.5V, I

D

= 2.5A, T

C

= 150°C  
95  
138  
150  
Dynamic Characteristics  
C

iss  

Input Capacitance  
190  
30  
220  
40  
pF  
pF  
pF  
Ω
V

DS

= 15 V,  
V

GS

= 0 V,  
C

oss  

Output Capacitance  
f = 1.0 MHz  
C

rss  

R

G  

Reverse Transfer Capacitance  
Gate Resistance  
20  
30  
V

GS

= 0 V,  
f = 1.0 MHz  
4.6  
Switching Characteristics
 

(Note 2)  

V

DD

= 15 V,  
I

D

= 1 A,  
R

GEN

= 6
Ω  
t

d(on)  

t

r  

t

d(off)  

t

f  

Turn–On Delay Time  
Turn–On Rise Time  
Turn–Off Delay Time  
Turn–Off Fall Time  
Total Gate Charge  
Gate–Source Charge  
Gate–Drain Charge  
6
8
12  
16  
21  
4
ns  
ns  
V

GS

= 4.5 V,  
12  
ns  
2
ns  
V

DS

= 15 V,  
V
I

D

= 2.9 A,  
Q

g  

Q

gs  

Q

gd  

2.4  
0.35  
0.75  
3.0  
nC  
nC  
nC  

GS

= 4.5 V  
Drain–Source Diode Characteristics and Maximum Ratings  
I

S  

Maximum Continuous Drain–Source Diode Forward Current  
2.9  
A
V
V

SD  

Drain–Source Diode Forward  
Voltage  
I

S

= 2.0 A  
0.9  
0.8  
10  
1.2  
1.2  
I

S

= 1.1 A  
t

rr  

Diode Reverse Recovery Time  
Diode Reverse Recovery Charge  
I

F

= 2.9 A,  
dI

F

/dt = 100 A/µs  
ns  
Q

rr  

2
nC  
Schottky Diode Characteristics  
100  
4.7  
10  
µ
A  
T

J

= 25°C  
T

J

= 85°C  
I

R  

Reverse Leakage  
Forward Voltage  
Forward Voltage  
V

R

= 28 V  
I

F

= 1 A  
0.07  
mA  
0.50 0.57  
0.49 0.60  
0.40 0.46  
0.36 0.43  
T

J

= 25°C  
T

J

= 85°C  
V

F  

V

F  

V
V
T

J

= 25°C  
T

J

= 85°C  
I

F

= 500 mA  
FDFMA3N109 Rev B3  

Electrical Characteristics  
T

A

= 25°C unless otherwise noted  
Notes:  
1.
R

θ
JA

is determined with the device mounted on a 1 in

2

oz. copper pad on a 1.5 x 1.5 in. board of FR-4 material. R

θ
JC

is guaranteed by design while R

θ
JA

is  
determined by the user’s board design.  
(a)
MOSFET R

θ
JA

= 83°C/W when mounted on a 1in

2

pad of 2 oz copper, 1.5” x 1.5” x 0.062” thick PCB  
(b)
MOSFET R

θ
JA

= 193°C/W when mounted on a minimum pad of 2 oz copper  
(c)
Schottky R

θ
JA

= 101°C/W when mounted on a 1in

2

pad of 2 oz copper, 1.5” x 1.5” x 0.062” thick PCB  
(d)
Schottky R

θ
JA

= 228°C/W when mounted on a minimum pad of 2 oz copper  
a) 83

o

C/W  
when  
b) 193

o

C/W  
when  
c)101

o

C/W  
when  
b) 228

o

C/W  
when  
mounted on  
a 1in

2

pad  
of 2 oz  
mounted on  
a minimum  
pad of  
mounted on  
a 1in

2

pad  
of 2 oz  
mounted on  
a minimum  
pad of  
copper  
2 oz copper  
copper  
2 oz copper  
Scale 1 : 1 on letter size paper  
2.
Pulse Test: Pulse Width < 300
µ
s, Duty Cycle < 2.0%  
3
: The diode connected between the gate and source serves only as protection against ESD. No gate overvoltage rating is implied.  
FDFMA3N109 Rev B3  

Typical Characteristics  
1.8  
1.6  
1.4  
1.2  
1
10  
2.5V  
V

GS

= 4.5V  
V

GS

= 2.0V  
8
6
4
2
0
2.7V  
2.9V  
3.5V  
2.0V  
2.5V  
2.7V  
2.9V  
3.5V  
4.0V  
4.5V  
1.5V  
0.8  
0
0.5  
1
1.5  
2
2.5  
3
0
2
4
6
8
10  
V

DS

, DRAIN-SOURCE VOLTAGE (V)  
I

D

, DRAIN CURRENT (A)  
Figure 1. On-Region Characteristics.  
Figure 2. On-Resistance Variation with  
Drain Current and Gate Voltage.  
0.24  
0.2  
1.8  
1.6  
1.4  
1.2  
1
I

D

= 2.9A  
I

D

= 1.45A  
V

GS

= 4.5V  
0.16  
0.12  
0.08  
0.04  
T

A

= 125

o

C  
T

A

= 25

o

C  
0.8  
0.6  
-50  
-25  
0
25  
50  
75  
100  
125  
150  
0
2
4
6
8
10  
T

J

, JUNCTION TEMPERATURE (

o

C)  
V

GS

, GATE TO SOURCE VOLTAGE (V)  
Figure 3. On-Resistance Variation with  
Temperature.  
Figure 4. On-Resistance Variation with  
Gate-to-Source Voltage.  
10  
8
100  
V

GS

= 0V  
T

A

= -55

o

C  
V

DS

= 5V  
125

o

C  
10  
25

o

C  
1
0.1  
6
4
T

A

= 125

o

C  
0.01  
25

o

C  
2
-55

o

C  
0.001  
0.0001  
0
0.5  
1
1.5  
2
2.5  
3
0
0.2  
0.4  
0.6  
0.8  
1
1.2  
1.4  
1.6  
V

GS

, GATE TO SOURCE VOLTAGE (V)  
-V

SD

, BODY DIODE FORWARD VOLTAGE (V)  
Figure 5. Transfer Characteristics.  
Figure 6. Body Diode Forward Voltage Variation  
with Source Current and Temperature.  
FDFMA3N109 Rev B3  

Typical Characteristics  
300  
250  
200  
150  
100  
50  
10  
f = 1MHz  
V

GS

= 0 V  
I

D

= 2.9A  
8
V

DS

= 10V  
20V  
C

iss  

6
15V  
4
2
0
C

oss  

C

rss  

0
0
5
10  
15  
20  
25  
30  
0
1
2
3
4
5
6
Q

g

, GATE CHARGE (nC)  
V

DS

, DRAIN TO SOURCE VOLTAGE (V)  
Figure 7. Gate Charge Characteristics.  
Figure 8. Capacitance Characteristics.  
0.1  
10  
T

J

= 125

o

C  
0.01  
1
T

J

= 125

o

C  
0.001  
T

J

= 100

o

C  
T

J

= 25

o

C  
0.1  
0.0001  
0.00001  
0.01  
T

J

= 25

o

C  
0.001  
0.000001  
0
0.1  
0.2  
0.3  
0.4  
0.5  
0.6  
0.7  
0.8  
0
5
10  
15  
20  
25  
30  
V

F

, FORWARD VOLTAGE (V)  
V

R

, REVERSE VOLTAGE (V)  
Figure 9. Schottky Diode Forward Voltage.  
Figure 10. Schottky Diode Reverse Current.  
1
D = 0.5  
R

θ

(t) = r(t) * R

θ  

JA  
JA  
R

θ

JA

=193°C/W  
0.2  
P(pk)  
0.1  
0.1  
0.05  
t

1  

0.02  
0.01  
t

2  

T

J

– T

A

= P * R

θ

JA

(t)  
Duty Cycle, D = t

1

/ t

2  

SINGLE PULSE  
0.01  
0.0001  
0.001  
0.01  
0.1  
1
10  
100  
1000  
t

1

, TIME (sec)  
Figure 11. Transient Thermal Response Curve.  
Thermal characterization performed using the conditions described in Note 1b.  
Transient thermal response will change depending on the circuit board design.  
FDFMA3N109 Rev B3  

Dimensional Outline and Pad Layout  
Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner  
without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or  
obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions, specif-  
ically the warranty therein, which covers Fairchild products.  
Always visit Fairchild Semiconductor’s online packaging area for the most recent package drawings:  
FDFMA3N109 Rev B3  

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intended to be an exhaustive list of all such trademarks.  
AccuPower™  
AX-CAP *  
BitSiC™  
Build it Now™  
CorePLUS™  
CorePOWER™  
CROSSVOLT
™  
CTL™  
F-PFS™  
FRFET  
®*  
®
®
®
tm  
®
Global Power Resource

SM  

GreenBridge™  
Green FPS™  
PowerTrench  
PowerXS™  
Programmable Active Droop™  
QFET  
QS™  
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RapidConfigure™  
™
®
TinyBoost  
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®
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®
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max
™  
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®
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®
μ
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®
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®
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™  
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Datasheet contains the design specifications for product development. Specifications  
may change in any manner without notice.  
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Rev. I68  
FDFMA3N109 Rev B3  

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Phone: 81
−
3
−
5817
−
1050  
ON Semiconductor Website
:

Literature Distribution Center for ON Semiconductor  
19521 E. 32nd Pkwy, Aurora, Colorado 80011 USA  
Phone
: 303
−
675
−
2175 or 800
−
344
−
3860
T
o
ll Free USA/Canada  
Fax
: 303
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675
−
2176 or 800
−
344
−
3867
T
o
ll Free USA/Canada  
Email
: orderlit@onsemi.com  
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