onsemi-FDG6304P
| Part # | onsemi-FDG6304P |
Download  | onsemi-FDG6304P |
Digital FE
T
,
D
ual P-Channel
FDG6304P
General Description
These dual P
−
Channel logic level enhancement mode field effect
transistors are produced using ON Semiconductor proprietary, high
cell density, DMOS technology. This very high density process is
especially tailored to minimize on
−
state resistance. This device has
been designed especially for low voltage applications as a replacement
for bipolar digital transistors and small signal MOSFETs.
S2
G2
D1
Features
D2
G1
S1
•
−
25
V
,
−
0.41 A Continuous,
−
1.5 A Peak
♦
R
♦
R
= 1.1
W
@ V
=
−
4.5 V
GS
SC
−
88/SC70
−
6/SOT
−
363
CASE 419B
−
02
DS(ON)
= 1.5
W
@ V
=
−
2.7 V
DS(ON)
GS
•
V
e
ry Low Level Gate Drive Requirements Allowing Direct
Operation in 3 V Circuits (V
< 1.5 V)
MARKING DIAGRAM
GS(th)
•
Gate
−
Source Zener for ESD Ruggedness (>6 kV Human Body
Model)
04M
•
Compact Industry Standard SC70
−
6 Surface Mount Package
•
These Devices are Pb
−
Free and are RoHS Compliant
04
M
= Specific Device Code
= Assembly Operation Month
ABSOLUTE MAXIMUM RATINGS
(T =
25
°
C unless otherwise noted)
A
Symbol
Parameter
Drain
−
Source Voltage
FDG6304P
−
25
Units
PIN CONNECTIONS
V
DSS
V
GSS
V
V
A
Gate
−
Source Voltage
−
8
1 or 4*
6 or 3
5 or 2
I
D
Drain/Output Current
Continuous
Pulsed
−
0.41
−
1.5
2 or 5
3 or 6
P
0.3
W
D
T , T
Operating and Storage
T
e
mperature
Range
−
55 to +150
°
C
J
STG
4 or 1*
ESD
Electrostatic Discharge Rating
MIL
−
STD
−
883D
Human Body Model (100 pF / 1500
W
)
6.0
kV
Stresses exceeding those listed in the Maximum Ratings table may damage the
device. If any of these limits are exceeded, device functionality should not be
assumed, damage may occur and reliability may be affected.
*The pinouts are symmetrical; pin 1 and 4 are
interchangeable.
Units inside the carrier can be of either orientation
and will not affect the functionality of the device.
ORDERING INFORMATION
this data sheet.
©
Semiconductor Components Industries, LLC, 2000
1
Publication Order Number:
July, 2021
−
Rev. 7
FDG6304P/D
FDG6304P
THERMAL CHARACTERISTICS
Symbol
Parameter
Ratings
Unit
R
415
_
C/W
q
JA
1. R
is the sum of the junction
−
to
−
case and case
−
to
−
ambient thermal resistance where the case thermal reference is defined as the solder
q
JA
mounting surface of the drain pins. R
is guaranteed by design while R
is determined by the user’s board design. R
= 415
°
C/W on
q
q
q
JC
CA
JA
minimum pad mounting on FR
−
4 board in still air.
ELECTRICAL CHARACTERISTICS
(T =
25
°
C unless otherwise noted)
A
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
OFF CHARACTERISTICS
BV
Drain
−
Source Breakdown Voltage
V
I
= 0
V
, I
=
−
250
m
A
−
25
−
−
−
V
DSS
GS
D
D
BV
/
D
T
Breakdown Voltage
T
e
mperature
Coefficient
=
−
250
m
A, Referenced to 25
_
C
=
−
20 V, V
= 0 V
−
−
22
mV/
_
C
DSS
J
D
I
Zero Gate Voltage Drain Current
V
V
V
−
−
−
−
−
−
−
1
m
A
m
A
nA
DSS
DS
GS
=
−
20 V, V
= 0 V, T
= 55
_
C
−
10
100
DS
GS
GS
J
I
Gate
−
Body Leakage Current
=
−
8
V
, V
= 0 V
DS
GSS
V
Gate Threshold Voltage
V
I
= V
, I
=
−
250
m
A
−
0.65
−
0.82
−
1.5
V
GS(th)
DS
GS
D
D
V
/
D
T
Gate Threshold Voltage
T
e
mperature Coefficient
=
−
250
m
A, Referenced to 25
_
C
−
2
−
mV/
_
C
GS(th)
J
D
R
Static Drain
−
Source
On
−
Resistance
V
V
=
−
4.5 V, I
=
−
0.41 A
−
−
0.85
1.2
1.1
1.9
W
DS(on)
GS
D
=
−
4.5 V, I
=
−
0.41 A,
GS
D
T =
125
_
C
J
V
GS
V
GS
V
DS
=
−
2.7 V, I
=
−
0.25 A
−
−
1.5
−
1.15
−
1.5
−
D
I
On
−
State Drain Current
=
−
4.5 V, V
=
−
5 V
A
S
D(on)
DS
g
FS
Forward Transconductance
=
−
5
V
, I
=
−
0.41 A
0.9
−
D
DYNAMIC CHARACTERISTICS
C
Input Capacitance
V
DS
= 10
V
, V
= 0 V, f =
1
.0 MHz
−
−
−
62
34
10
−
−
−
pF
pF
pF
iss
GS
C
Output Capacitance
oss
C
Reverse Transfer Capacitance
rss
t
Turn-On Delay Time
Turn-On Rise Time
Turn-Off Delay Time
Turn-Off Fall Time
T
o
tal Gate Charge
Gate
−
Source Charge
Gate
−
Drain Charge
V
V
=
−
5
V
, I
=
−
0.5 A,
−
−
−
−
−
−
−
7
8
15
16
80
60
1.5
−
ns
ns
D(on)
DD
GS
D
=
−
4.5 V, R
= 6
W
GEN
t
r
t
55
ns
D(off)
t
f
35
ns
Q
V
DS
V
GS
=
−
5
V
, I
=
−
0.41 A,
1.1
0.31
0.29
nC
nC
nC
g
D
=
−
4.5 V
Q
gs
gd
Q
−
DRAIN
−
SOURCE DIODE CHARACTERISTICS AND MAXIMUM RATINGS
I
Maximum Continuous Source Current
−
−
−
−
0.25
−
1.2
A
V
S
V
SD
Drain
−
Source Diode Forward
Voltage
V
GS
−
0.85
S
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
2. Pulse
T
e
st: Pulse Width
≤
300
m
s, Duty Cycle
≤
2.0%
2
FDG6304P
TYPICAL PERFORMANCE CHARACTERISTICS
2.5
1.2
0.9
0.6
0.3
0
V
GS
=
−
4.5 V
−
3.0 V
−
2.7 V
−
2.5 V
V
GS
=
−
2.0 V
2
1.5
1
−
2.5 V
−
2.7 V
−
2.0 V
−
3.0 V
−
3.5 V
−
4.5 V
−
1.5 V
0.5
0
1
2
3
4
0
0.2
0.4
0.6
0.8
1
1.2
−
V
DS
, DRAIN
−
SOURCE VOLTAGE (V)
−
I
D
, DRAIN CURRENT (A)
Figure 1. On
−
Region Characteristics
Figure 2. On
−
Resistance Variation with
Drain Current and Gate Voltage
1.6
1.4
1.2
1
5
I
D
=
−
0.41 A
V
GS
=
−
4.5 V
I
=
−
0.2 A
D
4
3
2
1
0
T
= 125
°
C
25
°
C
J
0.8
0.6
1
2
3
4
5
−
50
−
25
0
25
50
75
100
125
150
°
−
V
GS
, GATE TO SOURCE VOLTAGE (V)
T
J
, JUNCTION TEMPERATURE ( C)
Figure 3. On
−
Resistance Variation with
Figure 4. On
−
Resistance Variation with
Gate
−
to
−
Source Voltage
Temperature
1
1
V
GS
=
−
5 V
V
DS
=
−
5 V
T
=
−
55
°
C
J
T
= 125
°
C
J
°
25 C
0.8
0.6
0.4
0.2
0
0.1
0.01
°
125 C
°
25 C
°
−
55 C
0.001
0.0001
0.5
1
1.5
2
2.5
3
0.2
0.4
0.6
0.8
1
1.2
−
V
G
S
, GATE TO SOURCE VOLTAGE (V)
−
V
SD
, BODY DIODE FORWARD VOLTAGE (V)
Figure 5. Transfer Characteristics
Figure 6. Body Diode Forward Voltage Variation
with Source Current and Temperature
3
FDG6304P
TYPICAL PERFORMANCE CHARACTERISTICS
(continued)
200
5
4
3
2
1
0
I
D
=
−
0.41 A
V
DS
=
−
5 V
−
10 V
80
−
15 V
C
iss
30
C
oss
10
C
rss
f = 1 MHz
5
3
V
= 0 V
GS
0.1
0.3
1
2
5
10
25
0
0.4
0.8
1.2
1.6
Q
g
, GATE CHARGE (nC)
−
V
DS
, DRAIN TO SOURCE VOLTAGE (V)
Figure 7. Gate Charge Characteristics
Figure 8. Capacitance Characteristics
3
50
SINGLE PULSE
= 415
°
C/W
1 ms
R
q
JA
1
40
30
20
10
T
= 25
°
C
A
10 ms
100 ms
R
DS(ON)
LIMIT
0.5
1 s
10 s
0.1
V
=
−
4.5 V
GS
DC
0.05
SINGLE PULSE
R
= 415
°
C/W
q
JA
T
A
= 25
°
C
0
0.01
0.0001
0.001
0.01
0.1
1
10
200
0.1
0.2
0.5
1
2
5
10
25 40
−
V
D
S
, DRAIN
−
SOURCE VOLTAGE (V)
SINGLE PULSE TIME (sec)
Figure 10. Single Pulse Maximum Power
Dissipation
Figure 9. Maximum Safe Operating Area
1
D = 0.5
0.5
0.2
0.2
R
R
(t) = r(t) * R
= 415
°
C/W
q
q
q
JA
JA
JA
0.1
0.1
0.05
0.05
P(pk)
0.02
t
1
0.01
Single Pulse
0.02
0.01
t
2
T
−
T =
P * R
A
(t)
q
JA
J
0.005
Duty Cycle, D = t
/ t
1
2
0.002
0.0001
0.001
0.01
0.1
1
10
100 200
t
1
, TIME (sec)
Transient thermal response will change depending on the circuit board design.
Figure 11. Transient Thermal Response Curve
4
FDG6304P
ORDERING INFORMATION
Device Order Number
FDG6304P
†
Device Marking
Package Type
Shipping
04
SC
−
88/SC70
−
6/SOT
−
363
(Pb
−
Free)
3000 /
T
a
pe & Reel
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our
T
a
pe and Reel Packaging
Specifications Brochure, BRD8011/D.
5
MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS
SC
−
88/SC70
−
6/SOT
−
363
CASE 419B
−
02
ISSUE Y
1
DATE 11 DEC 2012
SCALE 2:1
2X
aaa H
D
NOTES:
D
H
1. DIMENSIONING
AND TOLERANCING PER ASME Y14.5M, 1994.
2. CONTROLLING
DIMENSION: MILLIMETERS.
A
3. DIMENSIONS
D AND E1 DO NOT INCLUDE MOLD FLASH,
PROTRUSIONS, OR GATE BURRS. MOLD FLASH, PROTRU-
SIONS, OR GATE BURRS SHALL NOT EXCEED 0.20 PER END.
4. DIMENSIONS
D AND E1 AT THE OUTERMOST EXTREMES OF
THE PLASTIC BODY AND DATUM H.
5. DATUMS
A AND B ARE DETERMINED AT DATUM H.
6. DIMENSIONS
b AND c APPLY TO THE FLAT SECTION OF THE
LEAD BETWEEN 0.08 AND 0.15 FROM THE TI
P
.
7. DIMENSION
b DOES NOT INCLUDE DAMBAR PROTRUSION.
ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.08 TOTAL IN
EXCESS OF DIMENSION b AT MAXIMUM
MATERIAL CONDI-
TION. THE DAMBAR CANNOT BE LOCATED ON THE LOWER
RADIUS OF THE FOO
T
.
D
GAGE
PLANE
6
1
5
2
4
3
L
L2
E1
E
DETAIL A
aaa
C
2X
2X 3 TIPS
bbb H
D
e
MILLIMETERS
DIM MIN
NOM MAX
−−−
INCHES
MIN
−−−
NOM MAX
−−−
0.043
−−−
0.004
6X
b
B
TOP VIEW
A
−−−
−−−
1.10
A1
0.00
A2
0.70
0.10 0.000
M
ddd
C A-B D
0.90
0.20
0.15
2.00
2.10
1.25
0.65 BSC
0.36
1.00 0.027 0.035 0.039
0.25 0.006 0.008 0.010
0.22 0.003 0.006 0.009
2.20 0.070 0.078 0.086
2.20 0.078 0.082 0.086
1.35 0.045 0.049 0.053
0.026 BSC
b
C
D
E
0.15
0.08
1.80
2.00
A2
DETAIL A
A
E1
1.15
e
L
0.26
0.46 0.010 0.014 0.018
0.006 BSC
L2
0.15 BSC
0.15
aaa
bbb
ccc
ddd
0.006
0.012
0.004
0.004
0.30
0.10
0.10
6X
ccc C
A1
SEATING
PLANE
c
C
SIDE VIEW
END VIEW
GENERIC
MARKING DIAGRAM*
RECOMMENDED
SOLDERING FOOTPRINT*
6
6X
0.30
XXXM
G
6X
0.66
G
1
2.50
XXX =
Specific Device Code
M
= Date Code*
G
= Pb
−
Free Package
0.65
(Note: Microdot may be in either location)
PITCH
*Date Code orientation and/or position may
vary depending upon manufacturing location.
DIMENSIONS: MILLIMETERS
*For additional information on our Pb
−
Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting
T
e
chniques Reference Manual, SOLDERRM/D.
*This information is generic. Please refer to
device data sheet for actual part marking.
Pb
−
Free indicator, “G” or microdot “
G
”, may
or may not be present. Some products may
not follow the Generic Marking.
STYLES ON PAGE 2
Electronic versions are uncontrolled except when accessed directly from the Document Repository.
Printed versions
are uncontrolled
except when stamped
“CONTROLLED COPY” in red.
DOCUMENT NUMBER:
DESCRIPTION:
98ASB42985B
SC
−
88/SC70
−
6/SOT
−
363
PAGE 1 OF 2
ON Semiconductor and
are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.
ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding
the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically
disclaims any and all liability, including without limitation special, consequential or incidental damages. ON Semiconductor does not convey any license under its patent rights nor the
rights of others.
©
Semiconductor Components Industries, LLC, 2019
SC
−
88/SC70
−
6/SOT
−
363
CASE 419B
−
02
ISSUE Y
DATE 11 DEC 2012
STYLE 1:
PIN 1.
EMITTER 2
2. BASE
2
STYLE 2:
CANCELLED
STYLE 3:
CANCELLED
STYLE 4:
STYLE 5:
STYLE 6:
PIN 1.
ANODE 2
2. N/C
PIN 1.
CATHODE
2. CATHODE
3. COLLECTOR
4. EMITTER
5. BASE
PIN 1.
ANODE
2. ANODE
3. COLLECTOR
1
4. EMITTER
1
5. BASE
1
3. COLLECTOR
3. CATHODE
1
4. ANODE
1
5. N/C
4. EMITTER
5. BASE
6. COLLECTOR
2
6. ANODE
6. CATHODE
6. CATHODE
2
STYLE 7:
STYLE 8:
CANCELLED
STYLE 9:
STYLE 10:
STYLE 11:
STYLE 12:
PIN 1.
SOURCE 2
2. DRAIN
2
3. GATE
1
PIN 1.
EMITTER 2
2. EMITTER
1
3. COLLECTOR
1
4. BASE
1
PIN 1.
SOURCE 2
2. SOURCE
1
3. GATE
1
PIN 1.
CATHODE 2
2. CATHODE
2
3. ANODE
1
PIN 1.
ANODE 2
2. ANODE
2
3. CATHODE
1
4. ANODE
1
5. ANODE
1
6. CATHODE
2
4. SOURCE
1
5. DRAIN
1
6. GATE
2
4. DRAIN
1
5. DRAIN
2
6. GATE
2
4. CATHODE
1
5. CATHODE
1
6. ANODE
2
5. BASE
2
6. COLLECTOR
2
STYLE 13:
PIN 1.
ANODE
2. N/C
STYLE 14:
PIN 1.
VREF
2. GND
STYLE 15:
STYLE 16:
STYLE 17:
STYLE 18:
PIN 1.
VIN1
2. VCC
PIN 1.
ANODE 1
2. ANODE
2
PIN 1.
BASE 1
2. EMITTER
2
3. COLLECTOR
2
4. BASE
2
PIN 1.
BASE 1
2. EMITTER
1
3. COLLECTOR
2
4. BASE
2
3. COLLECTOR
4. EMITTER
5. BASE
3. GND
3. ANODE
3
3. VOUT2
4. VIN2
5. GND
6. VOUT1
4. IOUT
5. VEN
6. VCC
4. CATHODE
3
5. CATHODE
2
6. CATHODE
1
5. EMITTER
1
6. COLLECTOR
1
5. EMITTER
2
6. COLLECTOR
1
6. CATHODE
STYLE 19:
PIN 1.
I OUT
2. GND
STYLE 20:
STYLE 21:
PIN 1.
ANODE 1
2. N/C
STYLE 22:
PIN 1.
D1 (i)
2. GND
STYLE 23:
PIN 1.
Vn
2. CH1
3. Vp
STYLE 24:
PIN 1.
CATHODE
2. ANODE
PIN 1.
COLLECTOR
2. COLLECTOR
3. BASE
3. GND
3. ANODE
2
4. CATHODE
2
5. N/C
3. D2
(i)
3. CATHODE
4. CATHODE
5. CATHODE
6. CATHODE
4. V
CC
4. EMITTER
5. COLLECTOR
6. COLLECTOR
4. D2
(c)
5. VBUS
6. D1
(c)
4. N/C
5. V
EN
5. CH2
6. N/C
6. V
REF
6. CATHODE
1
STYLE 30:
STYLE 25:
STYLE 26:
PIN 1.
SOURCE 1
2. GATE
1
STYLE 27:
PIN 1.
BASE 2
2. BASE
1
STYLE 28:
PIN 1.
DRAIN
2. DRAIN
3. GATE
STYLE 29:
PIN 1.
ANODE
2. ANODE
PIN 1.
SOURCE 1
2. DRAIN
2
3. DRAIN
2
4. SOURCE
2
5. GATE
1
PIN 1.
BASE 1
2. CATHODE
3. COLLECTOR
2
4. BASE
2
3. DRAIN
2
4. SOURCE
2
5. GATE
2
3. COLLECTOR
1
4. EMITTER
1
5. EMITTER
2
6. COLLECTOR
2
3. COLLECTOR
4. EMITTER
5. BASE/ANODE
6. CATHODE
4. SOURCE
5. DRAIN
6. DRAIN
5. EMITTER
6. COLLECTOR
1
6. DRAIN
1
6. DRAIN
1
Note: Please refer to datasheet for
style callout. If style type is not called
out in the datasheet refer to the device
datasheet pinout or pin assignment.
Electronic versions are uncontrolled except when accessed directly from the Document Repository.
Printed versions
are uncontrolled
except when stamped
“CONTROLLED COPY” in red.
DOCUMENT NUMBER:
DESCRIPTION:
98ASB42985B
SC
−
88/SC70
−
6/SOT
−
363
PAGE 2 OF 2
ON Semiconductor and
are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.
ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding
the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically
disclaims any and all liability, including without limitation special, consequential or incidental damages. ON Semiconductor does not convey any license under its patent rights nor the
rights of others.
©
Semiconductor Components Industries, LLC, 2019
onsemi
,
, and other names, marks, and brands are registered and/or common law trademarks of Semiconductor Components Industries, LLC dba “
onsemi
” or its affiliates
and/or subsidiaries in the United States and/or other countries.
onsemi
owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property.
A listing of
onsemi
’s product/patent coverage may be accessed at
www.onsemi.com/site/pdf/Patent
−
Marking.pdf
.
onsemi
reserves the right to make changes at any time to any
products or information herein, without notice. The information herein is provided “as
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is” and
onsemi
makes no warranty, representation or guarantee regarding the accuracy of the
information, product features, availability, functionality, or suitability of its products for any particular purpose, nor does
onsemi
assume any liability arising out of the application or use
of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. Buyer is responsible for its products
and applications using
onsemi
products, including compliance with all laws, regulations and safety requirements or standards, regardless of any support or applications information
provided by
onsemi
. “Typical” parameters which may be provided in
onsemi
data sheets and/or specifications can and do vary in different applications and actual performance may
vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts.
onsemi
does not convey any license
under any of its intellectual property rights nor the rights of others.
onsemi
products are not designed, intended, or authorized for use as a critical component in life support systems
or any FDA Class 3 medical devices or medical devices with a same or similar classification in a foreign jurisdiction or any devices intended for implantation in the human body. Should
Buyer purchase or use
onsemi
products for any such unintended or unauthorized application, Buyer shall indemnify and hold
onsemi
and its officers, employees, subsidiaries, affiliates,
and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death
associated with such unintended or unauthorized use, even if such claim alleges that
onsemi
was negligent regarding the design or manufacture of the part.
onsemi
is an Equal
Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.
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