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September 2003
FDG6332C
20V N & P-Channel PowerTrench
Ò
MOSFETs
General Description
Features
The N & P-Channel MOSFETs are produced using
Fairchild Semiconductor’s advanced PowerTrench
process that has been especially tailored to minimize
on-state resistance and yet maintain superior
switching performance.
·
·
Q1
0.7 A, 20V.
Q2
–0.6 A, –20V.
Low gate charge
R
DS(ON)
= 300 m
W
@ V
GS
= 4.5 V
R
DS(ON)
= 400 m
W
@ V
GS
= 2.5 V
R
R
DS(ON)
= 420 m
W
@ V
GS
= –4.5 V
DS(ON)
= 630 m
W
@ V
GS
= –2.5 V
These devices have been designed to offer
exceptional power dissipation in a very small footprint
for applications where the bigger more expensive
TSSOP-8 and SSOP-6 packages are impractical.
·
·
High performance trench technology for extremely
low R
DS(ON)
Applications
·
SC70-6 package: small footprint (51% smaller than
SSOT-6); low profile (1mm thick)
·
·
·
DC/DC converter
Load switch
LCD display inverter
S
G
1
2
3
6
5
4
D
D
G
Pin 1
S
SC70-6
Complementary
Absolute Maximum Ratings
T
A
=25
o
C unless otherwise noted
Symbol
V
DSS
Parameter
Drain-Source Voltage
Q1
20
Q2
Units
–20
±
12
–0.6
–2
V
V
A
V
GSS
Gate-Source Voltage
±
12
0.7
2.1
I
D
Drain Current
– Continuous
– Pulsed
(Note 1)
(Note 1)
Power Dissipation for Single Operation
0.3
W
P
D
T
J
, T
STG
Operating and Storage Junction Temperature Range
–55 to +150
°
C
Thermal Characteristics
°
C/W
R
q
JA
Thermal Resistance, Junction-to-Ambient
(Note 1)
415
Package Marking and Ordering Information
Device Marking
Device
Reel Size
Tape width
Quantity
.32
FDG6332C
7’’
8mm
3000 units
FDG6332C Rev
C2 (W)
Ó
2003 Fairchild Semiconductor Corporation
Electrical Characteristics
T
A
= 25°C unless otherwise noted
Symbol
Parameter
Test Conditions
Min Typ Max Units
Off Characteristics
V
GS
= 0 V,
GS
= 0 V,
I
D
= 250
m
A
I
D
= –250
m
A
Q1
Q2
20
–20
V
BV
DSS
Drain–Source Breakdown Voltage
V
Breakdown Voltage Temperature
Coefficient
Q1
Q2
Q1
Q2
14
–14
D
BV
DSS
D
T
J
I
D
= 250
m
A,Ref. to 25
°
C
I
D
= –250
m
A,Ref. to 25
°
C
mV/
°
C
m
A
V
DS
=
16 V,
V
GS
= 0 V
1
–1
I
DSS
Zero Gate Voltage Drain Current
V
DS
= –16 V,
V
GS
= 0 V
I
GSSF
/I
GSSR
Gate–Body Leakage, Forward
I
GSSF
/I
GSSR
Gate–Body Leakage, Reverse
nA
nA
V
GS
=
±
12 V,
V
DS
= 0 V
V
GS
=
±
12V ,
V
DS
= 0 V
±
100
±
100
On Characteristics
(Note 2)
V
DS
= V
GS
, I
D
= 250
m
A
V
DS
= V
GS
, I
D
= –250
m
A
V
GS(th)
Gate Threshold Voltage
0.6
1.1
1.5
V
Q1
Q2
-0.6
–1.2
–1.5
Gate Threshold Voltage
Temperature Coefficient
Q1
Q2
–2.8
3
D
V
GS(th)
D
T
J
I
D
= 250
m
A,Ref. To 25
°
C
I
D
= –250
m
A,Ref. to 25
°
C
mV/
°
C
m
W
V
GS
= 4.5 V,
I
D
=0.7 A
180
293
247
300
400
442
R
DS(on)
Static Drain–Source
On–Resistance
Q1
V
GS
= 2.5 V,
I
D
=0.6 A
V
GS
= 4.5 V,
I
D
=0.7A,T
J
=125
°
C
V
V
V
GS
= –4.5 V,
I
D
= –0.6 A
GS
= –2.5 V, I
D
= –0.5 A
GS
=–4.5 V, I
D
=–0.6 A,T
J
=125
°
C
300
470
400
420
630
700
Q2
V
DS
= 5 V
I
D
= 0.7 A
2.8
1.8
g
FS
Forward Transconductance
On–State Drain Current
S
A
Q1
Q2
Q1
Q2
V
DS
= –5 V
I
D
= –0.6A
V
GS
= 4.5 V,
V
DS
= 5 V
V
GS
= –4.5 V,
V
DS
= –5 V
I
D(on)
1
–2
Dynamic Characteristics
V
DS
=10 V, V
GS
= 0 V, f=1.0MHz
113
114
34
24
16
9
C
iss
C
oss
C
rss
Input Capacitance
Q1
Q2
Q1
Q2
Q1
Q2
pF
pF
pF
V
DS
=–10 V, V
GS
= 0 V, f=1.0MHz
V
DS
=10 V, V
GS
= 0 V, f=1.0MHz
V
DS
=–10 V, V
GS
= 0 V, f=1.0MHz
V
DS
=10 V, V
GS
= 0 V, f=1.0MHz
V
DS
=–10 V, V
GS
= 0 V, f=1.0MHz
Output Capacitance
Reverse Transfer Capacitance
Switching Characteristics
(Note 2)
5
5.5
7
10
11
15
25
18
12
3
t
d(on)
t
r
t
d(off)
t
f
Turn–On Delay Time
Turn–On Rise Time
Turn–Off Delay Time
Turn–Off Fall Time
Total Gate Charge
Gate–Source Charge
Gate–Drain Charge
Q1
Q2
Q1
Q2
Q1
Q2
Q1
Q2
Q1
Q2
Q1
Q2
Q1
Q2
ns
ns
For
Q1
:
V
DS
=10 V,
I
D
= 1 A
V
GS
= 4.5 V,
R
GEN
= 6
W
14
9
For
Q2
:
V
DS
=–10 V,
I
D
= –1 A
ns
V
GS
= –4.5 V,
R
GEN
= 6
W
6
1.5
1.7
1.1
1.4
0.24
0.3
0.3
0.4
ns
3.4
1.5
2
Q
g
Q
gs
Q
gd
nC
nC
nC
For
Q1
:
V
DS
=10 V,
I
D
= 0.7 A
V
GS
= 4.5 V,
R
GEN
= 6
W
For
Q2
:
V
DS
=–10 V,
I
D
= –0.6 A
V
GS
= –4.5 V,
R
GEN
= 6
W
FDG6332C Rev C2
(W)
Electrical Characteristics
T
A
= 25°C unless otherwise noted
Symbol
Parameter
Test Conditions
Min Typ Max Units
Drain–Source Diode Characteristics and Maximum Ratings
0.25
–0.25
1.2
I
S
Maximum Continuous Drain–Source Diode Forward Current
Q1
Q2
A
V
V
GS
= 0 V,
I
S
= 0.25 A
(Note 2)
0.74
V
SD
Drain–Source Diode Forward
Voltage
Q1
Q2
V
GS
= 0 V,
I
S
= –0.25 A
(Note 2)
–0.77 –1.2
Notes:
1.
R
q
JA
is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of
the drain pins.
R
q
JC
is guaranteed by design while R
q
JA
is determined by the user’s board design.
R
q
JA
= 415°C/W when mounted on a minimum pad of FR-4
PCB in a still air environment.
2.
Pulse Test: Pulse Width < 300
m
s, Duty Cycle < 2.0%
FDG6332C Rev C2
(W)
Typical Characteristics: N-Channel
1.8
1.6
1.4
1.2
1
4
V
GS
=4.5V
3.0V
3.5V
2.5V
3
2
1
0
V
GS
= 2.5V
3.0V
3.5V
2.0V
4.0V
4.5V
0.8
0
1
2
3
4
0
1
2
3
4
150
3
I
D
, DRAIN CURRENT (A)
V
DS
, DRAIN-SOURCE VOLTAGE (V)
Figure 1. On-Region Characteristics.
Figure 2. On-Resistance Variation with
Drain Current and Gate Voltage.
0.8
1.6
1.4
1.2
1
I
D
=0.7A
V
GS
= 4.5V
I
D
=0.4A
0.6
0.4
0.2
0
T
A
= 125
o
C
T
A
= 25
o
C
0.8
0.6
1
2
3
4
5
-50
-25
0
25
50
75
100
125
V
GS
, GATE TO SOURCE VOLTAGE (V)
T
J
, JUNCTION TEMPERATURE (
o
C)
Figure 3. On-Resistance Variation with
Temperature.
Figure 4. On-Resistance Variation with
Gate-to-Source Voltage.
10
2.5
T
A
= -55
o
C
V
GS
= 0V
25
o
C
125
o
C
V
DS
= 5V
1
0.1
2
1.5
1
T
A
= 125
o
C
25
o
C
-55
o
C
0.01
0.001
0.0001
0.5
0
0.5
1
1.5
2
2.5
0
0.2
0.4
0.6
0.8
1
1.2
V
GS
, GATE TO SOURCE VOLTAGE (V)
V
SD
, BODY DIODE FORWARD VOLTAGE (V)
Figure 5. Transfer Characteristics.
Figure 6. Body Diode Forward Voltage Variation
with Source Current and Temperature.
FDG6332C Rev C2
(W)
Typical Characteristics: N-Channel
200
150
100
50
5
V
DS
= 5V
f = 1MHz
V
GS
= 0 V
I
D
= 0.7A
10V
4
15V
C
ISS
3
2
1
0
C
OSS
C
RSS
0
0
5
10
15
20
0
0.4
0.8
1.2
1.6
V
DS
, DRAIN TO SOURCE VOLTAGE (V)
Q
g
, GATE CHARGE (nC)
Figure 7. Gate Charge Characteristics.
Figure 8. Capacitance Characteristics.
10
1
10
8
SINGLE PULSE
R
q
JA
= 415°C/W
T
A
= 25°C
R
DS(ON)
LIMIT
100
m
s
1ms
10ms
6
100ms
1s
4
V
GS
= 4.5V
DC
0.1
0.01
SINGLE PULSE
R
q
JA
= 415
o
C/W
A
= 25
o
C
2
T
0
0.001
0.01
0.1
1
10
100
0.1
1
10
100
t
1
, TIME (sec)
V
DS
, DRAIN-SOURCE VOLTAGE (V)
Figure 9. Maximum Safe Operating Area.
Figure 10. Single Pulse Maximum
Power Dissipation.
FDG6332C Rev C2
(W)
Typical Characteristics: P-Channel
2
1.8
1.6
1.4
1.2
1
V
GS
= -4.5V
-3.0V
V
GS
= -2.5V
-3.5V
1.6
-2.5V
1.2
0.8
-3.0V
-3.5V
-4.0V
1.5
-2.0V
-4.5V
0.4
0.8
0
0
1
2
3
4
0
0.5
1
2
-V
DS
, DRAIN-SOURCE VOLTAGE (V)
-I
D
, DRAIN CURRENT (A)
Figure 11. On-Region Characteristics.
Figure 12. On-Resistance Variation with
Drain Current and Gate Voltage.
1.4
1.2
I
D
= -0.6A
V
GS
= -4.5V
I
D
= -0.3 A
1.3
1.2
1.1
1
1
0.8
0.6
0.4
0.2
T
A
= 125
o
C
0.9
0.8
0.7
T
A
= 25
o
C
1
2
3
4
5
-50
-25
0
25
50
75
100
125
150
T
J
, JUNCTION TEMPERATURE (
o
C)
-V
GS
, GATE TO SOURCE VOLTAGE (V)
Figure 13. On-Resistance Variation with
Temperature.
Figure 14. On-Resistance Variation with
Gate-to-Source Voltage.
10
2
T
A
= -55
o
C
25
o
C
125
o
C
V
GS
= 0V
V
DS
= -5V
1
1.5
1
T
A
= 125
o
C
0.1
25
o
C
0.01
-55
o
C
0.5
0
0.001
0.0001
0
0.2
0.4
0.6
0.8
1
1.2
0.5
1
1.5
2
2.5
3
-V
SD
, BODY DIODE FORWARD VOLTAGE (V)
-V
GS
, GATE TO SOURCE VOLTAGE (V)
Figure 15. Transfer Characteristics.
Figure 16. Body Diode Forward Voltage Variation
with Source Current and Temperature.
FDG6332C Rev C2
(W)
Typical Characteristics: P-Channel
160
120
80
5
f = 1MHz
GS
= 0 V
I
D
= -0.6A
V
DS
= -5V
-10V
V
4
3
2
1
0
-15V
C
ISS
C
OSS
40
C
RSS
0
0
5
10
15
20
0
0.3
0.6
0.9
1.2
1.5
1.8
-V
DS
, DRAIN TO SOURCE VOLTAGE (V)
Q
g
, GATE CHARGE (nC)
Figure 17. Gate Charge Characteristics.
Figure 18. Capacitance Characteristics.
10
10
SINGLE PULSE
q
JA
= 415
o
C/W
A
= 25
o
C
R
8
6
4
2
100
m
s
T
R
DS(ON)
LIMIT
1ms
1
0.1
10ms
100ms
1s
V
GS
= -4.5V
DC
SINGLE PULSE
R
q
JA
= 415
o
C/W
T
A
= 25
o
C
0.01
0
0.1
1
10
100
0.001
0.01
0.1
1
10
100
-V
DS
, DRAIN-SOURCE VOLTAGE (V)
SINGLE PULSE TIME (SEC)
Figure 19. Maximum Safe Operating Area.
Figure 20. Single Pulse Maximum
Power Dissipation.
1
D = 0.5
R
q
(t) = r(t) * R
q
JA
JA
R
q
JA
= 415 °C/W
0.2
0.1
0.1
P(pk)
0.05
0.02
0.01
t
1
t
2
T
J
– T
A
= P * R
q
JA
(t)
Duty Cycle, D = t
1
/ t
2
0.01
SINGLE PULSE
0.001
0.0001
0.001
0.01
0.1
1
10
100
t
1
, TIME (sec)
Figure 21. Transient Thermal Response Curve.
Thermal characterization performed using the conditions described in Note 1.
Transient thermal response will change depending on the circuit board design.
FDG6332C Rev C2
(W)
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intended to be an exhaustive list of all such trademarks.
OPTOPLANAR
®
AccuPower
AttitudeEngine™
Awinda
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F-PFS
®*
FRFET
®
Global Power Resource
SM
GreenBridge
Green FPS
Green FPS
e-Series
G
max
TinyBoost
®
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®
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TinyLogic
®
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TinyPWM
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®
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Build it Now
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Making Small Speakers Sound Louder
and Better™
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Saving our world, 1mW/W/kW at a time™
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SMART START
Solutions for Your Success
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®
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Definition of Terms
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Definition
Datasheet contains the design specifications for product development. Specifications may change
in any manner without notice.
Advance Information
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Datasheet contains preliminary data; supplementary data will be published at a later date. Fairchild
Semiconductor reserves the right to make changes at any time without notice to improve design.
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