onsemi-FDH055N15A
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MOSFET
– N-Channel,
POWERTRENCH
150
V
,
1
67 A, 5.9 m
W
FDH055N15A
Description
This N
−
Channel MOSFET is produced using ON Semiconductor’s
advanced POWERTRENCH
process that has been tai
−
lored
®
to minimize
the on
−
state resistance while maintaining superior
switching performance.
V
DS
R
MAX
I MAX
D
DS(ON)
Features
150 V
5.9 m
W
@ 10 V
167 A
•
R
= 4.8 m
W
(Typ.) @ V
= 10
V
, I
=
1
20 A
GS D
DS(on)
•
Fast Switching Speed
•
Low Gate Charge
•
High Performance Trench Technology for Extremely Low R
•
High Power and Current Handling Capability
DS(on)
•
This Device is Pb
−
Free and is RoHS Compliant
Applications
N-CHANNEL MOSFET
•
Synchronous Rectification for
A
T
X / Sever / Telecom PSU
•
Battery Protection Circuit
•
Motor Drives and Uninterruptible Power Supplies
•
Micro Solar Inverter
G
D
S
TO
−
247
−
3LD
CASE 340CK
MARKING DIAGRAM
$Y&Z&3&K
FDH
055N15A
$Y
&Z
&3
&K
= ON Semiconductor Logo
= Assembly Plant Code
= Numeric Date Code
= Lot Code
FDH055N15A
= Specific Device Code
ORDERING INFORMATION
this data sheet.
©
Semiconductor Components Industries, LLC, 2011
1
Publication Order Number:
October, 2020
−
Rev. 4
FDH055N15A/D
FDH055N15A
ABSOLUTE MAXIMUM RATINGS
(T =
25
°
C unless otherwise noted)
C
Symbol
Parameter
Value
150
20
Unit
V
V
DSS
V
GSS
Drain to Source Voltage
Gate to Source Voltage
−
DC
V
−
AC (f > 1 Hz)
30
I
D
Drain Current
−
Continuous (T
= 25
°
C, Silicon Limited)
167
A
C
−
Continuous (T
= 100
°
C, Silicon Limited)
118
156
C
−
Continuous (T
= 25
°
C, Package Limited)
C
I
Drain Current
668
A
mJ
DM
E
835
AS
dv/dt
6.0
V/ns
W
P
Power Dissipation
(T =
25
°
C)
C
429
D
−
Derate above 25
°
C
2.86
W/
°
C
°
C
T , T
Operating and Storage
T
e
mperature Range
−
55 to + 175
300
J
STG
T
L
Maximum Lead
T
e
mperature for Soldering, 1/8
″
from Case for 5 Second
°
C
Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality
should not be assumed, damage may occur and reliability may be affected.
1. Calculated
continuous current based on maximum allowable junction temperature, Package limitation current is 156 A.
2. Repetitive
Rating: Pulse width limited by maximum junction temperature.
3. Starting
T =
25
°
C, L = 3 mH, I
= 23.6 A
J
AS
4. I
≤
120 A, di/dt
≤
200 A/s, V
≤
BV
, Starting T
= 25
°
C.
SD
DD
DSS
J
THERMAL CHARACTERISTICS
Symbol
Parameter
FDH055N15A
Unit
Thermal Resistance, Junction to Case, Max.
Thermal Resistance, Junction to Ambient, Max.
0.35
40
°
C/W
R
q
JC
JA
R
q
PACKAGE MARKING AND ORDERING INFORMATION
Part Number
Top Mark
Package
Package Method
Reel Size
N/A
Tape Width
Quantity
FDH055N15A
FDH055N15A
TO
−
247
−
3LD
Tube
N/A
30 Units
2
FDH055N15A
ELECTRICAL CHARACTERISTICS
(T =
25
°
C unless otherwise noted)
C
Symbol
Parameter
Test Condition
Min.
Typ.
Max.
Unit
OFF CHARACTERISTICS
BV
Drain to Source Breakdown Voltage
I
I
= 250
m
A, V
= 0 V
150
−
−
−
V
DSS
D
GS
D
BV
/
D
T
Breakdown Voltage
T
e
mperature
Coefficient
= 250
m
A, Referenced to 25
°
C
−
0.1
V/
°
C
DSS
J
D
I
Zero Gate Voltage Drain Current
V
DS
V
DS
V
GS
= 120
V
, V
= 0 V
−
−
−
−
−
−
1
m
A
DSS
GS
= 120
V
, T
=
1
50
°
C
500
100
C
I
Gate to Body Leakage Current
=
20
V
, V
= 0 V
nA
GSS
DS
ON CHARACTERISTICS
V
Gate Threshold Voltage
V
GS
V
GS
V
DS
= V
, I
= 250
m
A
2.0
−
−
4.0
5.9
−
V
m
W
S
GS(th)
DS(on)
DS
D
R
Static Drain to Source On Resistance
Forward Transconductance
= 10
V
, I
=
1
20 A
4.8
219
D
g
FS
= 10
V
, I
=
1
20 A
−
D
DYNAMIC CHARACTERISTICS
C
Input Capacitance
V
= 75
V
, V
= 0 V,
−
−
−
−
−
−
−
−
−
7100
664
23
9445
885
35
−
pF
pF
pF
pF
nC
nC
nC
nC
W
iss
oss
rss
DS
GS
f = 1 MHz
C
C
Output Capacitance
Reverse Transfer Capacitance
Energy Related Output Capacitance
T
o
tal Gate Charge at 10 V
C
V
DS
= 75
V
, V
= 0 V
1159
92
oss(er)
GS
Q
V
DS
V
GS
= 75
V
, I
=
1
20 A
−
g(tot)
D
,
= 10 V
Q
Gate to Source Gate Charge
Gate Charge Threshold to Plateau
Gate to Drain “Miller” Charge
Equivalent Series Resistance(G
−
S)
31
−
gs
Q
15
−
gs2
Q
16
−
gd
ESR
f = 1 MHz
1.2
−
SWITCHING CHARACTERISTICS
t
Turn-On Delay Time
Turn
−
On Rise Time
Turn-Off Delay Time
Turn
−
Off Fall Time
V
V
= 75
V
, I
=
1
20 A,
−
−
−
−
35
67
71
21
80
144
152
52
ns
ns
ns
ns
d(on)
DD
GS
D
= 10
V
, R
=
4
.7
W
G
t
r
t
d(off)
t
f
DRAIN-SOURCE DIODE CHARACTERISTICS
I
S
Maximum Continuous Drain to Source Diode Forward Current
−
−
167
A
I
Maximum Pulsed Drain to Source Diode Forward Current
−
−
−
−
−
−
668
1.25
−
A
SM
V
Drain to Source Diode Forward Voltage
Reverse Recovery Time
V
V
= 0
V
, I
=
1
20 A
−
V
SD
GS
SD
t
rr
= 0
V
, I
=
1
20 A, V
= 75
V
,
105
342
348
ns
nC
nC
GS
F
SD
DS
dI /dt
= 100 A/
m
s
Q
Reverse Recovery Charge
Reverse Recovery Charge
−
rr
rr
Q
V
GS
= 0
V
, I
=
3
0 A, V
= 75
V
,
−
SD
DS
dI /dt
= 100 A/
m
s
F
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
5. Essentially
Independent of Operating
T
e
mperature Typical Characteristics.
3
FDH055N15A
TYPICAL CHARACTERISTICS
500
100
500
V
GS
= 15.0 V
10.0 V
8.0 V
*Notes:
1. V
= 10 V
DS
2. 250
m
s Pulse
T
e
st
7.0 V
100
6.5 V
6.0 V
5.5 V
5.0 V
25
°
C
175
°
C
10
1
*Notes:
−
55
°
C
1. 250
m
s Pulse
T
e
st
2. T
= 25
°
C
C
10
0.1
1
4
6
2
3
4
5
V
GS
, Gate
−
Source Voltage [V]
V
DS
, Drain
−
Source Voltage [V]
Figure 2. Transfer Characteristics
Figure 1. On
−
Region Characteristics
6.5
6.0
5.5
5.0
4.5
4.0
500
100
175
°
C
V
= 10 V
GS
25
°
C
10
V
= 20 V
GS
*Notes:
1. V
= 0 V
GS
2. 250
m
s Pulse
T
e
st
*Note: T
= 25
°
C
C
1
0
50 100
150 200 250
300 350 400 450
0.2
0.4
0.6
0.8
1.0
1.2
1.4
V
SD
, Body Diode Forward Voltage [V]
I ,
Drain Current [A]
D
Figure 4. Body Diode Forward Voltage Variation
vs. Source Current and Temperature
Figure 3. On
−
Resistance Variation vs. Drain Current
and Gate Voltage
10000
10
C
iss
V
V
V
= 30 V
= 75 V
= 120 V
DS
DS
DS
8
6
4
2
0
1000
100
10
C
oss
*Notes:
1. V
= 0 V
GS
2. f = 1 MHz
C
rss
C
C
C
= C
+ C
(C =
shorted)
gs gd
ds
iss
oss
rss
= C
+ C
ds
gd
gd
= C
*Note: I
= 120 A
D
0.1
1
10
100 200
0
25
50
75
100
Q ,
T
o
tal Gate Charge [nC]
G
V
DS
, Drain
−
Source Voltage [V]
Figure 6. Gate Charge Characteristics
Figure 5. Capacitance Characteristics
4
FDH055N15A
TYPICAL CHARACTERISTICS
(continued)
2.8
2.4
2.0
1.6
1.2
1.15
1.10
1.05
1.00
0.95
0.90
*Notes:
1. V
= 0 V
*Notes:
1. V
= 10 V
0.8
GS
GS
2. I
= 250
m
A
D
2. I
= 120 A
D
0.4
−
100
−
50
−
100
−
50
0
50
100
150
200
0
50
100
150
200
T , Junction
T
e
mperature [
°
C]
J
T , Junction
T
e
mperature [
°
C]
J
Figure 8. On
−
Resistance Variation
Figure 7. Breakdown Voltage Variation
vs. Temperature
vs. Temperature
1000
180
135
90
45
0
10
m
s
100
m
s
100
10
1
V
GS
= 10 V
1 ms
10 ms
DC
Operation in This Area
is Limited by R
DS(on)
Limited by Package
*Notes:
1. T
= 25
°
C
C
0.1
2. T
= 175
°
C
J
3. Single Pulse
R
= 0.35
°
C/W
q
JC
0.01
25
50
75
100
125
150
175
1
10
100 200
T ,
Case
T
e
mperature [
°
C]
C
V
DS
, Drain
−
Source Voltage [V]
Figure 10. Maximum Drain Current
vs. Case Temperature
Figure 9. Maximum Safe Operating Area
8
6
4
2
0
0
30
60
90
120
150
V
DS
, Drain to Source [V]
Figure 11. Eoss vs. Drain to Source Voltage
5
FDH055N15A
TYPICAL CHARACTERISTICS
(continued)
1
0.1
0.5
0.2
0.1
P
DM
t
1
t
0.05
2
0.02
*Notes:
0.01
0.01
Single Pulse
1. Z
(t) = 0.35
°
C/W Max.
q
JC
2. Duty Factor, D = t
/t
1
2
3. T
−
T =
P
* Z
(t)
q
JC
JM
C
DM
0.001
−
5
−
4
−
3
−
2
−
1
10
10
10
10
10
1
t ,
Rectangular Pulse Duration [sec]
1
Figure 12. Transient Thermal Response Curve
6
FDH055N15A
V
GS
R
Q
Q
L
g
V
DS
V
GS
Q
gs
gd
DUT
I
G
= const.
Charge
Figure 13. Gate Charge Test Circuit & Waveform
R
L
V
DS
90%
V
DS
V
DD
V
GS
R
G
10%
V
GS
DUT
V
GS
t
t
d(off)
d(on)
t
r
t
f
t
on
t
off
Figure 14. Resistive Switching Test Circuit & Waveforms
L
2
1
2
E
AS
+
LI
AS
V
DS
BV
DSS
I
D
I
AS
R
G
V
DD
I (t)
D
DUT
V
DD
V
GS
V
DS
(t)
t
p
Time
t
p
Figure 15. Unclamped Inductive Switching Test Circuit & Waveforms
7
FDH055N15A
+
DUT
V
DS
−
I
SD
L
Driver
R
G
Same Type
as DUT
V
DD
V
GS
−
dv/dt controlled by R
G
−
I controlled
by pulse period
SD
Gate Pulse Width
D
+
Gate Pulse Period
V
GS
10 V
(Driver)
I
, Body Diode Forward Current
FM
I
di/dt
SD
(DUT)
I
RM
Body Diode Reverse Current
Body Diode Recovery dv/dt
V
DS
V
DD
V
SD
(DUT)
Body Diode
Forward Voltage Drop
Figure 16. Peak Diode Recovery dv/dt Test Circuit & Waveforms
POWERTRENCH is a registered trademark of Semiconductor Components Industries, LLC (SCILLC) or its subsidiaries in the United States
and/or other countries.
8
MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS
TO
−
247
−
3LD SHORT LEAD
CASE 340CK
ISSUE A
DATE 31 JAN 2019
P1
D2
A
E
P
A
A2
Q
E2
S
D1
D
E1
B
2
2
1
3
L1
A1
b4
L
c
(3X) b
(2X) b2
M
M
B A
0.25
MILLIMETERS
MIN NOM
MAX
4.58 4.70 4.82
2.20 2.40 2.60
1.40 1.50 1.60
1.17 1.26 1.35
1.53 1.65 1.77
2.42 2.54 2.66
0.51 0.61 0.71
20.32 20.57 20.82
(2X) e
DIM
A
A1
A2
b
b2
b4
c
GENERIC
D
MARKING DIAGRAM*
D1 13.08
~
~
D2
E
0.51 0.93 1.35
15.37 15.62 15.87
AYWWZZ
XXXXXXX
XXXXXXX
E1 12.81
~
~
E2
e
L
4.96 5.08 5.20
5.56
15.75 16.00 16.25
3.69 3.81 3.93
3.51 3.58 3.65
XXXX = Specific Device Code
~
~
A
Y
= Assembly Location
=
Y
e
ar
WW =
Work Week
ZZ =
Assembly Lot Code
L1
P
*This information is generic. Please refer to
device data sheet for actual part marking.
Pb
−
Free indicator, “G” or microdot “
G
”, may
or may not be present. Some products may
not follow the Generic Marking.
P1 6.60 6.80 7.00
Q
S
5.34 5.46 5.58
5.34 5.46 5.58
Electronic versions are uncontrolled except when accessed directly from the Document Repository.
Printed versions
are uncontrolled
except when stamped
“CONTROLLED COPY” in red.
DOCUMENT NUMBER:
DESCRIPTION:
98AON13851G
TO
−
247
−
3LD SHORT LEAD
PAGE 1 OF 1
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are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.
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the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically
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©
Semiconductor Components Industries, LLC, 2018
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are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.
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−
Marking.pdf
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o
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