onsemi-FDJ1027P

August

200

6  

FDJ1027P  

P-Channel 1.8V Specified PowerTrench

®

MOSFET  

Features  

General Description  

■

–2.8 A,

 

–20 V  

R

R

R

= 160 m

Ω

@ V

 

= –4.5 V  

This dual P-Channel 1.8V specified MOSFET uses Fairchild’s  

advanced low voltage Power

T

r

ench process. Packaged in FLMP  

DS(ON)  

DS(ON)  

DS(ON)  

GS  

= 230 m

Ω

@ V

 

= –2.5 V  

GS  

= 390 m

Ω

@ V

 

= –1.8 V  

SC75, the R  

and thermal properties of the device are  

GS  

DS(ON)  

optimized for battery power management applications.  

■

Low gate charge, High Power and Current handling capability  

■

High performance trench technology for extremely low  

R

DS(ON)  

■

FLMP SC75 package:

 

Enhanced thermal performance in  

industry-standard package size  

Applications  

■

Battery management/Charger Application  

■

Load switch  

Bottom Drain Contact  

S2  

S1  

4

5

6

3

2

1

G1  

G2  

S2  

S1  

MOSFET Maximum Ratings

T =25°C unless otherwise noted  

A

Symbol  

Parameter  

Ratings  

Units  

V

Drain-Source Voltage  

Gate-Source Voltage  

–20  

V

V

A

DSS  

V

8

–2.8  

GSS  

I

Drain Current  

– Continuous  

– Pulsed  

Power Dissipation for Single Operation  

(Note 1a)  

D

–12  

P

(Note 1a)  

(Note 1b)  

1.5  

W

°

C  

D

0.9  

T , T  

Operating and Storage Junction

T

e

mperature Range  

–55 to +150  

J

stg  

Thermal Characteristics  

R

R

Thermal Resistance, Junction-to-Ambient  

Thermal Resistance, Junction-to-Case  

(Note 1a)  

80  

5

°

C/W  

θ

JA  

θ

JC  

Package Marking and Ordering Information  

.G  

FDJ1027P  

7″  

8mm  

3000 units  

©2005 Fairchild Semiconductor Corporation  

1

FDJ1027P Rev. C

3

 

Electrical Characteristics

T =

 

25°C unless otherwise noted  

A

Symbol  

Parameter  

Test Conditions  

Min Typ  

Max Units  

Off Characteristics  

BV  

Drain–Source Breakdown Voltage  

V

I

= 0

V

, I

 

=

–

250

µ

A  

–20  

–13  

V

DSS  

GS  

D

∆

BV

DSS  

∆

T  

Breakdown Voltage

T

e

mperature  

Coefficient  

= –250

µ

A, Referenced to 25°C  

mV/

°

C  

D

J

I

Zero Gate Voltage Drain Current  

Gate–Body Leakage  

V

V

= –16

V

, V

 

= 0 V  

–1  

µ

A  

DSS  

DS  

GS  

I

=

8

V

, V

 

= 0 V  

100  

nA  

GSS  

GS  

DS  

On Characteristics

(Note 2)  

Gate Threshold Voltage  

V

V

I

= V

 

, I

 

= –250

µ

A  

–0.4  

–0.8  

3

–1.5  

V

GS(th)  

DS  

GS  

D

∆

V

GS(th)  

Gate Threshold Voltage  

T

e

mperature Coefficient  

= –250

µ

A, Referenced to 25

°

C  

mV/

°

C  

D

∆

T  

J

R

Static Drain–Source  

On–Resistance  

V

V

V

V

= –4.5

V

, I

 

=

–

2.8 A  

108  

163  

283  

150  

160  

230  

390  

238  

m

Ω  

DS(on)  

GS  

D

= –2.5

V

, I

 

=

–

2.2 A  

GS  

GS  

GS  

D

= –1.8

V

, I

 

=

–

1.7 A  

D

= –4.5

V

, I

 

=

–

2.8 A, T

 

= 125

°

C  

D

J

g

Forward

T

r

ansconductance  

V

= –5

V

, I

 

=

–

2.8 A  

5

S

FS  

DS  

D

Dynamic Characteristics  

C

C

C

Input Capacitance  

V

= –10

V

, V

 

= 0 V,  

290  

55  

pF  

pF  

pF  

Ω

iss  

DS  

GS  

f = 1.0 MHz  

Output Capacitance  

Reverse

T

r

ansfer Capacitance  

Gate Resistance  

oss  

rss  

29  

Rg  

f = 1.0 MHz  

1

3

 

Switching Characteristics

(Note 2)  

t

t

t

t

T

u

rn–On Delay Time  

T

u

rn–On Rise Time  

T

u

rn–Off Delay Time  

T

u

rn–Off Fall Time  

T

o

tal Gate Charge  

Gate–Source Charge  

Gate–Drain Charge  

V

V

= –10

V

, I

 

=

–

1 A,  

8

13  

16  

23  

23  

32  

4

ns  

ns  

d(on)  

DD  

GS  

D

= –4.5

V

, R  

= 6

Ω  

GEN  

r

13  

ns  

d(off)  

f

18  

ns  

Q

Q

Q

V

V

= –10

V

, I

 

=

–

2.8 A,  

3

nC  

nC  

nC  

g

DS  

GS  

D

= –4.5 V  

0.65  

0.75  

gs  

gd  

Drain–Source Diode Characteristics and Maximum Ratings  

Maximum Continuous Drain–Source Diode Forward Current  

Drain–Source Diode Forward Voltage

 

V =

 

0

V

, I

 

=

–

1.25 A (Note 2)  

I

–1.25  

–1.2  

A

V

S

V

–0.8  

14  

4

SD  

GS  

S

trr  

Diode Reverse Recovery Time  

Diode Reverse Recovery Charge  

I

= –2.8 A,  

ns  

nC  

F

d /d

 

= 100 A/µs  

iF  

t

Qrr  

Notes:  

1.  

R

R

is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of the drain pins.  

θ

JA  

θ

JC  

is guaranteed by design while R  

is determined by the user’s board design.  

θ

CA  

a) 80°C/W

 

when mounted on a  

b) 140°C/W when mounted on  

a

2

1in pad

 

of 2 oz copper (Single  

Operation).  

minimum pad of  

(Single Operation).  

2 oz copper  

Scale 1 : 1 on letter size paper  

2.

Pulse

T

e

st: Pulse Width < 300

µ

s, Duty Cycle < 2.0%  

2

FDJ1027P Rev. C

3  

Typical Characteristics  

2.6  

2.4  

2.2  

2

10  

V

GS

=-4.5V  

-3.5V  

-3.0V  

V

GS

=-1.8V  

8

6

4

2

0

-2.5V  

-2.0V  

1.8  

1.6  

1.4  

1.2  

1

-2.5V  

-2.0V  

-1.8V  

-3.0V  

-3.5V  

-4.0V  

-4.5V  

0.8  

0

1

2

3

4

5

150  

2.5  

0

2

4

6

8

10  

-V

DS

, DRAIN TO SOURCE VOLTAGE (V)  

-I

D

, DRAIN CURRENT (A)  

Figure 1. On-Region Characteristics.  

Figure 2. On-Resistance Variation with  

Drain Current and Gate Voltage.  

1.5  

1.4  

1.3  

1.2  

1.1  

1

0.5  

I

D

= -1.4A  

I

D

= -2.8A  

0.44  

0.38  

0.32  

0.26  

0.2  

V

GS

= -4.5V  

T

A

= 125

°

C  

0.9  

0.8  

0.7  

0.14  

0.08  

T

A

= 25

°

C  

-50  

-25  

0

25  

50  

75  

100  

125  

1.5  

2

2.5  

3

3.5  

4

4.5  

5

-V

GS

, GATE TO SOURCE VOLTAGE (V)  

T

J

, JUNCTION TEMPERATURE (

°

C)  

Figure 3. On-Resistance Variation with  

Temperature.  

Figure 4. On-Resistance Variation with  

Gate-to-Source Voltage.  

100  

5

V

DS

= -5V  

V

GS

=0V  

T

A

= -55

°

C  

2

5

°

C  

10  

1

4

3

2

1

0

12

5

°

C  

T

A

= 125

°

C  

0.1  

25

°

C  

0.01  

0.001  

0.0001  

-55

°

C  

0

0.2  

0.4  

0.6  

0.8  

1

1.2  

0.5  

1

1.5  

2

-V

GS

, GATE TO SOURCE VOLTAGE (V)  

-V

SD

, BODY

 

DIODE FORWARD VOLTAGE (V)  

Figure 5. Transfer Characteristics.  

Figure 6. Body Diode Forward Voltage Variation  

with Source Current and Temperature.  

3

FDJ1027P Rev. C

3  

Typical Characteristics  

5

500  

400  

300  

200  

100  

0

f = 1 MHz  

V

GS

= 0 V  

I

D

= -2.8A  

V

DS

= -5V  

-10V  

4

-15V  

C

ISS  

3

2

1

0

C

OSS  

C

RSS  

0

0.5  

1

1.5  

2

2.5  

3

3.5  

0

5

10  

15  

20  

Q

g

, GATE CHARGE (nC)  

-V

DS

, DRAIN TO SOURCE VOLTAGE (V)  

Figure 7. Gate Charge Characteristics.  

Figure 8. Capacitance Characteristics.  

10  

8

100  

10  

SINGLE PULSE  

R

θ

JA

= 140

°

C/W  

T

A

= 25

°

C  

100

µ

s  

R

DS(ON)

LIMIT  

1ms  

6

10ms  

1s  

100ms  

1

DC 10s  

4

V

GS

= -4.5V  

SINGLE PULSE  

R

θ

JA

= 140

o

C/W  

0.1  

0.01  

2

T

0

0.001  

0.01  

0.1  

1

10  

100  

1000  

0.1  

1

10  

100  

t

1

, TIME (sec)  

-V

DS

, DRAIN-SOURCE VOLTAGE (V)  

Figure 9. Maximum Safe Operating Area.  

Figure 10. Single Pulse Maximum  

Power Dissipation.  

1

D = 0.5  

R

θ

JA

(t) = r(t) * R

θ  

JA  

R

θ

JA

= 140

°

C/W  

0.2  

P(pk)  

0.1  

0.1  

t

1  

0.05  

t

2  

θ

0.02  

0.01  

T

J

– T

A

= P * R

J

A

(t)  

Duty Cycle, D =

t

1

/

t

2  

SINGLE PULSE  

0.01  

0.0001  

0.001  

0.01  

0.1  

1

10  

100  

1000  

t

1

, TIME (sec)  

Figure 11. Transient Thermal Response Curve.  

Thermal characterization performed using the conditions described in Note 1b.  

Transient thermal response will change depending on the circuit board design.  

4

FDJ1027P Rev. C

3  

Dimensional Outline and Pad Layout  

PKG  

L

PKG  

L

(0.24)  

DRAIN  

C

C

(0.18)  

1

3

0.30 MIN  

4

6

DRAIN 1  

TERMINAL  

0.30  

0.20  

0.20  

PKG C  

(0.73)  

L

2.35 MIN  

PKG  

L

0.84  

C

(0.46)  

(0.50)  

1.35  

0.60  

6

4

DRAIN 1  

DRAIN 2  

0.50 MIN  

Bottom View  

1

3

DRAIN 2  

TERMINAL  

0.50  

1.00  

1.70  

1.50  

PKG  

A

Recommended Landing Pattern  

C

L

B

4

6

1.75  

1.55  

PKG C  

L

1

3

0.275  

0.125  

(0.20)  

0.075  

M

A B  

0.50  

0.50  

1.00  

Top View  

1.00  

PKG  

C

L

0.80  

0.65  

SEATING  

PLANE  

PKG  

C

L

0.225  

0.075  

1.075  

0.925  

2.15  

1.85  

5

FDJ1027P Rev. C

3  

TRADEMARKS  

The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is not  

intended to be an exhaustive list of all such trademarks.  

®

ACEx™  

FACT Quiet Series™  

GlobalOptoisolator™  

GTO™  

OCX™  

OCXPro™  

OPTOLOGIC  

OPTOPLANAR™  

PACMAN™  

POP™  

Power247™  

PowerEdge™  

PowerSaver™  

SILENT SWITCHER  

SMART START™  

SPM™  

UniFET™  

UltraFET  

VCX™  

®

ActiveArray™  

Bottomless™  

Build it Now™  

CoolFET™  

CROSSVOLT

™  

DOME™  

®

HiSeC™  

Stealth™  

Wire™  

2

I C™  

SuperFET™  

SuperSOT™-3  

SuperSOT™-6  

SuperSOT™-8  

SyncFET™  

TCM™  

TinyBoost™  

TinyBuck™  

i-Lo

™  

ImpliedDisconnect™  

IntelliMAX™  

ISOPLANAR™  

LittleFET™  

MICROCOUPLER™  

MicroFET™  

MicroPak™  

MICROWIRE™  

MSX™  

MSXPro™  

EcoSPARK™  

2

E CMOS™  

®

EnSigna™  

FACT™  

PowerTrench  

®

QFET  

®

FAST  

QS™  

FASTr™  

FPS™  

FRFET™  

QT Optoelectronics™  

Quiet Series™  

RapidConfigure™  

RapidConnect™  

μ

SerDes™  

TinyPWM™  

TinyPower™  

®

TinyLogic  

TINYOPTO™  

TruTranslation™  

UHC™  

Across the board. Around the world.™  

The Power Franchise  

®

ScalarPump™  

Programmable Active Droop™  

DISCLAIMER  

FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS  

HEREIN TO IMPROVE RELIABILITY, FUNCTION, OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE  

APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER  

ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS.

 

THESE SPECIFICATIONS DO NOT EXPAND THE TERMS OF FAIRCHILD’S  

WORLDWIDE TERMS AND CONDITIONS, SPECIFICALLY THE WARRANTY THEREIN, WHICH COVERS THESE PRODUCTS.  

LIFE SUPPORT POLICY  

FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR  

SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION.  

As used herein:  

1. Life support devices or systems are devices or systems which,  

(a) are intended for surgical implant into the body, or (b) support or  

sustain life, or (c) whose failure to perform when properly used in  

accordance with instructions for use provided in the labeling, can be  

reasonably expected to result in significant injury to the user.  

2. A critical component is any component of a life support device or  

system whose failure to perform can be reasonably expected to  

cause the failure of the life support device or system, or to affect its  

safety or effectiveness.  

PRODUCT STATUS DEFINITIONS  

Definition of Terms  

Datasheet Identification  

Advance Information  

Product Status  

Definition  

Formative or In Design  

This datasheet contains the design specifications for  

product development. Specifications may change in  

any manner without notice.  

Preliminary  

First Production  

This datasheet contains preliminary data, and  

supplementary data will be published at a later date.  

Fairchild Semiconductor reserves the right to make  

changes at any time without notice to improve  

design.  

No Identification Needed  

Obsolete  

Full Production  

This datasheet contains final specifications. Fairchild  

Semiconductor reserves the right to make changes at  

any time without notice to improve design.  

Not In Production  

This datasheet contains specifications on a product  

that has been discontinued by Fairchild semiconductor.  

The datasheet is printed for reference information only.  

Rev. I20