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May 2014
FDMA7630
Single N-Channel PowerTrench
®
MOSFET
30 V, 11 A, 13 m
Ω
Features
General Description
Max r
DS(on)
= 13 m
Ω
at V
GS
= 10 V, I
D
= 11 A
This device has been designed to provide maximum efficiency
and thermal performance for synchronous buck converters. The
low r
DS(on)
and gate charge provide excellent switching
performance.
Max r
DS(on)
= 20 m
Ω
at V
GS
= 4.5 V, I
D
= 9 A
Low Profile – 0.8 mm maximum – in the new package
MicroFET 2×2 mm
Free from halogenated compounds and antimony oxides
RoHS compliant
Application
DC – DC Buck Converters
Pin 1
G
D
D
Bottom Drain Contact
D
D
S
D
D
Drain
Source
G
D
D
S
MicroFET 2X2 (Bottom View)
MOSFET Maximum Ratings
T
A
= 25 °C unless otherwise noted
Symbol
V
DSS
V
GSS
Parameter
Ratings
Units
Drain to Source Voltage
Gate to Source Voltage
Drain Current
-Continuous
-Pulsed
30
V
V
±20
T
A
= 25 °C
(Note 1a)
11
24
I
D
A
Power Dissipation
Power Dissipation
T
A
= 25 °C
T
A
= 25 °C
(Note 1a)
(Note 1b)
2.4
P
D
W
0.9
T
J
, T
STG
Operating and Storage Junction
T
e
mperature Range
–55 to +150
°C
Thermal Characteristics
R
θ
JA
R
θ
JA
Thermal Resistance, Junction to Ambient
Thermal Resistance, Junction to Ambient
(Note 1a)
(Note 1b)
52
°C/W
145
Package Marking and Ordering Information
Device Marking
Device
Package
Reel Size
7 ’’
Tape Width
8 mm
Quantity
630
FDMA7630
MicroFET 2×2
3000 units
1
©2012 Fairchild Semiconductor Corporation
FDMA7630 Rev.C5
Electrical Characteristics
T
J
= 25 °C unless otherwise noted
Symbol
Parameter
Test Conditions
Min
Typ
Max
Units
Off Characteristics
BV
DSS
Drain to Source Breakdown Voltage
I
D
= 250
μ
A, V
GS
= 0 V
30
V
Δ
BV
DSS
Δ
T
J
Breakdown Voltage
T
e
mperature
Coefficient
I
D
= 250
μ
A, referenced to 25 °C
15
mV/°C
I
DSS
I
GSS
Zero Gate Voltage Drain Current
Gate to Source Leakage Current
V
DS
= 24 V, V
GS
= 0 V
V
GS
= 20 V,
V
DS
= 0 V
1
μ
A
100
nA
On Characteristics
V
GS(th)
Gate to Source Threshold Voltage
V
GS
= V
DS
, I
D
= 250
μ
A
1.0
2.0
–6
3.0
V
Δ
V
GS(th)
Δ
T
J
Gate to Source Threshold Voltage
T
e
mperature Coefficient
I
D
= 250
μ
A, referenced to 25 °C
GS
= 10
V
,
I
D
= 11 A
mV/°C
V
10
14
14
36
13
20
18
r
DS(on)
g
FS
Static Drain to Source On Resistance
Forward Transconductance
V
GS
= 4.5
V
,
I
D
= 9 A
m
Ω
V
GS
= 10
V
,
I
D
= 11 A, T
J
= 125 °C
V
DS
= 5
V
,
I
D
= 11 A
S
Dynamic Characteristics
C
iss
C
oss
C
rss
R
g
Input Capacitance
1020
315
35
1360
415
55
pF
pF
pF
Ω
V
DS
= 15 V, V
GS
= 0 V
f = 1.0 MHz
Output Capacitance
Reverse Transfer Capacitance
Gate Resistance
1.7
Switching Characteristics
t
d(on)
t
r
t
d(off)
t
f
Turn-On Delay Time
Rise Time
8
3
15
10
34
10
22
10
ns
ns
V
DD
= 15 V, I
D
= 11 A
V
GS
= 10 V, R
GEN
= 6
Ω
Turn-Off Delay Time
Fall Time
19
3
ns
ns
Q
g
T
o
tal Gate Charge
T
o
tal Gate Charge
Gate to Source Gate Charge
Gate to Drain “Miller” Charge
V
GS
= 0 V to 10 V
16
8
nC
nC
nC
nC
Q
g
V
GS
= 0 V to 4.5 V
V
DD
= 15 V,
I
D
= 11 A
Q
gs
Q
gd
3.0
2.2
Drain-Source Diode Characteristics
I
S
Maximum Continuous Drain-Source Diode Forward Current
Source to Drain Diode
Forward Voltage
V
GS
= 0 V, I
S
= 2 A
Reverse Recovery Time
2
A
V
V
SD
t
rr
(Note 2)
0.8
21
6
1.2
33
12
ns
nC
I
F
= 11 A, di/dt = 100 A/
μ
s
Q
rr
Reverse Recovery Charge
NOTES:
2
1. R
is determined with the device mounted on a 1 in
pad 2 oz copper pad on a 1.5 x 1.5 in. board of FR-4 material. R
is guaranteed by design while R
is determined by
θ
CA
θ
JA
θ
JC
the user’s board design.
a. 52 °C/W when mounted
on a 1 in
pad of
2 oz copper.
b. 145 °C/W when mounted on
a
minimum pad of 2 oz copper.
2
2. Pulse Test: Pulse Width < 300
μ
s, Duty cycle < 2.0%.
2
©2012 Fairchild Semiconductor Corporation
FDMA7630 Rev.C5
Typical Characteristics
T
J
= 25°C unless otherwise noted
24
3.0
2.5
2.0
1.5
1.0
0.5
V
GS
= 10 V
PULSE DURATION = 80
μ
s
DUTY CYCLE = 0.5% MAX
V
GS
= 3.5 V
V
GS
= 6 V
20
V
GS
= 4.5 V
V
GS
= 4 V
16
12
V
GS
= 3.5 V
V
GS
= 4 V
V
GS
= 4.5 V
8
4
PULSE DURATION = 80
μ
s
DUTY CYCLE = 0.5% MAX
V
GS
= 10 V
V
GS
= 6 V
16
0
0
0.5
1.0
1.5
2.0
0
4
8
12
20
24
V
DS
,
DRAIN TO SOURCE VOLTAGE (V)
I
D
,
DRAIN CURRENT (A)
Figure 1.
On-Region Characteristics
Figur
e
2
. N
o r m a l i z e d O n – R e s i s ta n c e
vs Drain Current and Gate Voltage
60
50
40
30
20
10
0
1.6
1.4
1.2
1.0
0.8
0.6
I
D
= 11 A
PULSE DURATION = 80
μ
s
DUTY CYCLE = 0.5% MAX
V
GS
= 10 V
I
D
= 11 A
T
J
= 125
o
C
T
J
= 25
o
C
2
4
6
8
10
-75 -50 -25
0
25 50 75
100 125 150
T
J
,
JUNCTION TEMPERATURE
(
o
C
)
V
GS
,
GATE TO SOURCE VOLTAGE (V)
Figur
e
4
. On-Resistance
vs Gate to
Source Voltage
F i gu re 3 .
N orma li zed
On – Res is ta nc e
vs Junction Temperature
24
24
PULSE DURATION = 80
μ
s
DUTY CYCLE = 0.5% MAX
V
GS
= 0 V
10
20
16
12
8
V
DS
= 5 V
T
J
= 125
o
C
1
0.1
T
J
= 125
o
C
T
J
= 25
o
C
T
J
= 25
o
C
T
J
= -55
o
C
4
T
J
= -55
o
C
0
1.0
0.01
1.5
2.0
2.5
3.0
3.5
4.0
4.5
5.0
0.2
0.4
0.6
0.8
1.0
1.2
V
GS
, GATE TO SOURCE VOLTAGE (V)
V
SD
, BODY DIODE FORWARD VOLTAGE (V)
Figure 5.
Transfer Characteristics
Figur
e
6
. Source
to Drain Diode
Forward Voltage vs Source Current
3
©2012 Fairchild Semiconductor Corporation
FDMA7630 Rev.C5
Typical Characteristics
T
J
= 25°C unless otherwise noted
3000
1000
10
I
D
= 11 A
8
C
iss
V
DD
= 10 V
6
V
DD
= 15 V
C
oss
100
10
4
V
DD
= 20 V
2
0
f = 1 MHz
= 0 V
C
rss
V
GS
0.1
1
10
30
0
5
10
15
20
Q
g
, GATE CHARGE (nC)
V
DS
, DRAIN TO SOURCE VOLTAGE (V)
Figur
e
8
. C
a p a c i t a n c e v s
D r a i n
to Source Voltage
Figure 7.
Gate Charge Characteristics
50
1000
100
10
SINGLE PULSE
θ
JA
= 145
o
C/W
T
A
= 25
o
C
V
GS
= 10 V
R
10
1
1 ms
THIS AREA IS
LIMITED BY r
DS(on)
10 ms
100 ms
1 s
SINGLE PULSE
0.1
T
J
= MAX RATED
θ
JA
= 145
o
C/W
T
A
= 25
o
C
1
10 s
DC
R
DERIVED FROM
TEST DATA
0.01
0.1
10
-4
10
-3
10
-2
t, PULSE WIDTH (sec)
10
-1
1
10
0.01
0.1
1
10
100
100 1000
V
DS
, DRAIN to SOURCE VOLTAGE (V)
Figur
e
9
. F
o r w a r d B i a s
S a f e
Operating Area
Figur
e
1
0. Single Pulse Maximum
Power Dissipation
2
1
DUTY CYCLE-DESCENDING ORDER
D = 0.5
0.2
0.1
0.01
0.1
0.05
0.02
0.01
P
DM
t
1
t
2
SINGLE PULSE
R
θ
JA
= 145
o
C/W
NOTES:
DUTY FACTOR: D = t /t
1
2
PEAK T
= P
J
x Z
x R
+ T
DM
θ
JA
θ
JA
A
0.001
10
-4
10
-3
10
-2
10
-1
1
10
100
1000
t, RECTANGULAR PULSE DURATION (sec)
Figure 11.
Transient Thermal Response Curve
4
©2012 Fairchild Semiconductor Corporation
FDMA7630 Rev.C5
0.05 C
2.0
A
2X
B
2.0
1.70
1.00
(0.20)
No Traces
allowed in
this Area
0.05 C
4
6
PIN#1 IDENT
0.10 C
TOP VIEW
2X
1.05
2.30
ꢀꢁꢂꢃꢀꢁꢀꢃ
ꢀꢁꢄꢀꢀꢁꢀꢃ
0.47(6X)
0.08 C
1
3
SIDE VIEW
C
ꢀꢁꢀꢄꢃꢀꢁꢀꢄꢃ
SEATING
PLANE
0.40(6X)
0.65
RECOMMENDED
LAND PATTERN OPT 1
ꢄꢁꢀꢀꢀꢁꢀꢃ
(0.15)
(0.50)
ꢀꢁꢇꢀꢀꢁꢀꢃ
(0.20)4X
ꢀꢁꢉꢀꢀꢁꢀꢃ
PIN #1 IDENT
1.70
0.45
(0.20)
1
3
1.00
ꢀꢁꢄꢅꢀꢁꢀꢃ
(6X)
ꢀꢁꢃꢆꢀꢁꢀꢃ
ꢈꢁꢀꢀꢀꢁꢀꢃ
4
6
(0.50)
ꢄꢁꢀꢀꢀꢁꢀꢃ
1.05
0.66
2.30
6
4
(6X)
C A B
C
ꢀꢁꢇꢀꢀꢁꢀꢃ
0.47(6X)
0.65
0.10
1
3
1.30
BOTTOM VIEW
0.05
0.40(7X)
RECOMMENDED
LAND PATTERN OPT 2
0.65
NOTES:
A. PACKAGE
DOES NOT FULLY CONFORM
TO JEDEC MO-229 REGISTRATION
B. DIMENSIONS
ARE IN MILLIMETERS.
C. DIMENSIONS
AND TOLERANCES PER
ASME Y14.5M, 2009.
D. LAND
PATTERN RECOMMENDATION IS
EXISTING INDUSTRY LAND PATTERN.
E. DRAWING
FILENAME: MKT-MLP06Lrev4.
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ON Semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
Buyer is responsible for its products and applications using ON Semiconductor products, including compliance with all laws, regulations and safety requirements or standards,
regardless of any support or applications information provided by ON Semiconductor. “Typical” parameters which may be provided in ON Semiconductor data sheets and/or
specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer
application by customer’s technical experts. ON Semiconductor does not convey any license under its patent rights nor the rights of others. ON Semiconductor products are not
designed, intended, or authorized for use as a critical component in life support systems or any FDA Class 3 medical devices or medical devices with a same or similar classification
in a foreign jurisdiction or any devices intended for implantation in the human body. Should Buyer purchase or use ON Semiconductor products for any such unintended or unauthorized
application, Buyer shall indemnify and hold ON Semiconductor and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and
expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such
claim alleges that ON Semiconductor was negligent regarding the design or manufacture of the part. ON Semiconductor is an Equal Opportunity/Affirmative Action Employer. This
literature is subject to all applicable copyright laws and is not for resale in any manner.
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