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March 2015
FDMA86108LZ
Single N-Channel PowerTrench
®
MOSFET
100 V, 2.2 A, 243 m
Ω
Features
General Description
ꢀ
Max r
DS(on)
= 243 m
Ω
at V
GS
= 10 V, I
D
= 2.2 A
ꢀ
Max r
DS(on)
= 366 m
Ω
at V
GS
= 4.5 V, I
D
= 1.8 A
This device has been designed to provide maximum efficiency
and thermal performance for synchronous buck converters. The
low r
DS(on)
and gate charge provide excellent switching
performance.
ꢀ
Low Profile – 0.8 mm Maximum in the New Package MicroFET
2×2 mm
Application
ꢀ
Free from Halogenated Compounds and Antimony Oxides
ꢀ
RoHS Compliant
ꢀ
DC – DC Buck Converters
Pin 1
G
D
D
Drain
Source
D
D
S
MicroFET 2X2 (Bottom View)
MOSFET Maximum Ratings
T
A
= 25 °C unless otherwise noted
Symbol
V
DS
V
GS
Parameter
Ratings
Units
Drain to Source Voltage
Gate to Source Voltage
100
V
V
±20
Drain Current
-Continuous
-Pulsed
T
A
= 25 °C
(Note 1a)
(Note 3)
2.2
I
D
A
6
2.4
Power Dissipation
Power Dissipation
T
A
= 25 °C
T
A
= 25 °C
(Note 1a)
(Note 1b)
P
D
W
0.9
T
J
, T
STG
Operating and Storage Junction
T
e
mperature Range
-55 to +150
°C
Thermal Characteristics
R
θ
JA
R
θ
JA
Thermal Resistance, Junction-to-Ambient
Thermal Resistance, Junction-to-Ambient
(Note 1a)
(Note 1b)
52
°C/W
145
Package Marking and Ordering Information
Device Marking
Device
Package
Reel Size
7 ”
Tape Width
8 mm
Quantity
108
FDMA86108LZ
MicroFET 2X2
3000 units
©2015 Fairchild Semiconductor Corporation
FDMA86108LZ Rev.1.0
1
Electrical Characteristics
T
J
= 25 °C unless otherwise noted
Symbol
Parameter
Test Conditions
Min.
Typ.
Max.
Units
Off Characteristics
BV
DSS
Drain to Source Breakdown Voltage
I
D
= 250
μ
A, V
GS
= 0 V
100
V
Δ
BV
DSS
Δ
T
J
Breakdown Voltage
T
e
mperature
Coefficient
I
D
= 250
μ
A, referenced to 25 °C
74
mV/°C
I
DSS
I
GSS
Zero Gate Voltage Drain Current
Gate to Source Leakage Current
V
DS
= 80 V, V
GS
= 0 V
V
GS
= ±20 V, V
DS
= 0 V
1
μ
A
μ
A
±10
On Characteristics
V
GS(th)
Gate to Source Threshold Voltage
V
GS
= V
DS
, I
D
= 250
μ
A
1.0
2.2
-5
3.0
V
Δ
V
GS(th)
Δ
T
J
Gate to Source Threshold Voltage
T
e
mperature Coefficient
I
D
= 250
μ
A, referenced to 25 °C
V
GS
= 10
V
,
I
D
= 2.2 A
GS
= 4.5
V
,
I
D
= 1.8 A
mV/°C
188
275
243
366
V
r
DS(on)
Static Drain to Source On Resistance
Forward Transconductance
m
Ω
V
GS
= 10
V
,
I
D
= 2.2 A,
T
J
= 125 °C
345
3.7
446
g
FS
V
DD
= 5 V,
I
D
= 2.2 A
S
Dynamic Characteristics
C
iss
C
oss
C
rss
R
g
Input Capacitance
116
23
1
163
35
5
pF
pF
pF
Ω
V
DS
= 50 V, V
GS
= 0 V,
f = 1 MHz
Output Capacitance
Reverse Transfer Capacitance
Gate Resistance
0.1
1.0
3.0
Switching Characteristics
t
d(on)
t
r
t
d(off)
t
f
Turn-On Delay Time
Rise Time
4.2
1.7
7.6
1.7
2.1
1.1
0.5
0.5
10
10
ns
ns
V
DD
= 50
V
,
I
D
= 2.2 A,
V
GS
= 10 V, R
GEN
= 6
Ω
Turn-Off Delay Time
Fall Time
15
ns
10
ns
Q
g(TOT)
Q
g(TOT)
Q
gs
T
o
tal Gate Charge
T
o
tal Gate Charge
Gate to Source Charge
Gate to Drain “Miller” Charge
V
GS
= 0 V to 10 V
V
GS
= 0 V to 4.5 V
3.0
1.6
nC
nC
nC
nC
V
DD
= 50 V,
D
= 2.2 A
I
Q
gd
Drain-Source Diode Characteristics
V
SD
t
rr
Source to Drain Diode Forward Voltage
Reverse Recovery Time
V
GS
= 0 V, I
S
= 2.2 A
(Note 2)
0.9
32
20
1.2
51
32
V
ns
nC
I
F
= 2.2 A, di/dt = 100 A/
μ
s
Q
rr
Reverse Recovery Charge
NOTES:
2
1. R
is determined with the device mounted on a 1 in
pad 2 oz copper pad on a 1.5 x 1.5 in. board of FR-4 material. R
is guaranteed by design while R
is determined by
θ
JA
θ
JA
θ
JC
the user’s board design.
a. 52 °C/W when mounted
on a 1 in
pad of
2 oz copper.
b. 145 °C/W when mounted on
a
minimum pad of 2 oz copper.
2
2. Pulse Test: Pulse Width < 30
0
μ
s, Duty cycle < 2.0%.
3. Pulse Id measured at 250
μ
s, refer to Fig 11 SOA graph for more details.
©2015 Fairchild Semiconductor Corporation
FDMA86108LZ Rev.1.0
2
Typical Characteristics
T
J
= 25 °C unless otherwise noted
6
5
4
3
2
1
0
V
GS
= 6 V
V
GS
= 10 V
V
GS
= 3.5 V
V
GS
= 4 V
5
4
3
2
1
0
V
GS
= 4.5 V
V
GS
= 4.5 V
V
GS
= 4 V
V
GS
= 6 V
PULSE DURATION = 80
μ
s
DUTY CYCLE = 0.5% MAX
V
GS
= 3.5 V
V
GS
= 10 V
PULSE DURATION = 80
μ
s
DUTY CYCLE = 0.5% MAX
0
1
2
3
4
5
0
1
2
3
4
5
6
V
DS
,
DRAIN TO SOURCE VOLTAGE (V)
I
D
,
DRAIN CURRENT (A)
Figure 1.
On Region Characteristics
Figur
e
2
. Normalize
d
O
n-Resistance
vs. Drain Current and Gate Voltage
2.2
800
PULSE DURATION = 80
μ
s
DUTY CYCLE = 0.5% MAX
I
D
= 2.2 A
I
D
= 2.2 A
2.0
1.8
1.6
1.4
1.2
1.0
0.8
0.6
V
GS
= 10 V
600
400
200
0
T
J
= 125
o
C
T
J
= 25
o
C
-75 -50 -25
0
25 50 75
100 125 150
3
4
5
6
7
8
9
10
T
J
,
JUNCTION TEMPERATURE
(
o
C
)
V
GS
,
GATE TO SOURCE VOLTAGE (V)
Figur
e
3
. Normalized On Resistance
vs. Junction Temperature
Figur
e
4
. On-Resistance
vs. Gate to
Source Voltage
6
6
V
GS
= 0 V
PULSE DURATION = 80
μ
s
DUTY CYCLE = 0.5% MAX
5
1
0.1
V
DS
= 5 V
4
3
T
J
= 150
o
C
T
J
= 25
o
C
T
J
= 150
o
C
2
1
0
T
J
= 25
o
C
0.01
T
J
= -55
o
C
T
J
= -55
o
C
0.001
1
2
3
4
5
6
7
0.0
0.2
0.4
0.6
0.8
1.0
1.2
V
GS
, GATE TO SOURCE VOLTAGE (V)
V
SD
, BODY DIODE FORWARD VOLTAGE (V)
Figure 5.
Transfer Characteristics
Figur
e
6
. Sourc
e
t
o
D
rain
Diode
Forward Voltage vs. Source Current
©2015 Fairchild Semiconductor Corporation
FDMA86108LZ Rev.1.0
3
Typical Characteristics
T
J
= 25 °C unless otherwise noted
10
200
100
I
D
= 2.2 A
V
DD
= 25 V
8
C
iss
V
DD
= 50 V
V
DD
= 75 V
C
oss
6
10
1
4
C
rss
2
f = 1 MHz
GS
= 0 V
V
0
0.1
0.1
0.0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0 2.2
1
10
100
V
DS
, DRAIN TO SOURCE VOLTAGE (V)
Q
g
, GATE CHARGE (nC)
Figure 7.
Gate Charge Characteristics
Figur
e
8
. Capacitanc
e
v
s
.
D
rain
to Source Voltage
10
-1
20
10
V
GS
= 0 V
10
-2
10
-3
10
-4
10
-5
10
μ
s
1
0.1
100
μ
s
1 ms
10 ms
100 ms
1 s
10 s
DC
THIS AREA IS
LIMITED BY r
DS(on)
T
J
= 125
o
C
10
-6
10
-7
10
-8
10
-9
SINGLE PULSE
T
J
= MAX RATED
R
θ
JA
= 145
o
C/W
0.01
T
J
= 25
o
C
CURVE BENT TO
T
A
= 25
o
C
MEASURED DATA
10
0.001
0.1
1
100
400
0
5
10
15
20
25
30
35
V
DS
, DRAIN to SOURCE VOLTAGE (V)
V
GS
,
GATE TO SOURCE VOLTAGE (V)
Figure 9.
Gate Leakage Current vs. Gate to
Source Voltage
Figur
e
1
0. Forward
Bias Safe
Operating Area
2000
1000
SINGLE PULSE
R
θ
JA
= 145
o
C/W
A
= 25
o
C
T
100
10
1
0.1
10
-5
10
-4
10
-3
10
-2
10
-1
t, PULSE WIDTH (sec)
1
10
100
1000
Figure 11.
Single Pulse
Maximum Power
Dissipation
©2015 Fairchild Semiconductor Corporation
FDMA86108LZ Rev.1.0
4
Typical Characteristics
T
J
= 25 °C unless otherwise noted
2
DUTY CYCLE-DESCENDING ORDER
1
D = 0.5
0.2
0.1
0.1
P
DM
0.05
0.02
0.01
0.01
t
1
t
2
NOTES:
(t) = r(t) x R
SINGLE PULSE
0.001
Z
θ
JA
θ
JA
o
R
= 145
C/W
θ
JA
Peak T
= P
x Z
(t) + T
θ
JA A
J
DM
Duty Cycle, D = t
/ t
1
2
0.0001
10
-5
10
-4
10
-3
10
-2
t, RECTANGULAR PULSE DURATION (sec)
10
-1
1
10
100
1000
Figure 12.
Junction-to-Ambient Transient Thermal Response Curve
©2015 Fairchild Semiconductor Corporation
FDMA86108LZ Rev.1.0
5
0.05 C
2.0
A
2X
B
2.0
1.70
1.00
(0.20)
No Traces
allowed in
this Area
0.05 C
4
6
PIN#1 IDENT
0.10 C
TOP VIEW
2X
1.05
2.30
ꢀꢁꢂꢃꢀꢁꢀꢃ
ꢀꢁꢄꢀꢀꢁꢀꢃ
0.47(6X)
0.08 C
1
3
SIDE VIEW
C
ꢀꢁꢀꢄꢃꢀꢁꢀꢄꢃ
SEATING
PLANE
0.40(6X)
0.65
RECOMMENDED
LAND PATTERN OPT 1
ꢄꢁꢀꢀꢀꢁꢀꢃ
(0.15)
(0.50)
ꢀꢁꢇꢀꢀꢁꢀꢃ
(0.20)4X
ꢀꢁꢉꢀꢀꢁꢀꢃ
PIN #1 IDENT
1.70
0.45
(0.20)
1
3
1.00
ꢀꢁꢄꢅꢀꢁꢀꢃ
(6X)
ꢀꢁꢃꢆꢀꢁꢀꢃ
ꢈꢁꢀꢀꢀꢁꢀꢃ
4
6
(0.50)
ꢄꢁꢀꢀꢀꢁꢀꢃ
1.05
0.66
2.30
6
4
(6X)
C A B
C
ꢀꢁꢇꢀꢀꢁꢀꢃ
0.47(6X)
0.65
0.10
1
3
1.30
BOTTOM VIEW
0.05
0.40(7X)
RECOMMENDED
LAND PATTERN OPT 2
0.65
NOTES:
A. PACKAGE
DOES NOT FULLY CONFORM
TO JEDEC MO-229 REGISTRATION
B. DIMENSIONS
ARE IN MILLIMETERS.
C. DIMENSIONS
AND TOLERANCES PER
ASME Y14.5M, 2009.
D. LAND
PATTERN RECOMMENDATION IS
EXISTING INDUSTRY LAND PATTERN.
E. DRAWING
FILENAME: MKT-MLP06Lrev4.
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are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.
ON Semiconductor owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of ON Semiconductor’s product/patent
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Marking.pdf
. ON Semiconductor reserves the right to make changes without further notice to any products herein.
ON Semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
Buyer is responsible for its products and applications using ON Semiconductor products, including compliance with all laws, regulations and safety requirements or standards,
regardless of any support or applications information provided by ON Semiconductor. “Typical” parameters which may be provided in ON Semiconductor data sheets and/or
specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer
application by customer’s technical experts. ON Semiconductor does not convey any license under its patent rights nor the rights of others. ON Semiconductor products are not
designed, intended, or authorized for use as a critical component in life support systems or any FDA Class 3 medical devices or medical devices with a same or similar classification
in a foreign jurisdiction or any devices intended for implantation in the human body. Should Buyer purchase or use ON Semiconductor products for any such unintended or unauthorized
application, Buyer shall indemnify and hold ON Semiconductor and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and
expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such
claim alleges that ON Semiconductor was negligent regarding the design or manufacture of the part. ON Semiconductor is an Equal Opportunity/Affirmative Action Employer. This
literature is subject to all applicable copyright laws and is not for resale in any manner.
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