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July 2015
FDMC7660DC
N-Channel Dual Cool
TM
33 PowerTrench
®
MOSFET
30 V, 40 A, 2.2 m
Ω
Features
General Description
Dual Cool
TM
Top Side Cooling PQFN package
Max r
DS(on)
= 2.2 m
Ω
at V
GS
= 10 V, I
D
= 22 A
Max r
DS(on)
= 3.3 m
Ω
at V
GS
= 4.5 V, I
D
= 18 A
High performance technology for extremely low r
DS(on)
SyncFET Schottky Body Diode
This N-Channel MOSFET is produced using Fairchild
Semiconductor’s
advanced
PowerTrench
®
process.
Advancements in both silicon and Dual Cool
TM
package
technologies have been combined to offer the lowest r
DS(on)
while maintaining excellent switching performance by extremely
low Junction-to-Ambient thermal resistance.
Applications
RoHS Compliant
Synchronous Rectifier for DC/DC Converters
T
e
lecom Secondary Side Rectification
High End Server/Workstation
Pin 1
G
S
S
4
3
2
1
G
S
S
S
S
D
D
D
5
6
7
8
D
D
D
D
D
Dual Cool
TM
33
Top
Bottom
MOSFET Maximum Ratings
T
A
= 25°C unless otherwise noted
Symbol
V
DS
V
GS
Parameter
Ratings
Units
Drain to Source Voltage
Gate to Source Voltage
30
±20
V
V
(Note 4)
Drain Current
-Continuous (Package limited)
-Continuous (Silicon limited)
-Continuous
T
C
= 25 °C
T
C
= 25 °C
T
A
= 25 °C
40
150
I
D
A
(Note 1a)
30
-Pulsed
200
E
AS
Single Pulse Avalanche Energy
Peak Diode Recovery dv/dt
Power Dissipation
(Note 3)
(Note 5)
220
mJ
dv/dt
1.0
V/ns
T
C
= 25 °C
T
A
= 25 °C
78
P
D
W
Power Dissipation
(Note 1a)
3.0
T
J
, T
STG
Operating and Storage Junction
T
e
mperature Range
-55 to + 150
°C
Thermal Characteristics
R
θ
JC
R
θ
JC
R
θ
JA
R
θ
JA
R
θ
JA
R
θ
JA
R
θ
JA
Thermal Resistance, Junction to Case
(
T
o
p Source)
(Bottom Drain)
(Note 1a)
4.3
1.6
42
Thermal Resistance, Junction to Case
Thermal Resistance, Junction to Ambient
Thermal Resistance, Junction to Ambient
Thermal Resistance, Junction to Ambient
Thermal Resistance, Junction to Ambient
Thermal Resistance, Junction to Ambient
(Note 1b)
105
17
°C/W
(Note 1i)
(Note 1j)
26
(Note 1k)
12
Package Marking and Ordering Information
Device Marking
Device
Package
Dual Cool
TM
33
Reel Size
Tape Width
12 mm
Quantity
7660
FDMC7660DC
13’’
3000 units
©2011 Fairchild Semiconductor Corporation
FDMC7660DC Rev.1.3
1
Electrical Characteristics
T
J
= 25°C unless otherwise noted
Symbol
Parameter
Test Conditions
Min
Typ
Max
Units
Off Characteristics
BV
DSS
Drain to Source Breakdown Voltage
I
D
= 250
μ
A, V
GS
= 0 V
30
V
Δ
BV
DSS
Δ
T
J
Breakdown Voltage
T
e
mperature
Coefficient
I
D
= 250
μ
A, referenced to 25 °C
15
mV/°C
I
DSS
I
GSS
Zero Gate Voltage Drain Current
V
DS
= 24 V, V
GS
= 0 V
1
μ
A
Gate to Source Leakage Current, Forward
V
GS
= 20 V, V
DS
= 0 V
100
nA
On Characteristics
V
GS(th)
Gate to Source Threshold Voltage
V
GS
= V
DS
, I
D
= 250
μ
A
D
= 250
μ
A, referenced to 25 °C
GS
= 10 V, I
D
= 22 A
1.2
2
2.5
V
Δ
V
GS(th)
Δ
T
J
Gate to Source Threshold Voltage
T
e
mperature Coefficient
I
-7
mV/°C
V
1.6
2.5
2.2
147
2.2
3.3
3.3
r
DS(on)
g
FS
Static Drain to Source On Resistance
Forward Transconductance
V
GS
= 4.5 V, I
D
= 18 A
m
Ω
V
GS
= 10 V, I
D
= 22 A, T
J
= 125°C
V
DS
= 5 V, I
D
= 22 A
S
Dynamic Characteristics
C
iss
C
oss
C
rss
R
g
Input Capacitance
3885
1215
100
5170
1620
150
pF
pF
pF
Ω
V
DS
= 15 V, V
GS
= 0 V,
f = 1MHz
Output Capacitance
Reverse Transfer Capacitance
Gate Resistance
0.7
1.5
Switching Characteristics
t
d(on)
t
r
t
d(off)
t
f
Turn-On Delay Time
Rise Time
17
6.6
36
5
31
13
58
10
76
34
ns
ns
V
DD
= 15 V, I
D
= 22 A,
V
GS
= 10 V, R
GEN
= 6
Ω
Turn-Off Delay Time
Fall Time
ns
ns
Q
g
T
o
tal Gate Charge
T
o
tal Gate Charge
Gate to Source Charge
Gate to Drain “Miller” Charge
V
GS
= 0 V to 10 V
V
GS
= 0 V to 4.5 V
54
24
13
5.5
nC
nC
nC
nC
Q
g
V
DD
= 15
V
,
D
= 22 A
I
Q
gs
Q
gd
Drain-Source Diode Characteristics
V
GS
= 0 V, I
S
= 22 A
(Note 2)
(Note 2)
0.8
0.7
43
1.2
1.2
69
V
SD
Source-Drain Diode
Forward Voltage
V
V
GS
= 0 V, I
S
= 1.9 A
t
rr
Reverse Recovery Time
ns
I
F
= 22 A, di/dt = 100 A/
μ
s
Q
rr
Reverse Recovery Charge
24
38
nC
©2011 Fairchild Semiconductor Corporation
FDMC7660DC Rev.1.3
2
Thermal Characteristics
R
θ
JC
R
θ
JC
R
θ
JA
R
θ
JA
R
θ
JA
R
θ
JA
R
θ
JA
R
θ
JA
R
θ
JA
R
θ
JA
R
θ
JA
R
θ
JA
R
θ
JA
R
θ
JA
Thermal Resistance, Junction to Case
(
T
o
p Source)
(Bottom Drain)
(Note 1a)
(Note 1b)
(Note 1c)
(Note 1d)
(Note 1e)
(Note 1f)
4.3
1.6
42
105
29
40
19
23
30
79
17
26
12
16
Thermal Resistance, Junction to Case
Thermal Resistance, Junction to Ambient
Thermal Resistance, Junction to Ambient
Thermal Resistance, Junction to Ambient
Thermal Resistance, Junction to Ambient
Thermal Resistance, Junction to Ambient
Thermal Resistance, Junction to Ambient
Thermal Resistance, Junction to Ambient
Thermal Resistance, Junction to Ambient
Thermal Resistance, Junction to Ambient
Thermal Resistance, Junction to Ambient
Thermal Resistance, Junction to Ambient
Thermal Resistance, Junction to Ambient
°C/W
(Note 1g)
(Note 1h)
(Note 1i)
(Note 1j)
(Note 1k)
(Note 1l)
NOTES:
1. R
is determined with the device mounted on a FR-4 board using a specified pad of 2 oz copper as shown below. R
is guaranteed by design while R
is determined
θ
CA
θ
JA
θ
JC
by the user’s board design.
b. 105 °C/W when mounted on
a minimum pad of 2 oz copper
a. 42 °C/W when mounted on
a 1 in
pad of
2 oz
copper
2
2
c. Still air, 20.9×10.4×12.7mm Aluminum Heat Sink, 1 in
pad of 2 oz copper
d. Still air, 20.9×10.4×12.7mm Aluminum Heat Sink, minimum pad of 2 oz copper
2
e. Still air, 45.2×41.4×11.7mm Aavid Thermalloy Part # 10-L41B-11 Heat Sink, 1 in
pad of 2 oz copper
f. Still air, 45.2×41.4×11.7mm Aavid Thermalloy Part # 10-L41B-11 Heat Sink, minimum pad of 2 oz copper
2
g. 200FPM Airflow, No Heat Sink,1 in
pad of 2 oz copper
h. 200FPM Airflow, No Heat Sink, minimum pad of 2 oz copper
2
i. 200FPM Airflow, 20.9×10.4×12.7mm Aluminum Heat Sink, 1 in
pad of 2 oz copper
j. 200FPM Airflow, 20.9×10.4×12.7mm Aluminum Heat Sink, minimum pad of 2 oz copper
2
k. 200FPM Airflow, 45.2×41.4×11.7mm Aavid Thermalloy Part # 10-L41B-11 Heat Sink, 1 in
pad of 2 oz copper
l. 200FPM Airflow, 45.2×41.4×11.7mm Aavid Thermalloy Part # 10-L41B-11 Heat Sink, minimum pad of 2 oz copper
2. Pulse Test: Pulse Width < 300
μ
s, Duty cycle < 2.0%.
o
3. E
of 220 mJ is based on starting T
= 25
C; N-ch: L = 1 mH, I
= 21 A, V
= 27 V, V
= 10 V. 100% test at L = 0.3 mH, I
= 33.5 A.
AS
J
AS
DD
GS
AS
4. As an N-ch device, the negative Vgs rating is for low duty cycle pulse ocurrence only. No continuous rating is implied.
o
5. I
≤
22 A, di/dt
≤
100 A/
μ
s, V
≤
BV
, Starting
T =
25 C.
SD
DD
DSS J
©2011 Fairchild Semiconductor Corporation
FDMC7660DC Rev.1.3
3
Typical Characteristics
T
J
= 25°C unless otherwise noted
200
4
3
2
1
0
V
GS
= 10 V
PULSE DURATION = 80
μ
s
V
GS
= 6 V
DUTY CYCLE = 0.5% MAX
V
GS
= 8 V
V
GS
= 4 V
150
V
GS
= 4.5 V
V
GS
= 4.5
V
100
V
GS
= 6 V
V
GS
= 4
V
50
V
GS
= 10 V
V
GS
= 8 V
PULSE DURATION = 80
μ
s
DUTY CYCLE = 0.5% MAX
0
0.0
0.2
0.4
0.6
0.8
1.0
0
50
100
150
200
V
DS
,
DRAIN TO SOURCE VOLTAGE (V)
I
D
,
DRAIN CURRENT (A)
Figure 1.
On Region Characteristics
Figur
e
2
. N
o r m a l i z e d O n – R e s i s ta n c e
vs Drain Current and Gate Voltage
1.6
15
I
D
= 22 A
GS
= 10 V
PULSE DURATION = 80
μ
s
DUTY CYCLE = 0.5% MAX
V
I
D
= 22 A
1.4
1.2
1.0
0.8
10
5
T
J
= 125
o
C
T
J
= 25
o
C
0
-75 -50 -25
0
25 50 75
100 125 150
2
4
6
8
10
T
J
,
JUNCTION TEMPERATURE
(
o
C
)
V
GS
,
GATE TO SOURCE VOLTAGE (V)
Figure 3. Normalized On Resistance
vs Junction Temperature
Figur
e
4
. On-Resistance
vs Gate to
Source Voltage
200
500
100
V
GS
= 0 V
PULSE DURATION = 80
μ
s
DUTY CYCLE = 0.5% MAX
V
DS
= 3 V
150
100
50
T
J
= 150
o
C
T
J
= 150
o
C
10
1
T
J
= 25
o
C
T
J
= 25
o
C
T
J
= -55
o
C
T
J
= -55
o
C
0.1
0.2
0
2.0
0.4
0.6
0.8
1.0
1.2
2.5
3.0
3.5
4.0
4.5
V
SD
, BODY DIODE FORWARD VOLTAGE (V)
V
GS
, GATE TO SOURCE VOLTAGE (V)
Figure 5.
Transfer Characteristics
Figur
e
6
. Source
to Drain Diode
Forward Voltage vs Source Current
©2011 Fairchild Semiconductor Corporation
FDMC7660DC Rev.1.3
4
Typical Characteristics
T
J
= 25°C unless otherwise noted
10
6000
1000
I
D
= 22 A
C
iss
8
V
DD
= 10 V
6
C
oss
V
DD
= 15 V
V
DD
=
20 V
4
2
0
100
50
f = 1 MHz
= 0 V
C
rss
V
GS
30
0.1
1
10
0
10
20
30
40
50
60
V
DS
, DRAIN TO SOURCE VOLTAGE (V)
Q ,
GATE CHARGE (nC)
g
Figure 7.
Gate Charge Characteristics
Figur
e
8
. C
a p a c i t a n c e v s D r a i n
to Source Voltage
160
120
80
30
R
θ
JC
= 1.6
o
C/W
V
GS
= 10 V
T
J
= 25
o
C
10
V
GS
= 4.5 V
T
J
= 100
o
C
T
J
= 125
o
C
40
Limited by Package
0
25
1
0.01
50
75
100
125
150
0.1
1
10
100 300
T
C
,
CASE TEMPERATURE
(
o
C
)
t
AV
, TIME IN AVALANCHE (ms)
Figur
e
9
. U
n c l a m p e d I n d u c t i v e
Switching Capability
Figur
e
1
0. Maximum Continuous Drain
Current vs
Case Temperature
10
4
500
100
SINGLE PULSE
θ
JA
= 105
o
C/W
T
A
= 25
o
C
10
3
10
2
10
R
100 us
1 ms
10
1
10 ms
100 ms
1s
THIS AREA IS
LIMITED BY r
DS
(
on
)
SINGLE PULSE
T
J
= MAX RATED
0.1
0.01
R
θ
JA
= 105
o
C/W
A
= 25
o
C
10s
DC
1
T
0.2
10
-4
10
-3
10
-2
t, PULSE WIDTH (sec)
10
-1
1
10
100 1000
0.01
0.1
1
10
100
V
DS
, DRAIN to SOURCE VOLTAGE (V)
Figure 11.
Forward Bias Safe
Operating Area
Figur
e
1
2. Single Pulse
Maximum
Power Dissipation
©2011 Fairchild Semiconductor Corporation
FDMC7660DC Rev.1.3
5
Typical Characteristics
T
J
= 25°C unless otherwise noted
2
DUTY CYCLE-DESCENDING ORDER
1
D = 0.5
0.2
0.1
0.05
0.1
0.02
0.01
P
DM
0.01
t
1
t
2
NOTES:
DUTY FACTOR: D = t
/t
0.001
SINGLE PULSE
1
2
R
θ
JA
= 105
o
C/W
PEAK T
= P
J
x Z
x R
+ T
DM
θ
JA
θ
JA
A
0.0001
10
-4
10
-3
10
-2
10
-1
t, RECTANGULAR PULSE DURATION (sec)
1
10
100
1000
Figure 13.
Junction-to-Ambient Transient Thermal
Response Curve
©2011 Fairchild Semiconductor Corporation
FDMC7660DC Rev.1.3
6
3.40
2.37 MIN
SYM
3.30
A
KEEP
OUT
AREA
PKG
C
C
B
L
L
8
5
8
5
(0.45)
2.15 MIN
PKG
PKG
C
L
3.30
C
L
(0.40)
(0.65)
0.70 MIN
0.42 MIN
1
4
1
4
SEE DETAIL ‘A’
0.65
1.95
LAND PATTERN
RECOMMENDATION
1.95
0.10 C A B
0.32±0.05
1
0.65
4
NOTES: UNLESS OTHERWISE SPECIFIED
0.40±0.10
A) PACKAGE
STANDARD REFERENCE:
JEDEC MO-240, ISSUE A, VAR. BA,
DATED OCTOBER 2002.
B) ALL
DIMENSIONS ARE IN MILLIMETERS.
C) DIMENSIONS
DO NOT INCLUDE BURRS
OR MOLD FLASH. MOLD FLASH OR
BURRS DOES NOT EXCEED 0.10MM.
D) DIMENSIONING
AND TOLERANCING PER
ASME Y14.5M-2009.
(0.20)
PKG
3.30±0.10
2.00±0.10
C
L
8
5
(0.39)
(2.27)
E) DRAWING
FILE NAME: PQFN08CREV3
0.52
3.30±0.10
0.10 C
1.00±0.05
0.08 C
0.05
0.00
C
0.20±0.025
SEATING
PLANE
SCALE: 2X
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ON Semiconductor owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of ON Semiconductor’s product/patent
coverage may be accessed at
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. ON Semiconductor reserves the right to make changes without further notice to any products herein.
ON Semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
Buyer is responsible for its products and applications using ON Semiconductor products, including compliance with all laws, regulations and safety requirements or standards,
regardless of any support or applications information provided by ON Semiconductor. “Typical” parameters which may be provided in ON Semiconductor data sheets and/or
specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer
application by customer’s technical experts. ON Semiconductor does not convey any license under its patent rights nor the rights of others. ON Semiconductor products are not
designed, intended, or authorized for use as a critical component in life support systems or any FDA Class 3 medical devices or medical devices with a same or similar classification
in a foreign jurisdiction or any devices intended for implantation in the human body. Should Buyer purchase or use ON Semiconductor products for any such unintended or unauthorized
application, Buyer shall indemnify and hold ON Semiconductor and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and
expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such
claim alleges that ON Semiconductor was negligent regarding the design or manufacture of the part. ON Semiconductor is an Equal Opportunity/Affirmative Action Employer. This
literature is subject to all applicable copyright laws and is not for resale in any manner.
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