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November 2013  
FDMC7678  
N-Channel Power Trench

®

MOSFET  
30 V, 19.5 A, 5.3 m
Ω  
Features  
General Description  
„
Max r

DS(on)

= 5.3 m
Ω
at V

GS

= 10 V, I

D

= 17.5 A  
„
Max r

DS(on)

= 6.8 m
Ω
at V

GS

= 4.5 V, I

D

= 15.0 A  
„
High performance technology for extremely low r

DS(on)  

„
T
e
rmination is Lead-free and RoHS Compliant  
This N-Channel MOSFET is
 
produced using Fairchild  
Semiconductor’s advanced Power Trench

®

process that has  
been especially tailored to minimize the on-state resistance. This  
device is well suited for Power Management and load switching  
applications common in Notebook Computers and Portable  
Battery Packs.  
Application  
„
DC – DC Buck Converters  
„
Notebook battery power management  
„
Load switch in Notebook  
Bottom  
D D  
Top  
7
D
D
8
2
6
5
4
3
2
1
G
S
S
S
D
D
D
D
5
6
7
8
G S  
S
Pin 1  
S
1
3
4
MLP 3.3×3.3  
MOSFET Maximum Ratings
T

A

= 25 °C unless otherwise noted  
Symbol  
V

DS  

V

GS  

Parameter  
Ratings  
Units  
Drain to Source Voltage  
Gate to Source Voltage  
30  
±20  
V
V
(Note 3)  
Drain Current
 
-Continuous (Package limited)
 
T

C

= 25 °C  
19.5  
63  
Drain Current
 
-Continuous (Silicon limited)  
-Continuous  
T

C

= 25 °C  
I

D  

A
T

A

= 25 °C  
(Note 1a)  
(Note 4)  
17.5  
70  
-Pulsed  
E

AS  

Single Pulse Avalanche Energy  
Power Dissipation  
54  
mJ  
W
T

C

= 25 °C  
T

A

= 25 °C  
31  
P

D  

Power Dissipation  
(Note 1a)  
2.3  
T

J

, T

STG  

Operating and Storage Junction
T
e
mperature Range  
-55 to +150  
°C  
Thermal Characteristics  
R

θ
JC  

R

θ
JA  

Thermal Resistance, Junction to Case  
Thermal Resistance, Junction to Ambient  
4.0  
53  
°C/W  
(Note 1a)  
Package Marking and Ordering Information  
Device Marking  
Device  
Package  
Reel Size  
13 ’’  
Tape Width  
12 mm  
Quantity  
FDMC7678  
FDMC7678  
MLP 3.3×3.3  
3000 units  
©2011 Fairchild Semiconductor Corporation  
FDMC7678 Rev.
 
C2  
1

Electrical Characteristics
T

J

= 25 °C unless otherwise noted  
Symbol  
Parameter  
Test Conditions  
Min  
Typ  
Max  
Units  
Off Characteristics  
BV

DSS  

Drain to Source Breakdown Voltage  
I

D

= 250
μ
A, V

GS

= 0 V  
30  
V
Δ
BV

DSS  

Δ
T

J  

Breakdown Voltage
T
e
mperature  
Coefficient  
I

D

= 250
μ
A, referenced to 25 °C  
21  
mV/°C  
I

DSS  

I

GSS  

Zero Gate Voltage Drain Current  
V

DS

= 24 V, V

GS

= 0 V  
1
μ
A  
Gate to Source Leakage Current, Forward
 
V

GS

= 20 V, V

DS

= 0 V  
100  
nA  
On Characteristics  
V

GS(th)  

Gate to Source Threshold Voltage  
V

GS

= V

DS

, I

D

= 250
μ
A  

D

= 250
μ
A, referenced to 25 °C  
V

GS

= 10 V,
 
I

D

= 17.5 A  

GS

= 4.5 V,
 
I

D

= 15.0 A  
1.2  
1.5  
-5  
3.0  
V
Δ
V

GS(th)  

Δ
T

J  

Gate to Source Threshold Voltage  
T
e
mperature Coefficient  
I
mV/°C  
4.2  
5.1  
5.3  
6.8  
V
r

DS(on)  

Static Drain to Source On Resistance  
Forward Transconductance  
m
Ω  
V

GS

= 10 V,
 
I

D

= 17.5 A  
T

J

= 125 °C  
5.7  
90  
7.2  
g

FS  

V

DD

= 5
V
,
 
I

D

= 17.5 A  
S
Dynamic Characteristics  
C

iss  

C

oss  

C

rss  

R

g  

Input Capacitance  
1810  
620  
75  
2410  
820  
110  
2.5  
pF  
pF  
pF  
Ω
V

DS

= 15 V, V

GS

= 0 V  
f = 1MHz  
Output Capacitance  
Reverse Transfer Capacitance  
Gate Resistance  
0.7  
Switching Characteristics  
t

d(on)  

t

r  

t

d(off)  

t

f  

Turn-On Delay Time  
Rise Time  
10  
4
19  
10  
41  
10  
39  
19  
ns  
ns  
V

DD

= 15 V, I

D

= 17.5 A  
V

GS

= 10 V, R

GEN

= 6
Ω  
Turn-Off Delay Time  
Fall Time  
26  
3
ns  
ns  
T
o
tal Gate Charge  
T
o
tal Gate Charge  
Gate to Source Charge  
Gate to Drain “Miller” Charge  
V

GS

= 0 V to 10 V  
V

GS

= 0 V to 4.5 V  
28  
14  
4.4  
3.9  
nC  
nC  
nC  
nC  
Q

g(TOT)  

V

DD

= 15 V  

D

= 17.5 A  
I
Q

gs  

Q

gd  

Drain-Source Diode Characteristics  
V

GS

= 0 V, I

S

= 1.9 A  
(Note 2)  
(Note 2)  
0.7  
0.8  
30  
1.2  
1.2  
49  
V

SD  

Source to Drain Diode Forward Voltage  
V
V

GS

= 0 V, I

S

= 17.5 A  
t

rr  

Reverse Recovery Time  
ns  
I

F

= 17.5 A, di/dt = 100 A/
μ
s  
Q

rr  

Reverse Recovery Charge  
13  
23  
nC  
NOTES:  
2
1. R  
is determined with the device mounted on a 1 in
 
pad 2 oz copper pad on a 1.5 x 1.5 in. board of FR-4 material. R  
is guaranteed by design while R
 
is determined by  
θ
CA  
θ
JA  
θ
JC  
the user’s board design.  
b.125 °C/W when mounted on  
a minimum pad of
 
2 oz
 
copper  
a. 53 °C/W when mounted on  
a 1 in
 
pad of 2 oz copper  
2
2. Pulse Test: Pulse Width < 300
μ
s, Duty cycle < 2.0 %.  
3. As an N-ch device, the negative V  
rating is for low
 
duty cycle pulse occurence only. No continuous rating is implied.  
o
GS  
4. E
 
of 54 mJ is based on starting T
 
= 25
 
C, L = 0.3 mH, I
 
= 19 A, V
 
= 27 V, V
 
= 10 V.  
AS  
J
AS  
DD  
GS  
©2011 Fairchild Semiconductor Corporation  
FDMC7678 Rev.
 
C2  
2

Typical Characteristics
T

J

= 25°C unless otherwise noted  
70  
4
3
2
1
0
V

GS

= 10 V  
V

GS

= 6 V  
60  
V

GS

= 4.5 V  
50  
V

GS

= 3 V  
V

GS

= 3.5 V  
V

GS

= 3 V  
40  
30  
V

GS

= 3.5 V  
V

GS

= 4.5 V  
20  
V

GS

= 6 V  
V

GS

= 10 V  
PULSE DURATION = 80
μ
s  
DUTY CYCLE = 0.5% MAX  
PULSE DURATION = 80
μ
s  
DUTY CYCLE = 0.5% MAX  
10  
0
0
10  
20  
30  
40  
50  
60  
70  
0.0  
0.5  
1.0  
1.5  
2.0  
I

D

,
DRAIN CURRENT (A)  
V

DS

,
DRAIN TO SOURCE VOLTAGE (V)  
Figur
e
2
. N
 
o r m a l i z e d O n – R e s i s ta n c e  
vs Drain Current and Gate Voltage  
Figure 1.
 
On Region Characteristics  
1.5  
1.4  
1.3  
1.2  
1.1  
1.0  
0.9  
0.8  
0.7  
12  
PULSE DURATION = 80
μ
s  
DUTY CYCLE = 0.5% MAX  
I

D

= 17.5 A  
V

GS

= 10 V  
10  
8
I

D

= 17.5 A  
T

J

= 125

o  

C
6
4
T

J

= 25

o  

C
2
-75 -50 -25  
0
25 50 75
 
100 125 150  
2
4
6
8
10  
T

J

,
JUNCTION TEMPERATURE
(

o

C
)  
V

GS

,
GATE TO SOURCE VOLTAGE (V)  
Figure 3. Normalized On Resistance  
vs Junction Temperature  
Figur
e
4
. On-Resistance
 
vs Gate to  
Source Voltage  
70  
100  
V

GS

= 0 V  
PULSE DURATION = 80
μ
s  
60  
50  
40  
30  
20  
10  
0
DUTY CYCLE = 0.5% MAX  
T

J

= 150

o  

C
10  
1
V

DS

= 5 V  
T

J

= 25

o  

C
T

J

= 150

o  

C
T

J

= 25

o  

C
T

J

= -55

o  

C
0.1  
0.01  
T

J

= -55

o  

C
0.0  
0.2  
0.4  
0.6  
0.8  
1.0  
1.2  
1.0  
1.5  
2.0  
2.5  
3.0  
3.5  
V

SD

, BODY DIODE FORWARD VOLTAGE (V)  
V

GS

, GATE TO SOURCE VOLTAGE (V)  
Figure 5.
 
Transfer Characteristics  
Figur
e
6
. Source
 
to Drain Diode  
Forward Voltage vs Source Current  
©2011 Fairchild Semiconductor Corporation  
FDMC7678 Rev.
 
C2  
3

Typical Characteristics
T

J

= 25°C unless otherwise noted  
10  
3000  
1000  
I

D

= 17.5 A  
V

DD

= 10 V  
C

iss  

8
V

DD

= 15 V  
6
C

oss  

V

DD

= 20 V  
4
100  
30  
2
0
f = 1 MHz  
= 0 V  
C

rss  

V
GS  
0
5
10  
15  
20  
25  
30  
0.1  
1
10  
30  
V

DS

, DRAIN TO SOURCE VOLTAGE (V)  
Q

g

, GATE CHARGE (nC)  
Figure 7.
 
Gate Charge Characteristics  
Figur
e
8
. C
 
a p a c i t a n c e v s D r a i n  
to Source Voltage  
70  
60  
50  
40  
30  
20  
10  
0
30  
R

θ
JC

= 4.0

o

C/W  
T

J

= 25

o

C  
V

GS

= 10 V  
10  
V

GS

= 4.5 V  
T

J

= 100

o

C  
T

J

= 125

o  

C
Limited by Package  
1
0.001  
0.01  
0.1  
1
10  
100  
25  
50  
75  
100  
125  
150  
T

C

, C
ASE TEMPERATURE
(

o

C
)  
t

AV

, TIME IN AVALANCHE (ms)  
Figur
e
9
. U
 
n c l a m p e d I n d u c t i v e  
Switching Capability  
Figur
e
1
0. Maximum Continuous Drain  
Current vs
 
Case Temperature  
100  
10  
2000  
1000  
100  
10  
100
μ
s  
1 ms  
10 ms  
100 ms  
1 s  
THIS AREA IS  
1
LIMITED BY r  
DS(on)  
SINGLE PULSE  
T

J

= MAX RATED  
R

θ
JA

= 125

o

C/W  
0.1  
0.01  
SINGLE PULSE  
R

θ
JA

= 125

o

C/W  
T

A

= 25

o

C  
10 s  
DC  
T

A

= 25

o

C  
1
0.5  
10

-4  

10

-3  

10

-2  

t, PULSE WIDTH (sec)  
10

-1  

1
10  
0.01  
0.1  
1
10  
100200  
100 1000  
V

DS

, DRAIN to SOURCE VOLTAGE (V)  
Figure 11.
 
Forward Bias Safe  
Operating Area  
Figur
e
1
2. Single Pulse
 
Maximum  
Power Dissipation  
©2011 Fairchild Semiconductor Corporation  
FDMC7678 Rev.
 
C2  
4

Typical Characteristics
T

J

= 25°C unless otherwise noted  
2
DUTY CYCLE-DESCENDING ORDER  
1
D = 0.5  
0.2  
0.1  
0.1  
P
DM  
0.05  
0.02  
0.01  
t
1
0.01  
t
2
SINGLE PULSE  
NOTES:  
DUTY FACTOR: D = t
 
/t  

θ
JA

= 125

o

C/W  
1
2
R
PEAK T
 
= P  
J
x Z  
x R  
+ T  
DM  
θ
JA  
θ
JA
A  
0.001  
0.0005  
10

-4  

10

-3  

10

-2  

10

-1  

t, RECTANGULAR PULSE DURATION (sec)  
1
10  
100  
1000  
Figure 13.
 
Junction-to-Ambient Transient Thermal Response Curve  
©2011 Fairchild Semiconductor Corporation  
FDMC7678 Rev.
 
C2  
5

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ON Semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability  
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.  
Buyer is responsible for its products and applications using ON Semiconductor products, including compliance with all laws, regulations and safety requirements or standards,  
regardless of any support or applications information provided by ON Semiconductor. “Typical” parameters which may be provided in ON Semiconductor data sheets and/or  
specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer  
application by customer’s technical experts. ON Semiconductor does not convey any license under its patent rights nor the rights of others. ON Semiconductor products are not  
designed, intended, or authorized for use as a critical component in life support systems or any FDA Class 3 medical devices or medical devices with a same or similar classification  
in a foreign jurisdiction or any devices intended for implantation in the human body. Should Buyer purchase or use ON Semiconductor products for any such unintended or unauthorized  
application, Buyer shall indemnify and hold ON Semiconductor and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and  
expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such  
claim alleges that ON Semiconductor was negligent regarding the design or manufacture of the part. ON Semiconductor is an Equal Opportunity/Affirmative Action Employer. This  
literature is subject to all applicable copyright laws and is not for resale in any manner.  
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