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August 2016
FDMC8030
Dual N-Channel Power Trench
®
MOSFET
40 V, 12 A, 10 m
Ω
Features
General Description
Max r
DS(on)
= 10 m
Ω
at V
GS
= 10 V, I
D
= 12 A
Max r
DS(on)
= 14 m
Ω
at V
GS
= 4.5 V, I
D
= 10 A
Max r
DS(on)
= 28 m
Ω
at V
GS
= 3.2 V, I
D
= 4 A
T
e
rmination is Lead-free and RoHS Compliant
This device includes two 40V N-Channel MOSFETs in a dual
Power 33 (3 mm X 3 mm MLP) package. The package is
enhanced for exceptional thermal performance.
Applications
Battery Protection
Load Switching
Point of Load
Pin 1
G1 S1
S1 S1
Bottom Drain2 Contact
G2
S2
G1
S1
S1
S1
8
7
1
2
D1
D2
Q2
Q1
S2
S2
6
5
3
4
S2 S2
G2 S2
Power 33
Bottom Drain1 Contact
MOSFET Maximum Ratings
T
A
= 25 °C unless otherwise noted.
Symbol
V
DS
V
GS
Parameter
Ratings
Units
Drain to Source Voltage
Gate to Source Voltage
Drain Current
-Continuous
-Pulsed
40
±12
12
V
V
(Note 4)
T
A
= 25 °C
(Note 1a)
I
D
A
mJ
W
50
E
AS
P
D
Single Pulse Avalanche Energy
Power Dissipation
(Note 3)
21
T
C
= 25 °C
T
A
= 25 °C
14
Power Dissipation
(Note 1a)
1.9
T
J
, T
STG
Operating and Storage Junction
T
e
mperature Range
-55 to +150
°C
Thermal Characteristics
R
θ
JC
R
θ
JA
R
θ
JA
Thermal Resistance, Junction to Case
9.0
65
Thermal Resistance, Junction to Ambient
Thermal Resistance, Junction to Ambient
(Note 1a)
(Note 1b)
°C/W
155
Package Marking and Ordering Information
Device Marking
Device
Package
Reel Size
Tape Width
12 mm
Quantity
FDMC8030
FDMC8030
Power 33
13 ’’
3000 units
1
©2011 Fairchild Semiconductor Corporation
FDMC8030 Rev.1.3
Electrical Characteristics
T
J
= 25 °C unless otherwise noted.
Symbol
Parameter
Test Conditions
Min.
Typ.
Max.
Units
Off Characteristics
BV
DSS
Drain to Source Breakdown Voltage
I
D
= 250
μ
A, V
GS
= 0 V
40
V
Δ
BV
DSS
Δ
T
J
Breakdown Voltage
T
e
mperature
Coefficient
I
D
= 250
μ
A, referenced to 25 °C
19
mV/°C
I
DSS
I
GSS
Zero Gate Voltage Drain Current
V
DS
= 32 V, V
GS
= 0 V
1
μ
A
Gate to Source Leakage Current, Forward
V
GS
= 12 V, V
DS
= 0 V
100
nA
On Characteristics
V
GS(th)
Gate to Source Threshold Voltage
V
GS
= V
DS
, I
D
= 250
μ
A
D
= 250
μ
A, referenced to 25 °C
V
GS
= 10
V
,
I
D
= 12 A
GS
= 4.5
V
,
I
D
= 10 A
1.0
1.5
-5
2.8
V
Δ
V
GS(th)
Δ
T
J
Gate to Source Threshold Voltage
T
e
mperature Coefficient
I
mV/°C
8
10
14
28
V
10
19
r
DS(on)
Static Drain to Source On Resistance
Forward Transconductance
m
Ω
V
GS
= 3.2
V
,
I
D
= 4 A
V
GS
= 10
V
,
I
D
= 12 A
T
J
= 125 °C
13
57
16
g
FS
V
DD
= 5 V,
I
D
= 12 A
S
Dynamic Characteristics
C
iss
C
oss
C
rss
R
g
Input Capacitance
1462
321
20
1975
430
30
pF
pF
pF
Ω
V
DS
= 20 V, V
GS
= 0 V
f = 1MHz
Output Capacitance
Reverse Transfer Capacitance
Gate Resistance
0.9
2.5
Switching Characteristics
t
d(on)
t
r
t
d(off)
t
f
Turn-On Delay Time
Rise Time
7
3
13
10
33
10
30
17
ns
ns
V
DD
= 20 V, I
D
= 12 A
V
GS
= 10 V, R
GEN
= 6
Ω
Turn-Off Delay Time
Fall Time
19
3
ns
ns
T
o
tal Gate Charge
T
o
tal Gate Charge
Gate to Source Charge
Gate to Drain “Miller” Charge
V
GS
= 0 V to 10 V
V
GS
= 0 V to 5 V
21
12
2.8
2.5
nC
nC
nC
nC
Q
g(TOT)
V
DD
= 20 V
D
= 12 A
I
Q
gs
Q
gd
Drain-Source Diode Characteristics
V
SD
t
rr
Source to Drain Diode Forward Voltage
Reverse Recovery Time
V
GS
= 0 V, I
S
= 12 A
I
F
= 12 A, di/dt = 100 A/
μ
s
(Note 2)
0.83
25
9
1.2
40
18
V
ns
nC
Q
rr
Reverse Recovery Charge
NOTES:
2
1. R
is determined with the device mounted on a 1 in
pad 2 oz copper pad on a 1.5 x 1.5 in. board of FR-4 material. R
is guaranteed by design while R
is determined by
θ
CA
θ
JA
θ
JC
the user’s board design.
b.155 °C/W when mounted on
a minimum pad of
2 oz
copper
a. 65 °C/W when mounted on
a 1 in
pa
d
o
f
2
o
z copper
2
2. Pulse Test: Pulse Width < 300
μ
s, Duty cycle < 2.0 %.
o
3. E
of 21 mJ is based on starting T
= 25
C, L = 0.3
mH, I
= 12 A, V
= 36 V, V
= 10 V. 100% tested at L = 3
mH, I
= 5 A.
AS
J
AS
DD
GS
AS
4. As an N-ch device, the negative V
rating is for low duty cycle pulse occurence only. No continuous rating is implied.
gs
2
©2011 Fairchild Semiconductor Corporation
FDMC8030 Rev.1.3
Typical Characteristics
T
J
= 25°C unless otherwise noted.
50
5
4
3
2
1
0
V
GS
= 10 V
V
GS
= 3 V
V
GS
= 4.5 V
40
V
GS
= 3.5 V
V
GS
= 3.2 V
V
GS
=3.2 V
30
V
GS
= 3.5 V
V
GS
= 3 V
20
10
V
GS
= 10 V
V
GS
= 4.5 V
PULSE DURATION = 80
μ
s
DUTY CYCLE = 0.5%MAX
PULSE DURATION = 80
μ
s
DUTY CYCLE = 0.5%MAX
0
0
1
2
3
4
5
0
10
20
30
40
50
V
DS
,
DRAIN TO SOURCE VOLTAGE (V)
I
D
,
DRAIN CURRENT(A)
Figure 1.
On-Region Characteristics
Figur
e
2
. N
o r m a l i z e d O n – R e s i s ta n c e
vs. Drain Current and Gate Voltage
1.6
30
PULSE DURATION = 80
μ
s
I
D
= 12 A
DUTY CYCLE = 0.5%MAX
V
GS
= 10 V
25
20
15
10
5
1.4
1.2
1.0
0.8
0.6
I
D
= 12 A
T
J
= 125
o
C
T
J
= 25
o
C
0
2
4
6
8
10
-75 -50 -25
0
25 50 75
100 125 150
T
J
,
JUNCTION TEMPERATURE
(
o
C
)
V
GS
,
GATE TO SOURCE VOLTAGE (V)
Figur
e
4
. On-Resistance
vs. Gate to
Source Voltage
F i gu re 3 .
N orma li zed
On – Res is ta nc e
vs. Junction Temperature
50
50
PULSE DURATION = 80
μ
s
V
GS
= 0 V
DUTY CYCLE = 0.5%MAX
10
1
40
30
20
10
0
V
DS
= 5 V
T
J
= 150
o
C
T
J
= 150
o
C
T
J
= 25
o
C
0.1
T
J
= 25
o
C
T
J
= -55
o
C
0.01
0.001
T
J
= -55
o
C
0.0
0.2
0.4
0.6
0.8
1.0
1.2
1
2
3
4
V
GS
, GATE TO SOURCE VOLTAGE (V)
V
SD
, BODY DIODE FORWARD VOLTAGE (V)
Figure 5.
Transfer Characteristics
Figur
e
6
. Source
to Drain Diode
Forward Voltage vs. Source Current
3
©2011 Fairchild Semiconductor Corporation
FDMC8030 Rev.1.3
Typical Characteristics
T
J
= 25°C unless otherwise noted.
10
2000
1000
I
D
= 12 A
V
DD
= 15 V
C
iss
8
6
4
2
0
V
DD
= 20 V
C
oss
100
10
1
V
DD
= 25 V
C
rss
f = 1 MHz
= 0 V
V
GS
0
5
10
15
20
0.1
1
10
40
V
DS
, DRAIN TO SOURCE VOLTAGE (V)
Q
g
, GATE CHARGE(nC)
Figure 7.
Gate Charge Characteristics
Figur
e
8
. C
a p a c i t a n c e v s .
D r a i n
to Source Voltage
30
60
10
100
μ
s
T
J
= 25
o
C
10
1 ms
T
J
= 100
o
C
1
0.1
10 ms
THIS AREA IS
LIMITED BY r
DS(on)
100 ms
1 s
SINGLE PULSE
T
J
= MAX RATED
T
J
= 125
o
C
R
θ
JA
= 15
5
o
C/W
T
A
= 25
o
C
10 s
DC
1
0.001
0.01
0.01
0.1
1
10 20
0.01
0.1
1
10
100200
t
AV
, TIME IN AVALANCHE(ms)
V
DS
, DRAIN to SOURCE VOLTAGE (V)
Figur
e
9. U
n c l a m p e d I n d u c t i v e
Switching Capability
Figure 10.
Forward Bias Safe
Operating Area
1000
100
10
SINGLE PULSE
R
θ
JA
= 155
o
C/W
T
A
= 25
o
C
1
0.1
10
-4
10
-3
10
-2
10
-1
t, PULSE WIDTH (sec)
1
10
100
1000
Figure 11.
Single Pulse
Maximum Power
Dissipation
4
©2011 Fairchild Semiconductor Corporation
FDMC8030 Rev.1.3
Typical Characteristics
T
J
= 25°C unless otherwise noted.
2
DUTY CYCLE-DESCENDING ORDER
1
D = 0.5
0.2
0.1
0.05
0.02
0.01
0.1
P
DM
t
1
0.01
t
2
NOTES:
DUTY FACTOR: D = t
/t
SINGLE PULSE
1
2
R
θ
JA
= 155
o
C/W
PEAK T
= P
J
x Z
x R
+ T
DM
θ
JA
θ
JA
A
0.001
10
-4
10
-3
10
-2
10
-1
t, RECTANGULAR PULSE DURATION (sec)
1
10
100
1000
Figure 12.
Junction-to-Ambient Transient Thermal Response Curve
5
©2011 Fairchild Semiconductor Corporation
FDMC8030 Rev.1.3
2.52
(0.20)
0.10 C
A
3.00
2X
B
5
8
0.75(2X)
(0.35)
3.30
3.00
2.26
PIN#1
IDENT AREA
(0.20)2X
0.52
0.45
0.10 C
1
4
1.75
TOP VIEW
2X
RECOMMENDED LAND PATTERN
0.80 MAX
0.10 C
0.08 C
(0.20)
NOTES:
0.05
0.00
C
A. DOES NOT FULLY CONFORM TO
JEDEC REGISTRATION, MO-229.
SEATING
PLANE
SIDE VIEW
B. DIMENSIONS ARE IN MILLIMETERS.
C. DIMENSIONS AND TOLERANCES PER
ASME Y14.5M, 1994
ꢈꢁꢃꢀꢀꢁꢀꢃ
0.30 (2X)
PIN #1
IDENT
(1.65)
(0.35)
4X
D. LAND PATTERN RECOMMENDATION IS
BASED ON FSC DESIGN
ONLY
A
1
4
ꢀꢁꢉꢃꢃꢀꢁꢀꢃꢄꢅꢈ;ꢇ
E. DRAWING FILE NAME: MKT-MLP08Xrev2.
0.163
(0.35)
(0.25) 2X
ꢀꢁꢂꢈꢀꢁꢀꢃꢄꢅꢆ;ꢇ
ꢀꢁꢂꢈꢀꢁꢀꢃ
(2X)
0.10
0.05
C A B
8
C
5
ꢀꢁꢂꢃꢀꢁꢀꢃ
(2X)
ꢀꢁꢂꢃꢀꢁꢀꢃꢄꢅꢆ;ꢇ
0.30 (4X)
0.65
BOTTOM VIEW
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. ON Semiconductor reserves the right to make changes without further notice to any products herein.
ON Semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
Buyer is responsible for its products and applications using ON Semiconductor products, including compliance with all laws, regulations and safety requirements or standards,
regardless of any support or applications information provided by ON Semiconductor. “Typical” parameters which may be provided in ON Semiconductor data sheets and/or
specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer
application by customer’s technical experts. ON Semiconductor does not convey any license under its patent rights nor the rights of others. ON Semiconductor products are not
designed, intended, or authorized for use as a critical component in life support systems or any FDA Class 3 medical devices or medical devices with a same or similar classification
in a foreign jurisdiction or any devices intended for implantation in the human body. Should Buyer purchase or use ON Semiconductor products for any such unintended or unauthorized
application, Buyer shall indemnify and hold ON Semiconductor and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and
expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such
claim alleges that ON Semiconductor was negligent regarding the design or manufacture of the part. ON Semiconductor is an Equal Opportunity/Affirmative Action Employer. This
literature is subject to all applicable copyright laws and is not for resale in any manner.
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