onsemi-FDMC8200S

Part #onsemi-FDMC8200S
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onsemi-FDMC8200S
FDMC8200S  
Dual N-Channel PowerTrench

®

MOSFET  
30 V, 10 m
Ω
, 20 m
Ω  
General Description  
This device includes two specialized N-Channel
 
MOSFETs in a  
due power33(3mm X 3mm MLP) package. The switch node has  
been internally connected to enable easy placement and routing  
of synchronous buck converters. The control MOSFET (Q1) and  
synchronous MOSFET (Q2) have been designed to provide  
optimal power efficiency.  
Features  
Q1: N-Channel  
„
Max r

DS(on)

= 20 m
Ω
at V

GS

= 10 V, I

D

= 6 A  
„
Max r

DS(on)

= 32 m
Ω
at V

GS

= 4.5 V, I

D

= 5 A  
Q2: N-Channel  
Applications  
„
Max r

DS(on)

= 10 m
Ω
at V

GS

= 10 V, I

D

= 8.5 A  
„
Mobile Computing  
„
Max r

DS(on)

= 13.5 m
Ω
at V

GS

= 4.5 V, I

D

= 7.2
„
Mobile Internet Devices  
„
General Purpose Point of Load  
„
RoHS Compliant  
Bottom  
Bottom  
V

IN  

D1  
Q2  
V

IN  

D1  
5
6
7
8
4
3
2
1
Pin 1  
V

IN  

G

HS  

D1  
G1  
D1  
V

IN  

GND  
GND  
GND  
G

LS  

S2  
S2  
S2  
G2  
Q1  
Power33  
MOSFET Maximum Ratings
T

C

= 25°C unless otherwise noted  
Symbol  
V

DS  

V

GS  

Parameter  
Q1  
30  
Q2  
30  
Units  
Drain to Source Voltage  
Gate to Source Voltage  
V
V
(Note 4)  
(Note 3)  
±20  
18  
±20  
13  
Drain Current -Continuous (Package limited)  
-Continuous (Silicon limited)  
-Continuous  
T

C

= 25 °C  
T

C

= 25 °C  
T

A

= 25 °C  
23  
6

1a  

46  
8.5

1b  

I

D  

A
-Pulsed  
40  
27  
E

AS  

Single Pulse Avalanche Energy  
Power Dissipation for Single Operation  
Power Dissipation for Single Operation  
12  
32  
T

A

= 25°C  
T

A

= 25°C  
1.9

1a  

0.7

1c  

2.5

1b  

1.0

1d  

P

D  

W
T

J

, T

STG  

Operating and Storage Junction
T
e
mperature Range  
-55 to +150  
°C  
Thermal Characteristics  
R

θ
JA  

R

θ
JA  

R

θ
JC  

Thermal Resistance, Junction to Ambient  
65

1a  

180

1c  

7.5  
50

1b  

125

1d  

4.2  
Thermal Resistance, Junction to Ambient  
Thermal Resistance, Junction to Case  
°C/W  
Package Marking and Ordering Information  
Device Marking  
Device  
Package  
Reel Size  
13”  
Tape Width  
Quantity  
FDMC8200S  
FDMC8200S  
Power 33  
12 mm  
3000 units  
©2011
Semiconductor Components Industries, LLC.  
October-2017,
Rev.
3  
Publication Order Number:  
FDMC8200S/D  

Electrical Characteristics
T

J

= 25°C unless otherwise noted  
Symbol  
Parameter  
Test Conditions  
Type  
Min  
Typ  
Max Units  
Off Characteristics  
I

D

= 250
μ
A, V

GS

= 0 V  
I

D

= 1mA, V

GS

= 0 V  
Q1  
Q2  
30  
30  
BV

DSS  

Drain to Source Breakdown Voltage  
V
Δ
BV

DSS  

Δ
T

J  

Breakdown Voltage
T
e
mperature  
Coefficient  
I

D

= 250
μ
A, referenced to 25°C  
Q1  
Q2  
14  
13  
mV/°C  
I

D

= 1mA, referenced to 25°C  
Q1  
Q2  
1
I

DSS  

I

GSS  

Zero Gate Voltage Drain Current  
Gate to Source Leakage Current  
V

DS

= 24 V,
 
V

GS

= 0 V  
V

GS

= ±20 V, V

DS

= 0 V  
μ
A  
500  
Q1  
Q2  
100  
100  
nA  
nA  
On Characteristics  
V

GS

= V

DS

, I

D

= 250
μ
A  
Q1  
Q2  
1.0  
1.0  
2.3  
2.0  
3.0  
3.0  
V

GS(th)  

Gate to Source Threshold Voltage  
V
V

GS

= V

DS

, I

D

= 1mA  
Δ
V

GS(th)  

Δ
T

J  

Gate to Source Threshold Voltage  
T
e
mperature Coefficient  
I

D

= 250
μ
A, referenced to 25°C  
I

D

= 1mA, referenced to 25°C  
Q1  
Q2  
-5  
-6  
mV/°C  
V
V

GS

= 10
V
,
 
I

D

= 6 A  

GS

= 4.5
V
,
 
I

D

= 5 A  
16  
24  
22  
20  
32  
28  
Q1  
Q2  
V

GS

= 10
V
,
 
I

D

= 6 A, T

J

= 125°C  
r

DS(on)  

Static Drain to Source On Resistance  
m
Ω  
V

GS

= 10
V
,
 
I

D

= 8.5 A  
V

GS

= 4.5
V
,
 
I

D

= 7.2 A  
V

GS

= 10
V
,
 
I

D

= 8.5 A, T

J

= 125°C  
7.8  
10.3  
11.4  
10.0  
13.5  
13.1  
V

DD

= 5
V
,
 
I

D

= 6 A  
Q1  
Q2  
29  
43  
g

FS  

Forward Transconductance  
S
V

DD

= 5
V
,
 
I

D

= 8.5 A  
Dynamic Characteristics  
Q1  
Q2  
495  
1080 1436  
660  
C

iss  

C

oss  

C

rss  

R

g  

Input Capacitance  
pF  
pF  
pF  
Ω
Q1  
Q2  
145  
373  
195  
495  
Output Capacitance  
Reverse Transfer Capacitance  
Gate Resistance  
V

DS

= 15 V, V

GS

= 0
V
, f = 1
M
HZ  
Q1  
Q2  
20  
35  
30  
52  
Q1  
Q2  
0.2  
0.2  
1.4  
1.2  
4.2  
3.6  
Switching Characteristics  
Q1  
Q2  
11  
7.6  
20  
15  
t

d(on)  

t

r  

t

d(off)  

t

f  

Turn-On Delay Time  
Rise Time  
ns  
ns  
Q1  
V

DD

= 15
V
,
I

D

= 1 A,  
Q1  
Q2  
3.1  
1.8  
10  
10  
V

GS

= 10
V
, R

GEN

= 6
Ω  
Q1  
Q2  
35  
21  
56  
34  
Q2  
Turn-Off Delay Time  
Fall Time  
ns  
V

DD

= 15
V
,
I

D

= 1 A,  
V

GS

= 10
V
, R

GEN

= 6
Ω  
Q1  
Q2  
1.3  
8.5  
10  
17  
ns  
Q1  
Q2  
7.3  
15.7  
10  
22  
Q

g(TOT)  

Q

g(TOT)  

Q

gs  

T
o
tal Gate Charge  
T
o
tal Gate Charge  
Gate to Source
 
Charge  
Gate to Drain “Miller” Charge  
V

GS

= 0 V to 10 V  
V

GS

= 0 V to 4.5 V  
nC  
nC  
nC  
nC  
Q1  
V

DD

= 15 V,  
Q1  
Q2  
3.1  
7.2  
4.3  
10  
I

D

= 6 A  
Q1  
Q2  
1.8  
3
Q2  
V

DD

= 15 V  
I

D

= 8.5 A  
Q1  
Q2  
1
1.9  
Q

gd  

2

Electrical Characteristics
T

J

= 25°C unless otherwise noted  
Symbol  
Parameter  
Test Conditions  
Type  
Min  
Typ  
Max Units  
Drain-Source Diode Characteristics  
V

GS

= 0 V, I

S

= 6 A  
Source-Drain Diode
 
Forward Voltage
 
V

GS

= 0 V, I

S

= 8.5 A  

GS

= 0 V, I

S

= 1.3 A  
(Note 2)  
(Note 2)  
(Note 2)  
Q1  
Q2  
Q2  
0.8  
0.8  
0.6  
1.2  
1.2  
0.8  
V

SD  

V
V
Q1  
Q2  
13  
20  
24  
32  
Q1  
t

rr  

Reverse Recovery Time  
ns  
I

F

= 6 A, di/dt = 100 A/s  
Q2  
I

F

= 8.5 A, di/dt = 300 A/s  
Q1  
Q2  
2.3  
15  
10  
24  
Q

rr  

Reverse Recovery Charge  
nC  
Notes:  
2
1.
R  
is determined with the device mounted on a 1in
 
pad 2 oz copper pad on a 1.5 x 1.5 in. board of FR-4 material. R  
is guaranteed by design while R  
is determined  
θ
CA  
θ
JA  
θ
JC  
by the
 
user’s board design.  
a.65 °C/W when mounted on  
a 1 in
 
pad of
 
2 oz
 
copper  
b.50 °C/W when mounted on  
2
2
a 1 in
 
pad of
 
2 oz
 
copper  
c. 180 °C/W when mounted on
 
a  
minimum pad of 2 oz copper  
d. 125 °C/W when mounted on
 
a  
minimum pad of 2 oz copper  
2. Pulse Test: Pulse Width < 300
 
μ
s, Duty cycle < 2.0%.  
3.Starting Q1:
 
T = 25
°
C, L = 1 mH, I = 5 A, Vgs = 10V, Vdd = 27V, 100% test at L = 3 mH, I = 4 A; Q2: T = 25
°
C, L = 1 mH,
 
I = 8 A, Vgs = 10V, Vdd = 27V,  
100% test at L = 3 mH, I = 3.2 A.  
4. As an N-ch device, the negative Vgs rating is for low duty cycle pulse ocurrence only. No continuous rating is implied.  
3

Typical Characteristics (Q1 N-Channel)
T

J

= 25°C unless otherwise noted  
4
3
2
1
0
40  
30  
20  
10  
0
V

GS

= 10 V  
V

GS

= 6 V  
PULSE DURATION = 80
μ
s  
DUTY CYCLE = 0.5% MAX  
V

GS

= 4.5 V  
V

GS

= 3.5 V  
V

GS

= 4 V  
V

GS

= 4 V  
V

GS

= 4.5 V  
V

GS

= 10 V  
V

GS

= 6 V  
PULSE DURATION = 80
μ
s  
DUTY CYCLE = 0.5% MAX  
V

GS

= 3.5 V  
0
10  
20  
30  
40  
0.0  
0.5  
1.0  
1.5  
2.0  
2.5  
3.0  
I

D

,
DRAIN CURRENT (A)  
V

DS

,
DRAIN TO SOURCE VOLTAGE (V)  
Figure 1.
 
On Region Characteristics  
Figur
e
2
. N
 
o r m a l i z e d O n – R e s i s ta n c e  
vs Drain Current and Gate Voltage  
100  
1.6  
I

D

= 6 A  

GS

= 10 V  
PULSE DURATION = 80
μ
s  
DUTY CYCLE = 0.5% MAX  
V
80  
60  
40  
20  
0
1.4  
1.2  
1.0  
0.8  
I

D

= 6 A  
T

J

= 125

o

C  
T

J

= 25

o

C  
-75 -50 -25  
0
25 50 75
 
100 125 150  
2
4
6
8
10  
T

J

,
JUNCTION TEMPERATURE
(

o

C
)  
V

GS

,
GATE TO SOURCE VOLTAGE (V)  
Figure 3. Normalized On Resistance  
vs Junction Temperature  
Figur
e
4
. On-Resistance
 
vs Gate to  
Source Voltage  
40  
40  
PULSE DURATION = 80
μ
s  
V

GS

= 0 V  
DUTY CYCLE = 0.5% MAX  
10  
30  
20  
10  
0
V

DS

= 5 V  
1
T

J

= 150

o

C  
T

J

= 150

o

C  
0.1  
T

J

= 25

o

C  
T

J

= 25

o

C  
0.01  
T

J

= -55

o

C  
1.0  
T

J

= -55

o

C  
0.001  
0.2  
2.0  
2.5  
3.0  
3.5  
4.0  
4.5  
0.4  
0.6  
0.8  
1.2  
V

GS

, GATE TO SOURCE VOLTAGE (V)  
V

SD

, BODY DIODE FORWARD VOLTAGE (V)  
Figure 5.
 
Transfer Characteristics  
Figur
e
6
. Source
 
to Drain Diode  
Forward Voltage vs Source Current  
4

Typical Characteristics (Q1 N-Channel)
T

J

= 25°C unless otherwise noted  
10  
8
1000  
100  
10  
I

D

= 6 A  
C

iss  

V

DD

= 20 V  
V

DD

= 15 V  
C

oss  

6
V

DD

= 10 V  
4
C

rss  

2
f = 1 MHz  
= 0 V  
V
GS  
0
0
2
4
6
8
0.1  
1
10  
30  
V

DS

, DRAIN TO SOURCE VOLTAGE (V)  
Q ,
 
GATE CHARGE (nC)  
g
Figure 7.
 
Gate Charge Characteristics  
Figur
e
8
. C
 
a p a c i t a n c e v s D r a i n  
to Source Voltage  
25  
20  
15  
10  
5
8
7
6
R

θ
JC

= 7.5

o

C/W  
5
V

GS

= 10 V  
4
T

J

= 25

o

C  
3
Limited by Package  
T

J

= 100

o

C  
T

J

= 125

o

C  
2
V

GS

= 4.5 V  
1
0.01  
0
25  
0.1  
1
7
50  
75  
100  
125  
150  
t

AV

, TIME IN AVALANCHE (ms)  
T

c

,
CASE TEMPERATURE
(

o

C
)  
Figur
e
9
. U
 
n c l a m p e d I n d u c t i v e  
Switching Capability  
Figur
e
1
0. Maximum Continuous Drain  
Current vs
 
Case Temperature  
100  
100  
V

GS

= 10 V  
10  
100 us  
10  
1
1 ms  
1
10 ms  
THIS AREA IS  
100 ms  
LIMITED BY r  
DS(on)  
0.1  
1 s  
SINGLE PULSE  
10 s  
SINGLE PULSE  

θ
JA

= 125

o

C/W  

A

= 25

o

C  

T

J

= MAX RATED  
DC  

R

θ
JA

= 180
 
C/W  
R
0.01  
o

T
T

C

= 25

o

C  
0.1  
0.001  
0.001  
0.01  
0.1  
1
10  
100200  
0.01  
0.1  
1
10  
100  
1000  
t, PULSE WIDTH (sec)  

V

DS

, DRAIN to SOURCE VOLTAGE (V)  
Figure 11.
 
Forward Bias Safe  
Operating Area  
Figur
e
1
2. Single Pulse
 
Maximum  
Power Dissipation  
5

Typical Characteristics (Q1 N-Channel)
T

J

= 25°C unless otherwise noted  
2
DUTY CYCLE-DESCENDING ORDER  
1
D = 0.5  
0.2  
0.1  
0.05  
0.1  
0.02  
0.01  
SINGLE PULSE  

θ
JA

= 180

o

C/W  
0.01  
R
0.003  
10

-4  

10

-3  

10

-2  

10

-1  

t, RECTANGULAR PULSE DURATION (sec)  
1
10  
100  
1000  
Figure 13.
 
Junction-to-Ambient Transient Thermal Response Curve  
6

Typical Characteristics (Q2 N-Channel)
T

J

= 25 °C unless otherwise noted  
27  
18  
9
4
3
2
1
V

GS

= 10 V  
V

GS

= 4.5 V  
V

GS

= 4 V  
PULSE DURATION = 80
μ
s  
DUTY CYCLE = 0.5% MAX  
V

GS

= 3 V  
V

GS

= 3.5 V  
V

GS

= 3.5 V  
V

GS

= 3 V  
V

GS

= 4 V  
PULSE DURATION = 80
μ
s  
DUTY CYCLE = 0.5% MAX  
V

GS

= 10 V  
V

GS

= 4.5 V  
0
0.0  
0.5  
1.0  
1.5  
0
9
18  
27  
V

DS

,
DRAIN TO SOURCE VOLTAGE (V)  
I

D

,
DRAIN CURRENT (A)  
Figure 14.
 
On- Region Characteristics  
Figure 15. Normalized on-Resistance vs Drain  
Current and Gate
 
Voltage  
1.6  
100  
I

D

= 8.5 A  
PULSE DURATION = 80
μ
s  
DUTY CYCLE = 0.5% MAX  
I

D

= 8.5 A  
V

GS

= 10 V  
80  
60  
40  
20  
0
1.4  
1.2  
1.0  
0.8  
T

J

= 125

o  

C
T

J

= 25

o

C  
-75 -50 -25  
0
25 50 75
 
100 125 150  
2
4
6
8
10  
T

J

,
JUNCTION TEMPERATURE
(

o

C
)  
V

GS

,
GATE TO SOURCE VOLTAGE (V)  
Figure 17. On-Resistance vs Gate to  
Source Voltage  
Figure 16. Normalized On-Resistance  
vs Junction Temperature  
27  
30  
V

GS

= 0 V  
PULSE DURATION = 80
μ
s  
DUTY CYCLE = 0.5% MAX  
10  
T

J

= 150

o  

C
V

DS

= 5 V  
1
18  
9
T

J

= 150

o

C  
T

J

= 25

o

C  
0.1  
T

J

= 25

o

C  
T

J

= -55

o

C  
0.01  
0.001  
T

J

= -55

o  

C
0
1.0  
1.5  
2.0  
2.5  
3.0  
3.5  
4.0  
0.0  
0.2  
0.4  
0.6  
0.8  
1.0  
1.2  
V

GS

, GATE TO SOURCE VOLTAGE (V)  
V

SD

, BODY DIODE FORWARD VOLTAGE (V)  
Figure 18. Transfer Characteristics  
Figure 19. Source to Drain Diode  
Forward Voltage vs Source Current  
7

Typical Characteristics (Q2 N-Channel)
T

J

= 25°C unless otherwise noted  
3000  
1000  
10  
8
I

D

= 8.5 A  
C

iss  

V

DD

= 15 V  
6
C

oss  

V

DD

= 10 V  
V

DD

= 20 V  
100  
10  
4
2
f = 1 MHz  
= 0 V  
C

rss  

V
GS  
0
0.1  
1
10  
30  
0
2
4
6
8
10  
12  
14  
16  
V

DS

, DRAIN TO SOURCE VOLTAGE (V)  
Q ,
 
GATE CHARGE (nC)  
g
Figure 21. Capacitance vs Drain  
to Source Voltage  
Figure 20. Gate Charge Characteristics  
15  
12  
9
20  
10  
V

GS

= 10 V  
T

J

= 25

o  

C
T

J

= 100

o

C  
V

GS

= 4.5 V  
6
Limited by package  
T

J

= 125

o

C  
3
R

θ
JA

= 50

o

C/W  
1
0.01  
0
25  
0.1  
1
10  
30  
50  
75  
100  
125  
150  
T

A

,
CASE TEMPERATURE
(

o

C
)  
t

AV

, TIME IN AVALANCHE (ms)  
Figure 22. Unclamped Inductive  
Switching Capability  
F ig ure 23 . Ma ximum
 
C on tin uo us
 
D rain  
Current vs
 
Case Temperature  
50  
10  
100  
V

GS

= 10 V  
100 us  
10  
1
1 ms  
1
0.1  
THIS AREA IS  
LIMITED BY r

DS(on)  

10 ms  
100 ms  
SINGLE PULSE  
T

J

= MAX RATED  
R

θ
JA

= 125

o

C/W  
1 s  
SINGLE PULSE  
R

θ
JA

= 125

o

C/W  
10 s  
DC  

A

= 25

o

C  
T

A

= 25

o

C  
T
0.01  
0.1  
0.001  
0.01  
0.1  
1
10  
100200  
0.01  
0.1  
1
10  
100  
1000  
t, PULSE WIDTH (sec)  
V

DS

, DRAIN to SOURCE VOLTAGE (V)  
Figure 24. Forward Bias Safe  
Operating Area  
Figure 25. Single Pulse
 
Maximum Power  
Dissipation  
8

Typical Characteristics (Q2 N-Channel)
T

J

= 25 °C unless otherwise noted  
2
DUTY CYCLE-DESCENDING ORDER  
1
D = 0.5  
0.2  
0.1  
0.05  
0.1  
P
DM  
0.02  
0.01  
t
1
t
2
0.01  
NOTES:  
DUTY FACTOR: D = t
 
/t  
SINGLE PULSE  
R

θ
JA

= 125

o

C/W  
1
2
x R  
PEAK T
 
= P  
J
x Z  
+ T  
DM  
θ
JC  
θ
JC
C  
(
Note 1b
)  
0.001  
10

-4  

10

-3  

10

-2  

10

-1  

t, RECTANGULAR PULSE DURATION (sec)  
1
10  
100  
1000  
Figure 26. Junction-to-Ambient Transient Thermal Response Curve  
9

Typical Characteristics
(continued)  
SyncFET Schottky body diode  
Characteristics  
Schottky barrier diodes exhibit significant leakage at high tem-  
perature and high reverse voltage. This will increase the power  
in the device.  
Fairchild’s SyncFET process embeds a Schottky diode in parallel  
with PowerTrench MOSFET. This diode exhibits similar  
characteristics to a discrete external Schottky diode in parallel  
with a MOSFET. Figure 14 shows the reverses recovery  
characteristic of the FDMC8200S.  
7
6
5
4
0.01  
T

J

= 125

o  

C
0.001  
0.0001  
di/dt = 300 A/
μ
s  
3
T

J

= 100

o  

C
2
1
0.00001  
0.000001  
0
-1  
-2  
T

J

= 25

o  

C
0
20  
40  
TIME (ns)  
60  
80  
100  
0
5
10  
15  
20  
25  
30  
V

DS

, REVERSE VOLTAGE (V)  
Figure 27. FDMC8200S SyncFET body  
diode reverse recovery characteristic  
Figure 28. SyncFET body diode reverses  
leakage versus
 
drain-source voltage  
10  

Dimensional Outline and Pad Layout  
11  

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