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June 2014
FDMC86320
N-Channel Power Trench
®
MOSFET
80 V, 22 A, 11.7 m
Ω
Features
General Description
Max r
DS(on)
= 11.7 m
Ω
at V
GS
= 10
V
,
I
D
= 10.7 A
Max r
DS(on)
= 16 m
Ω
at V
GS
= 8 V, I
D
= 8.5 A
MSL1 robust package design
100% UIL
T
e
sted
This N-Channel MOSFET
has been designed specifically to
improve the overall efficiency and to minimize switch node
ringing of DC/DC converters using either synchronous or
conventional switching PWM controllers.It has been optimized
for low gate charge, low r
DS(on)
, fast switching speed and body
diode reverse recovery performance.
RoHS Compliant
Applications
Primary DC-DC Switch
Motor Bridge Switch
Synchronous Rectifier
Bottom
Top
S
S
D
D
Pin 1
G
S
S
S
S
D
D
D
D
D
G
D
MLP 3.3×3.3
MOSFET Maximum Ratings
T
A
= 25 °C unless otherwise noted
Symbol
V
DS
V
GS
Parameter
Ratings
Units
Drain to Source Voltage
Gate to Source Voltage
Drain Current
-Continuous
-Continuous
80
±20
V
V
T
C
= 25 °C
T
A
= 25 °C
22
I
D
(Note 1a)
(Note 3)
10.7
50
A
-Pulsed
E
AS
Single Pulse Avalanche Energy
Power Dissipation
60
mJ
W
T
C
= 25 °C
T
A
= 25 °C
40
P
D
Power Dissipation
(Note 1a)
2.3
T
J
, T
STG
Operating and Storage Junction
T
e
mperature Range
-55 to +150
°C
Thermal Characteristics
R
θ
JC
R
θ
JA
Thermal Resistance, Junction to Case
Thermal Resistance, Junction to Ambient
3.1
53
°C/W
(Note 1a)
Package Marking and Ordering Information
Device Marking
Device
Package
Reel Size
13 ’’
Tape Width
12 mm
Quantity
FDMC86320
FDMC86320
Power 33
3000 units
©2011 Fairchild Semiconductor Corporation
FDMC86320 Rev.C2
1
Electrical Characteristics
T
J
= 25 °C unless otherwise noted
Symbol
Parameter
Test Conditions
Min
Typ
Max
Units
Off Characteristics
BV
DSS
Drain to Source Breakdown Voltage
I
D
= 250
μ
A, V
GS
= 0 V
80
V
Δ
BV
DSS
Δ
T
J
Breakdown Voltage
T
e
mperature
Coefficient
I
D
= 250
μ
A, referenced to 25 °C
56
mV/°C
I
DSS
I
GSS
Zero Gate Voltage Drain Current
Gate to Source Leakage Current
V
DS
= 64 V, V
GS
= 0 V
V
GS
= ±20 V, V
DS
= 0 V
1
μ
A
±100
nA
On Characteristics
V
GS(th)
Gate to Source Threshold Voltage
V
GS
= V
DS
, I
D
= 250
μ
A
2.4
3.5
-11
4.5
V
Δ
V
GS(th)
Δ
T
J
Gate to Source Threshold Voltage
T
e
mperature Coefficient
I
D
= 250
μ
A, referenced to 25 °C
GS
= 10 V,
I
D
= 10.7 A
mV/°C
V
9.7
11.4
15
11.7
16
r
DS(on)
g
FS
Static Drain to Source On Resistance
Forward Transconductance
V
GS
= 8 V,
I
D
= 8.5 A
m
Ω
V
GS
= 10
V
,
I
D
= 10.7 A, T
J
= 125 °C
V
DS
= 10 V,
I
D
= 10.7 A
18
20
S
Dynamic Characteristics
C
iss
C
oss
C
rss
R
g
Input Capacitance
1985
353
12
2640
469
30
pF
pF
pF
Ω
V
DS
= 40 V, V
GS
= 0 V,
f = 1 MHz
Output Capacitance
Reverse Transfer Capacitance
Gate Resistance
0.5
Switching Characteristics
t
d(on)
t
r
t
d(off)
t
f
Turn-On Delay Time
Rise Time
15
8
28
16
35
10
41
34
ns
ns
V
DD
= 40 V, I
D
= 10.7 A,
V
GS
= 10 V, R
GEN
= 6
Ω
Turn-Off Delay Time
Fall Time
20
5
ns
ns
Q
g(TOT)
Q
g(TOT)
Q
gs
T
o
tal Gate Charge
V
GS
= 0 V to 10 V
V
GS
= 0 V to 8 V
29
24
10
6.9
nC
nC
nC
nC
V
DD
= 40 V,
D
= 10.7 A
I
T
o
tal Gate Charge
Q
gd
Gate to Drain “Miller” Charge
Drain-Source Diode Characteristics
V
GS
= 0 V, I
S
= 10.7 A
(Note 2)
(Note 2)
0.84
0.75
38
1.3
1.2
61
V
SD
Source to Drain Diode
Forward Voltage
V
V
GS
= 0 V, I
S
= 2 A
t
rr
Reverse Recovery Time
ns
I
F
= 10.7 A, di/dt = 100 A/
μ
s
Q
rr
Reverse Recovery Charge
27
43
nC
NOTES:
2
1. R
is determined with the device mounted on a 1 in
pad 2 oz copper pad on a 1.5 x 1.5 in. board of FR-4 material. R
is guaranteed by design while R
is determined by
θ
JA
θ
JC
θ
CA
the user’s board design.
b. 125 °C/W when mounted on
a
minimum pad of 2 oz copper
a. 53 °C/W when mounted on a
1 in
pad of
2 oz
copper
2
2. Pulse Test: Pulse Width < 300
μ
s, Duty cycle < 2.0%.
3. Starting T
= 25
°
C; N-ch: L = 0.3 mH, I
= 20 A, V
= 72 V, V
= 10 V.
J
AS
DD
GS
©2011 Fairchild Semiconductor Corporation
FDMC86320 Rev.C2
2
Typical Characteristics
T
J
= 25 °C unless otherwise noted
50
5
4
3
2
1
0
V
GS
= 10 V
V
GS
= 6.5 V
V
GS
= 8 V
V
GS
= 5.5 V
V
GS
= 6 V
40
V
GS
= 7 V
V
GS
= 6.5 V
30
PULSE DURATION = 80
μ
s
DUTY CYCLE = 0.5% MAX
V
GS
= 6 V
V
GS
= 7 V
20
V
GS
= 8 V
10
V
GS
= 10 V
PULSE DURATION = 80
μ
s
V
GS
= 5.5 V
DUTY CYCLE = 0.5% MAX
0
0
1
2
3
4
5
0
10
20
30
40
50
I
D
,
DRAIN CURRENT (A)
V
DS
,
DRAIN TO SOURCE VOLTAGE (V)
Figure 1.
On Region Characteristics
Figur
e
2
. N
o r m a l i z e d O n – R e s i s ta n c e
vs. Drain Current and Gate Voltage
1.8
40
PULSE DURATION = 80
μ
s
DUTY CYCLE = 0.5% MAX
I
D
= 10.7 A
V
GS
= 10 V
1.6
1.4
1.2
1.0
0.8
0.6
30
20
10
0
I
D
= 10.7 A
T
J
= 125
o
C
T
J
= 25
o
C
-75 -50 -25
0
25 50 75
100 125 150
5
6
7
8
9
10
T
J
,
JUNCTION TEMPERATURE
(
o
C
)
V
GS
,
GATE TO SOURCE VOLTAGE (V)
Figur
e
4
. On-Resistance
vs. Gate to
Source Voltage
Figure 3. Normalized On Resistance
vs. Junction Temperature
50
50
PULSE DURATION = 80
μ
s
V
GS
= 0 V
DUTY CYCLE = 0.5% MAX
10
40
30
20
10
0
V
DS
= 5 V
T
J
= 150
o
C
1
0.1
T
J
= 25
o
C
T
J
= 150
o
C
T
J
= 25
o
C
T
J
= -55
o
C
0.01
T
J
= -55
o
C
0.001
2
3
4
5
6
7
8
0.0
0.2
0.4
0.6
0.8
1.0
1.2
V
GS
, GATE TO SOURCE VOLTAGE (V)
V
SD
, BODY DIODE FORWARD VOLTAGE (V)
Figure 5.
Transfer Characteristics
Figur
e
6
. Source
to Drain Diode
Forward Voltage vs. Source Current
©2011 Fairchild Semiconductor Corporation
FDMC86320 Rev.C2
3
Typical Characteristics
T
J
= 25 °C unless otherwise noted
3000
1000
10
I
D
= 10.7 A
V
DD
= 40 V
C
iss
8
6
4
2
0
V
DD
= 50 V
V
DD
= 30 V
C
oss
100
C
rss
f = 1 MHz
V
GS
= 0 V
10
5
0
5
10
15
20
25
30
0.1
1
10
100
V
DS
, DRAIN TO SOURCE VOLTAGE (V)
Q
g
, GATE CHARGE (nC)
Figure 7.
Gate Charge Characteristics
Figur
e
8
. C
a p a c i t a n c e v s . D r a i n
to Source Voltage
50
40
30
20
10
0
30
V
GS
= 10 V
10
T
J
= 25
o
C
V
GS
= 8 V
T
J
= 100
o
C
Limited by Package
R
θ
JC
= 3.1
o
C/W
T
J
= 125
o
C
1
0.01
25
50
75
100
125
150
0.1
1
10
50
T
C
, C
ASE TEMPERATURE
(
o
C
)
t
AV
, TIME IN AVALANCHE (ms)
Figur
e
9
. U
n c l a m p e d I n d u c t i v e
Switching Capability
Figur
e
1
0. Maximum Continuous Drain
Current vs.
Case Temperature
100
10
2000
V
GS
= 10 V
1000
100
10
100
μ
s
1 ms
1
THIS AREA IS
LIMITED BY r
DS(on)
10 ms
100 ms
1 s
SINGLE PULSE
SINGLE PULSE
R
θ
JA
= 125
o
C/W
T
A
= 25
o
C
0.1
T
J
= MAX RATED
θ
JA
= 125
o
C/W
A
= 25
o
C
R
10 s
DC
1
T
0.01
0.5
10
-4
10
-3
10
-2
t, PULSE WIDTH (sec)
10
-1
1
10
100 1000
0.01
0.1
1
10
100 400
V
DS
, DRAIN to SOURCE VOLTAGE (V)
Figure 11.
Forward Bias Safe
Operating Area
Figur
e
1
2. Single Pulse
Maximum
Power Dissipation
©2011 Fairchild Semiconductor Corporation
FDMC86320 Rev.C2
4
Typical Characteristics
T
J
= 25 °C unless otherwise noted
2
DUTY CYCLE-DESCENDING ORDER
1
D = 0.5
0.2
0.1
0.1
P
DM
0.05
0.02
0.01
t
1
0.01
t
2
SINGLE PULSE
NOTES:
DUTY FACTOR: D = t
/t
θ
JA
= 125
o
C/W
1
2
R
PEAK T
= P
J
x Z
x R
+ T
DM
θ
JA
θ
JA
A
0.001
0.0005
10
-4
10
-3
10
-2
10
-1
t, RECTANGULAR PULSE DURATION (sec)
1
10
100
1000
Figure 13.
Junction-to-Ambient Transient Thermal Response Curve
©2011 Fairchild Semiconductor Corporation
FDMC86320 Rev.C2
5
Dimensional Outline and Pad Layout
Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner
without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or
obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions, spe-
cifically the warranty therein, which covers Fairchild products.
Always visit Fairchild Semiconductor’s online packaging area for the most recent package drawings:
©2011 Fairchild Semiconductor Corporation
FDMC86320 Rev.C2
6
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intended to be an exhaustive list of all such trademarks.
AccuPower™
AX-CAP *
BitSiC™
Build it Now™
CorePLUS™
CorePOWER™
CROSSVOLT
™
CTL™
F-PFS™
FRFET
®*
®
®
®
tm
®
Global Power Resource
SM
GreenBridge™
Green FPS™
PowerTrench
PowerXS™
Programmable Active Droop™
QFET
QS™
Quiet Series™
RapidConfigure™
™
®
TinyBoost
TinyBuck
®
TinyCalc™
®
Green FPS™ e-Series™
G
max
™
GTO™
®
TinyLogic
TINYOPTO™
TinyPower™
TinyPWM™
TinyWire™
Current Transfer Logic™
IntelliMAX™
®
DEUXPEED
ISOPLANAR™
Marking Small Speakers Sound Louder
and Better™
MegaBuck™
MICROCOUPLER™
MicroFET™
MicroPak™
MicroPak2™
MillerDrive™
MotionMax™
Dual Cool™
TranSiC™
®
EcoSPARK
Saving our world, 1mW/W/kW at a time™
SignalWise™
SmartMax™
TriFault Detect™
TRUECURRENT *
EfficentMax™
ESBC™
®
μ
SerDes™
SMART START™
®
Solutions for Your Success™
®
®
SPM
Fairchild
®
®
STEALTH™
SuperFET
SuperSOT™-3
SuperSOT™-6
SuperSOT™-8
SupreMOS
SyncFET™
Sync-Lock™
UHC
Fairchild Semiconductor
FACT Quiet Series™
®
Ultra FRFET™
UniFET™
VCX™
VisualMax™
VoltagePlus™
XS™
®
®
mWSaver
OptoHiT™
OPTOLOGIC
OPTOPLANAR
FACT
FAST
®
®
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仙童
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PRODUCT STATUS DEFINITIONS
Definition of Terms
Datasheet Identification
Product Status
Definition
Datasheet contains the design specifications for product development. Specifications
may change in any manner without notice.
Advance Information
Formative / In Design
Datasheet contains preliminary data; supplementary data will be published at a later
date. Fairchild Semiconductor reserves the right to make changes at any time without
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Datasheet contains final specifications. Fairchild Semiconductor reserves the right to
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Full Production
Datasheet contains specifications on a product that is discontinued by Fairchild
Semiconductor. The datasheet is for reference information only.
Not In Production
Rev. I68
©2011 Fairchild Semiconductor Corporation
FDMC86320 Rev.C2
7
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