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May 2016
FDMD8680
Dual N-Channel PowerTrench
®
MOSFET
80 V, 66 A, 4.7 m
Ω
Features
General Description
Common Source Configuration to Eliminate PCB Routing
This package integrates two N-Channel devices connected
internally in common-source configuration. This enables very
low package parasitics and optimized thermal path to the
common source pad on the bottom. Provides a very small
footprint (5 x 6 mm) for higher power density.
Large Source Pad on Bottom of Package for Enhanced
Thermals
Max r
DS(on)
= 4.7 m
Ω
at V
GS
= 10
V
,
I
D
= 16 A
Max r
DS(on)
= 6.4 m
Ω
at V
GS
= 8 V, I
D
= 14 A
Applications
Ideal for Flexible Layout in Secondary Side Synchronous
Rectification
Isolated DC-DC Synchronous Rectifiers
Common Ground Load Switches
100% UIL
T
e
sted
T
e
rmination is Lead-free and RoHS Compliant
Top
Bottom
Pin 1
G1
D1
Pin 1
D2
D2
D2
G2
1
2
3
4
G1
D1
D1
D1
8
7
6
5
D1
D1
S1 / S2
D2
D2
D2
S1,S2 to backside
G2
Power 5 x 6
MOSFET Maximum Ratings
T
A
= 25 °C unless otherwise noted.
Symbol
V
DS
V
GS
Parameter
Ratings
80
Units
Drain to Source Voltage
Gate to Source Voltage
Drain Current
-Continuous
-Continuous
V
V
±20
T
C
= 25 °C
C
= 100 °C
(Note 5)
(Note 5)
66
42
T
I
D
A
-Continuous
T
A
= 25 °C
(Note 1a)
(Note 4)
(Note 3)
16
-Pulsed
487
E
AS
Single Pulse Avalanche Energy
Power Dissipation
Power Dissipation
337
mJ
W
T
C
= 25 °C
T
A
= 25 °C
39
P
D
(Note 1a)
(Note 1a)
2.3
T
J
, T
STG
Operating and Storage Junction
T
e
mperature Range
-55 to +150
°C
Thermal Characteristics
R
θ
JC
R
θ
JA
Thermal Resistance, Junction to Case
Thermal Resistance, Junction to Ambient
3.2
55
°C/W
Package Marking and Ordering Information
Device Marking
Device
Package
Reel Size
Tape Width
12 mm
Quantity
FDMD8680
FDMD8680
Power 5 x 6
13 ’’
3000 units
1
©2016 Fairchild Semiconductor Corporation
FDMD8680 Rev.1.0
Electrical Characteristics
T
J
= 25 °C unless otherwise noted.
Symbol
Parameter
Test Conditions
Min.
Typ.
Max.
Units
Off Characteristics
BV
DSS
Drain to Source Breakdown Voltage
I
D
= 250
μ
A, V
GS
= 0 V
80
V
Δ
BV
DSS
Δ
T
J
Breakdown Voltage
T
e
mperature
Coefficient
I
D
= 250
μ
A, referenced to 25 °C
50
mV/°C
I
DSS
I
GSS
Zero Gate Voltage Drain Current
Gate to Source Leakage Current
V
DS
= 64 V, V
GS
= 0 V
V
GS
= ±20 V, V
DS
= 0 V
1
μ
A
±100
nA
On Characteristics
V
GS(th)
Gate to Source Threshold Voltage
V
GS
= V
DS
, I
D
= 250
μ
A
2.0
3.0
-10
4.0
V
Δ
V
GS(th)
Δ
T
J
Gate to Source Threshold Voltage
T
e
mperature Coefficient
I
D
= 250
μ
A, referenced to 25 °C
GS
= 10
V
,
I
D
= 16 A
mV/°C
V
3.3
3.9
5.6
49
4.7
6.4
8.0
r
DS(on)
g
FS
Static Drain to Source On Resistance
Forward Transconductance
V
GS
= 8
V
,
I
D
= 14 A
m
Ω
V
GS
= 10
V
,
I
D
= 16 A, T
J
= 125 °C
V
DD
= 10
V
,
I
D
= 16 A
S
Dynamic Characteristics
C
iss
C
oss
C
rss
R
g
Input Capacitance
3805
657
26
5330
920
77
pF
pF
pF
Ω
V
DS
= 40 V, V
GS
= 0 V
f = 1 MHz
Output Capacitance
Reverse Transfer Capacitance
Gate Resistance
0.1
1.7
3.4
Switching Characteristics
t
d(on)
t
r
t
d(off)
t
f
Turn-On Delay Time
Rise Time
20
18
30
10
53
17
10
32
32
48
20
73
ns
ns
V
DD
= 40 V, I
D
= 16 A
V
GS
= 10 V, R
GEN
= 6
Ω
Turn-Off Delay Time
Fall Time
ns
ns
Q
g(TOT)
Q
gs
Q
gd
T
o
tal Gate Charge
Gate to Source Charge
Gate to Drain “Miller” Charge
V
GS
= 0 V to 10 V
nC
nC
nC
V
DD
= 40 V
D
= 16 A
I
Drain-Source Diode Characteristics
V
SD
V
SD
t
rr
Source to Drain Diode Forward Voltage
Source to Drain Diode Forward Voltage
Reverse Recovery Time
V
GS
= 0 V, I
S
= 16 A
V
GS
= 0 V, I
S
= 2 A
(Note 2)
(Note 2)
0.8
0.7
48
1.3
1.2
77
V
V
ns
nC
I
F
= 16 A, di/dt = 100 A/
μ
s
Q
rr
Reverse Recovery Charge
39
62
NOTES:
2
1. R
is determined with the device mounted on a 1 in
pad 2 oz copper pad on a 1.5 x 1.5 in. board of FR-4 material. R
is determined by
the user’s board design.
θ
CA
θ
JA
b.125 °C/W when mounted on
a minimum pad of
2 oz
copper
a. 55 °C/W when mounted on
a 1 in
pa
d
o
f
2
o
z copper
2
2. Pulse Test: Pulse Width < 300
μ
s, Duty cycle < 2.0 %.
o
3. E
of 337 mJ is based on starting T
= 25
C, L = 3 mH, I
= 15 A, V
= 80 V, V
= 10 V. 100% tested at L = 0.1 mH, I
= 49 A.
AS
J
AS
DD
GS
AS
4. Pulsed Id please refer to Fig 11 SOA graph for more details.
5. Computed continuous current limited to Max Junction Temperature only, actual continuous current will be limited by thermal & electro-mechanical application board design.
2
©2016 Fairchild Semiconductor Corporation
FDMD8680 Rev.1.0
Typical Characteristics
T
J
= 25 °C unless otherwise noted.
200
10
8
V
GS
= 5.5 V
V
GS
= 10 V
PULSE DURATION = 80
μ
s
DUTY CYCLE = 0.5% MAX
V
GS
= 8 V
150
V
GS
= 6 V
V
GS
= 7 V
V
GS
= 6 V
6
100
V
GS
= 5.5 V
4
V
GS
= 7 V
50
2
PULSE DURATION = 80
μ
s
DUTY CYCLE = 0.5% MAX
V
GS
= 8 V
V
GS
= 10 V
0
0.0
0
0.5
1.0
1.5
2.0
2.5
3.0
0
50
100
150
200
V
DS
,
DRAIN TO SOURCE VOLTAGE (V)
I
D
,
DRAIN CURRENT (A)
Figure 1.
On-Region Characteristics
Figur
e
2
. N
o r m a l i z e d O n – R e s i s ta n c e
vs. Drain Current and Gate Voltage
2.0
40
PULSE DURATION = 80
μ
s
DUTY CYCLE = 0.5% MAX
I
D
= 16 A
1.8
1.6
1.4
1.2
1.0
0.8
0.6
V
GS
= 10 V
30
20
10
0
I
D
= 16 A
T
J
= 125
o
C
T
J
= 25
o
C
-75 -50 -25
0
25 50 75
100 125 150
4
5
6
7
8
9
10
T
J
,
JUNCTION TEMPERATURE
(
o
C
)
V
GS
,
GATE TO SOURCE VOLTAGE (V)
Figur
e
3
. Normalized On Resistance
vs. Junction Temperature
Figur
e
4
. On Resistance vs.
Gate to
Source Voltage
200
200
100
10
V
GS
= 0 V
PULSE DURATION = 80
μ
s
DUTY CYCLE = 0.5% MAX
150
100
50
V
DS
= 5 V
1
T
J
= 150
o
C
T
J
= 25
o
C
0.1
T
J
= 150
o
C
T
J
= 25
o
C
T
J
= -55
o
C
0.01
0.001
T
J
= -55
o
C
0
2
3
4
5
6
7
8
0.0
0.2
0.4
0.6
0.8
1.0
1.2
V
GS
, GATE TO SOURCE VOLTAGE (V)
V
SD
, BODY DIODE FORWARD VOLTAGE (V)
Figure 5.
Transfer Characteristics
Figur
e
6
. Source
to Drain Diode
Forward Voltage vs. Source Current
3
©2016 Fairchild Semiconductor Corporation
FDMD8680 Rev.1.0
Typical Characteristics
T
J
= 25 °C unless otherwise noted.
10
10000
1000
100
10
I
D
= 16 A
8
C
iss
V
DD
= 40 V
V
DD
= 30 V
6
4
2
0
C
oss
V
DD
= 50 V
C
rss
f = 1 MHz
GS
= 0 V
V
1
0.1
0
10
20
30
40
50
60
1
10
80
V
DS
, DRAIN TO SOURCE VOLTAGE (V)
Q
g
, GATE CHARGE (nC)
Figure 7. Gate Charge Characteristics
Figur
e
8
. Capacitance
vs. Drain
to Source Voltage
80
60
40
20
0
100
10
1
V
GS
= 10 V
T
J
= 100
o
C
T
J
= 25
o
C
T
J
= 125
o
C
V
GS
= 8 V
R
θ
JC
= 3.2
o
C/W
0.001
0.01
0.1
1
10
100 500
25
50
75
100
125
150
T
C
,
CASE TEMPERATURE
(
o
C
)
t
AV
, TIME IN AVALANCHE (ms)
Figure 9.
Unclamped Inductive
Switching Capability
Figure10
.
M a x i m u m C o n t i n u o u s D r a i n
Current vs.
Case Temperature
1000
100
10
20000
10000
1000
100
SINGLE PULSE
R
θ
JC
= 3.2
o
C/W
T
C
= 25
o
C
10
μ
s
THIS AREA IS
LIMITED BY r
DS(on)
100
μ
s
SINGLE PULSE
T
J
= MAX RATED
1
1 ms
R
θ
JC
= 3.2
o
C/W
10 ms
CURVE BENT TO
MEASURED DATA
C
= 25
o
C
100 ms
T
0.1
0.1
10
10
-5
10
-4
10
-3
t, PULSE WIDTH (sec)
10
-2
10
-1
1
1
10
100
300
V
DS
, DRAIN to SOURCE VOLTAGE (V)
Figur
e
1
1. Forward Bias Safe
Operating Area
Figur
e
1
2. Single Pulse
Maximum
Power Dissipation
4
©2016 Fairchild Semiconductor Corporation
FDMD8680 Rev.1.0
Typical Characteristics
T
J
= 25 °C unless otherwise noted.
2
DUTY CYCLE-DESCENDING ORDER
1
D = 0.5
0.2
P
0.1
DM
0.05
0.02
0.01
0.1
t
1
t
2
NOTES:
(t) = r(t) x R
0.01
Z
θ
JC
θ
JC
o
R
= 3.2
C/W
θ
JC
SINGLE PULSE
Peak T
= P
x Z
(t) + T
J
DM
θ
JC C
Duty Cycle, D = t
/ t
1
2
0.001
10
-5
10
-4
10
-3
10
-2
10
-1
1
t, RECTANGULAR PULSE DURATION (sec)
Figure 13.
Junction-to-Case Transient Thermal Response Curve
5
©2016 Fairchild Semiconductor Corporation
FDMD8680 Rev.1.0
KEEP-OUT
AREA
3.81
1.91
7
1.27
0.10 C
5.00±0.10
PKG
A
2X
0.52 (8X)
0.70 (2X)
B
8
6
5
C
L
8
5
0.72 (6X)
1.79
6.22
C
L
PKG
6.00±0.10
2.88
0.30 (2X)
0.60 (2X)
1.72 (2X)
0.10 C
2
1
4
1
3
4
2X
PIN #1
INDICATOR
0.97
1.79
TOP VIEW
3.58
5.00
SEE
DETAIL A
RECOMMENDED LAND
PATTERN
0.10 C
SIDE VIEW
0.80
0.70
0.10
0.05
C A B
C
0.08 C
C
0.39 TYP
1.27
0.05
0.00
0.30
0.20
(0.78)
2X
0.42±.05
(6X)
SEATING
PLANE
1
2
3
4
0.56±.10 (6X)
(1.74)
1.56±.10
2X
(SCALE: 2X)
NOTES:
A) PACKAGE REFERENCE
:
TO JEDEC REGISTRATION, MO-240B,
VARIATION AA.
B) ALL
DIMENSIONS ARE IN MILLIMETERS.
C) DIMENSIONS
DO NOT INCLUDE BURRS OR MOLD
FLASH. MOLD FLASH OR BURRS DOES NOT EXCEED
0.10MM.
D) DIMENSIONING
AND TOLERANCING PER ASME
Y14.5M-2009
E) IT IS RECOMMENDED TO HAVE
NO
TRACES OR VIAS WITHIN THE KEEP-OUT AREA
F) DRAWING FILE NAME: PQFN08OREV1
0.30±.05
4X
3.48±.05
(1.04)
0.70 TYP
0.76
0.30±.05
2X
8
7
6
5
(0.92)
2X
3.42 (2X)
3.48±.05
BOTTOM VIEW
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are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.
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coverage may be accessed at
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. ON Semiconductor reserves the right to make changes without further notice to any products herein.
ON Semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
Buyer is responsible for its products and applications using ON Semiconductor products, including compliance with all laws, regulations and safety requirements or standards,
regardless of any support or applications information provided by ON Semiconductor. “Typical” parameters which may be provided in ON Semiconductor data sheets and/or
specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer
application by customer’s technical experts. ON Semiconductor does not convey any license under its patent rights nor the rights of others. ON Semiconductor products are not
designed, intended, or authorized for use as a critical component in life support systems or any FDA Class 3 medical devices or medical devices with a same or similar classification
in a foreign jurisdiction or any devices intended for implantation in the human body. Should Buyer purchase or use ON Semiconductor products for any such unintended or unauthorized
application, Buyer shall indemnify and hold ON Semiconductor and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and
expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such
claim alleges that ON Semiconductor was negligent regarding the design or manufacture of the part. ON Semiconductor is an Equal Opportunity/Affirmative Action Employer. This
literature is subject to all applicable copyright laws and is not for resale in any manner.
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