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October 2014
FDMS031
2
S
N-Channel PowerTrench
®
SyncFET
TM
ꢀ
30 V, 42 A,
4.
9
m
:
Features
General Description
The FDMS031
2
S has been designed to minimize losses in
power conversion application. Advancements in both silicon and
package technologies have been combined to offer the lowest
r
DS(on)
while maintaining excellent switching performance. This
device has the added benefit of an efficient monolithic Schottky
body diode.
Max r
DS(on)
=
4.
9
m
:
at V
GS
= 10 V, I
D
= 18 A
Max r
DS(on)
=
5.8
m
:
at V
GS
= 4.5 V, I
D
= 14 A
Advanced Package and Silicon combination for low r
DS(on)
and high efficiency
SyncFET Schottky Body Diode
MSL1 robust package design
100% UIL tested
Applications
Synchronous Rectifier for DC/DC Converters
Notebook Vcore/ GPU low side switch
Networking Point of Load low side switch
Desktop
RoHS Compliant
Bottom
Top
Pin 1
D
D
D
G
S
S
S
S
5
6
7
8
4
3
2
1
S
S
G
D
D
D
D
D
Power 56
MOSFET Maximum Ratings
T
A
= 25 °C unless otherwise noted
Symbol
V
DS
V
GS
Parameter
Ratings
Units
Drain to Source Voltage
Gate to Source Voltage
30
V
V
(Note 4)
20
Drain Current
-Continuous (Package limited)
-Continuous (Silicon limited)
-Continuous
T
C
= 25 °C
T
C
= 25 °C
T
A
= 25 °C
42
83
I
D
A
(Note 1a)
(Note 3)
19
-Pulsed
90
E
AS
Single Pulse Avalanche Energy
Power Dissipation
60
46
mJ
W
T
C
= 25 °C
T
A
= 25 °C
P
D
Power Dissipation
(Note 1a)
2.5
T
J
, T
STG
Operating and Storage Junction
T
e
mperature Range
-55 to +150
°
C
Thermal Characteristics
R
T
JC
R
T
JA
Thermal Resistance, Junction to Case
Thermal Resistance, Junction to Ambient
2.7
50
°C/W
(Note 1a)
Package Marking and Ordering Information
Device Marking
Device
Package
Reel Size
3 ’’
Tape Width
1
2 mm
Quantity
FDMS031
2
S
FDMS031
2
S
P
ower 56
3000 units
©20
11
Fairchild Semiconductor Corporation
FDMS031
2
S Rev.
D1
1
Electrical Characteristics
T
J
= 25 °C unless otherwise noted
Symbol
Parameter
Test Conditions
Min
Typ
Max
Units
Off Characteristics
BV
DSS
Drain to Source Breakdown Voltage
I
D
= 1 mA, V
GS
= 0 V
D
= 10 mA, referenced to 25 °C
V
DS
= 24 V, V
GS
= 0 V
30
V
‘
BV
DSS
ꢀꢀꢀ’
T
J
Breakdown Voltage
T
e
mperature
Coefficient
I
18
mV
/°
C
I
DSS
I
GSS
Zero Gate Voltage Drain Current
500
100
P
A
nA
Gate to Source Leakage Current, Forward
V
GS
= 20 V, V
DS
= 0 V
On Characteristics
(Note 2)
V
GS(th)
Gate to Source Threshold Voltage
V
GS
= V
DS
, I
D
= 1 mA
D
= 10 mA, referenced to 25 °C
1.2
1.9
-5
3.0
V
ꢀ’
V
GS(th)
ꢀꢀꢀ’
T
J
Gate to Source Threshold Voltage
T
e
mperature Coefficient
I
mV/°C
V
GS
= 10 V, I
D
= 18 A
3.6
4.7
5
4.
9
5.8
6.2
r
DS(on)
Static Drain to Source On Resistance
Forward Transconductance
V
GS
= 4.5
V
,
I
D
= 14 A
m
:
V
GS
= 10 V, I
D
= 18 A, T
J
= 125 °C
V
DS
= 5 V, I
D
= 18 A
g
FS
97
S
Dynamic Characteristics
C
iss
C
oss
C
rss
R
g
Input Capacitance
2120
735
90
2820
975
135
2.2
pF
pF
pF
:
V
DS
= 15 V, V
GS
= 0 V,
f = 1 MHz
Output Capacitance
Reverse Transfer Capacitance
Gate Resistance
1.1
Switching Characteristics
t
d(on)
t
r
t
d(off)
t
f
Turn-On Delay Time
Rise Time
12
5
21
10
44
10
46
22
ns
ns
V
DD
= 15
V
,
I
D
= 18 A,
V
GS
= 10 V, R
GEN
= 6
:
Turn-Off Delay Time
Fall Time
28
4
ns
ns
Q
g
T
o
tal Gate Charge
T
o
tal Gate Charge
Gate to Source Gate Charge
Gate to Drain “Miller” Charge
V
GS
= 0 V to 10 V
33
15
6.5
4.0
nC
nC
nC
nC
Q
g
V
GS
= 0 V to 4.5 V
V
DD
= 15 V,
I
D
= 18 A
Q
gs
Q
gd
Drain-Source Diode Characteristics
V
GS
= 0 V, I
S
= 2 A
(Note 2)
(Note 2)
0.48
0.80
26
0.7
1.2
42
V
SD
Source to Drain Diode
Forward Voltage
V
V
GS
= 0 V, I
S
= 18 A
t
rr
Reverse Recovery Time
ns
I
F
= 18 A, di/dt = 300 A/
P
s
Q
rr
Reverse Recovery Charge
26
42
nC
Notes
:
1. R
2
is determined with the device mounted on a 1in
pad 2 oz copper pad on a 1.5 x 1.5 in. board of FR-4 material. R
the user’s board design.
is guaranteed by design while R
is determined by
T
CA
T
JA
T
JC
a. 50 °C/W when mounted
on a
2
b. 125 °C/W when mounted on
a
minimum pad of 2 oz copper.
1 in
pad of
2 oz
copper.
2. Pulse Test: Pulse Width < 30
0
P
s, Duty cycle < 2.0%.
3. E
of 60 mJ is based on starting T
= 25
°
C, L = 1 mH, I
= 11 A, V
= 27 V, V
= 10 V. 100% test at L = 0.3 mH, I
= 16 A.
AS
J
AS
DD
GS
AS
4. As an N-ch device, the negative Vgs rating is for low duty cycle pulse occurrence only. No continuous rating is implied.
2
FDMS031
2
S Rev.D1
Typical Characteristics
T
J
= 25 °C unless otherwise noted
90
12
10
8
V
GS
= 3 V
PULSE DURATION = 80
P
s
DUTY CYCLE = 0.5% MAX
PULSE DURATION = 80
P
s
DUTY CYCLE = 0.5% MAX
V
GS
= 10 V
60
30
0
V
GS
= 4.5 V
V
GS
= 4 V
V
GS
= 3.5 V
V
GS
= 3.5 V
6
V
GS
= 10 V
4
V
GS
= 4.5 V
V
GS
= 4 V
2
V
GS
= 3 V
0
0.0
0.5
1.0
1.5
2.0
0
30
60
90
V
DS
DRAIN TO SOURCE VOLTAGE (V)
,
I
D
,
DRAIN CURRENT (A)
Figure 1.
On-Region Characteristics
Figur
e
2
. N
o r m a l i z e d O n – R e s i s ta n c e
vs Drain Current and Gate Voltage
1.5
12
PULSE DURATION = 80
P
s
DUTY CYCLE = 0.5% MAX
I
D
= 18 A
I
D
= 18 A
1.4
1.3
1.2
1.1
1.0
0.9
0.8
0.7
V
GS
= 10 V
10
8
T
J
= 125
o
C
6
4
T
J
= 25
o
C
2
-75 -50 -25
0
25 50 75
100 125 150
2
4
6
8
10
T
J
,
JUNCTION TEMPERATURE
( )
o
C
V
GS
,
GATE TO SOURCE VOLTAGE (V)
F i gu re 3 .
N orma li zed
On – Res is ta nc e
vs Junction Temperature
Figure 4.
On-Resistance vs Gate to
Source Voltage
90
60
30
0
100
V
GS
= 0 V
PULSE DURATION = 80
P
s
DUTY CYCLE = 0.5% MAX
10
1
V
DS
= 5 V
T
J
= 125
o
C
T
J
= 125
o
C
T
J
= 25
o
C
0.1
T
J
= 25
o
C
T
J
= -55
o
C
0.01
T
J
= -55
o
C
0.001
1
2
3
4
0.0
0.2
0.4
0.6
0.8
1.0
1.2
V
GS
, GATE TO SOURCE VOLTAGE (V)
V
SD
, BODY DIODE FORWARD VOLTAGE (V)
Figure 5.
Transfer Characteristics
Figur
e
6
. Source
to Drain Diode
Forward Voltage vs Source Current
3
FDMS031
2
S Rev.
D1
Typical Characteristics
T
J
= 25 °C unless otherwise noted
10
3000
1000
I
D
= 18 A
C
iss
8
V
DD
= 20 V
V
DD
= 10 V
C
oss
6
4
2
0
V
DD
= 15 V
100
50
C
rss
10
f = 1 MHz
= 0 V
V
GS
0
5
10
15
20
25
30
35
0.1
1
30
V
DS
, DRAIN TO SOURCE VOLTAGE (V)
Q
g
, GATE CHARGE (nC)
Figure 7.
Gate Charge Characteristics
Figur
e
8
. C
a p a c i t a n c e v s D r a i n
to Source Voltage
90
60
30
0
30
10
T
J
= 25
o
C
V
GS
= 10 V
T
J
= 100
o
C
V
GS
= 4.5 V
Limited by Package
R
T
JC
= 2.7
o
C/W
T
J
= 125
o
C
1
0.01
25
50
75
100
125
150
0.1
1
10
100
T
c
,
CASE TEMPERATURE
( )
o
C
t
AV
, TIME IN AVALANCHE (ms)
Figur
e
9
. U
n c l a m p e d I n d u c t i v e
Switching Capability
Figur
e
1
0. Maximum Continuous Drain
Current vs
Case Temperature
300
100
3000
V
GS
= 10 V
1000
100
10
100
P
s
10
1
1 ms
10 ms
THIS AREA IS
100 ms
LIMITED BY r
DS(on)
1 s
SINGLE PULSE
T
J
= MAX RATED
R
T
JA
= 125
o
C/W
SINGLE PULSE
R
T
JA
= 125
o
C/W
T
A
= 25
o
C
0.1
10 s
DC
T
A
= 25
o
C
1
0.01
0.5
10
-4
10
-3
10
-2
t, PULSE WIDTH (sec)
10
-1
1
10
0.01
0.1
1
10
100200
100 1000
V
DS
, DRAIN to SOURCE VOLTAGE (V)
Figure 11.
Forward Bias Safe
Operating Area
Figur
e
1
2. Single Pulse
Maximum
Power Dissipation
4
FDMS031
2
S Rev.D1
Typical Characteristics
T
J
= 25 °C unless otherwise noted
2
1
DUTY CYCLE-DESCENDING ORDER
D = 0.5
0.2
0.1
0.1
0.05
0.02
0.01
P
DM
0.01
t
1
t
0.001
2
NOTES:
DUTY FACTOR: D = t
/t
SINGLE PULSE
R
T
JA
= 125
o
C/W
0.0001
1
2
PEAK T
= P
J
x Z
x R
+ T
DM
T
JA
T
JA
A
10
-4
10
-3
10
-2
10
-1
t, RECTANGULAR PULSE DURATION (sec)
1
10
100
1000
Figure 13.
Junction-to-Ambient Transient Thermal Response Curve
5
FDMS031
2
S Rev.D1
Typical Characteristics
(continued)
SyncFET Schottky body diode
Characteristics
Schottky barrier diodes exhibit significant leakage at high tem-
perature and high reverse voltage. This will increase the power
in the device.
Fairchild’s SyncFET process embeds a Schottky diode in parallel
with PowerTrench MoSFET. This diode exhibits similar
characteristics to a discrete external Schottky diode in parallel
with a MOSFET. Figure 14 shows the reverses recovery
characteristic of the FDMS031
2
S.
10
-2
20
15
T
J
= 125
o
C
C
T
J
= 100
o
10
-3
10
-4
10
-5
10
-6
di/dt = 300 A/
P
s
10
5
T
J
= 25
o
C
0
-5
0
5
10
15
20
25
30
0
30
60
TIME (ns)
90
120
150
V
DS
, REVERSE VOLTAGE (V)
Figure 14. FDMS031
2
S SyncFET body
Figure 15. SyncFET body diode reverses
leakage versus
drain-source voltage
diode reverse recovery characteristic
6
FDMS031
2
S Rev.D1
PQFN8 5X6, 1.27P
CASE 483AE
ISSUE A
5.10
3.91
5.10
PKG
A
SEE
DETAIL B
1.27
6.61
C
L
B
8
7
6
5
8
5
0.77
4.52
3.75
5.85
5.65
C
PKG
6.15
L
KEEP OUT
AREA
1.27
1
4
1
2
3
4
TOP VIEW
0.61
1.27
3.81
LAND PATTERN
RECOMMENDATION
OPTIONAL DRAFT
ANGLE MAY APPEAR
ON FOUR SIDES
SEE
DETAIL C
5.00
4.80
OF THE PACKAGE
0.35
0.15
ꢀꢁꢂꢃ
0.10 C
0.30
0.05
0.05
0.00
SIDE VIEW
ꢀꢁꢂꢃ
8X
0.08 C
C
0.35
0.15
5.20
4.80
1.10
0.90
SEATING
PLANE
DETAIL C
DETAIL B
SCALE: 2:1
3.81
SCALE: 2:1
1.27
0.51
(8X)
0.31
NOTES: UNLESS OTHERWISE SPECIFIED
(0.34)
A. PACKAGE
STANDARD REFERENCE:
JEDEC MO-240,
ISSUE A, VAR. AA,.
0.10
C A B
1
2
3
4
B. DIMENSIONS
DO NOT INCLUDE BURRS OR MOLD FLASH.
MOLD FLASH OR BURRS DOES NOT EXCEED 0.10MM.
C. ALL
DIMENSIONS ARE IN MILLIMETERS.
0.76
0.51
(0.52)
D. DIMENSIONING
AND TOLERANCING PER
ASME Y14.5M-2009.
E. IT
IS RECOMMENDED TO HAVE NO TRACES OR
VIAS WITHIN THE KEEP
OUT AREA.
6.25
5.90
+0.30
3.48
-0.10
(0.50)
(0.30)
(2X)
8
7
6
5
ꢀꢄꢅꢅꢀꢄꢂꢀ
+0.10
-0.15
0.20
(8X)
3.96
3.61
BOTTOM VIEW
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ON Semiconductor owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of ON Semiconductor’s product/patent
coverage may be accessed at
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. ON Semiconductor reserves the right to make changes without further notice to any products herein.
ON Semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
Buyer is responsible for its products and applications using ON Semiconductor products, including compliance with all laws, regulations and safety requirements or standards,
regardless of any support or applications information provided by ON Semiconductor. “Typical” parameters which may be provided in ON Semiconductor data sheets and/or
specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer
application by customer’s technical experts. ON Semiconductor does not convey any license under its patent rights nor the rights of others. ON Semiconductor products are not
designed, intended, or authorized for use as a critical component in life support systems or any FDA Class 3 medical devices or medical devices with a same or similar classification
in a foreign jurisdiction or any devices intended for implantation in the human body. Should Buyer purchase or use ON Semiconductor products for any such unintended or unauthorized
application, Buyer shall indemnify and hold ON Semiconductor and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and
expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such
claim alleges that ON Semiconductor was negligent regarding the design or manufacture of the part. ON Semiconductor is an Equal Opportunity/Affirmative Action Employer. This
literature is subject to all applicable copyright laws and is not for resale in any manner.
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