onsemi-FDMS7606
| Part # | onsemi-FDMS7606 |
Download  | onsemi-FDMS7606 |
May 2014
FDMS7606
Dual N-Channel PowerTrench
®
MOSFET
Q1: 30 V, 12 A, 12.0 m
Ω
Q2: 30 V, 22 A, 11.6 m
Ω
Features
General Description
Q1: N-Channel
This device includes two specialized N-Channel MOSFE
T
s
i
n a
dual MLP package. The switch node has been internally
connected to enable easy placement and routing of synchronous
buck converters. The control MOSFET (Q1) and synchronous
MOSFET (Q2) have been designed to provide optimal power
efficiency.
Max r
DS(on)
= 12.0 m
Ω
at V
GS
= 10 V, I
D
= 11.5 A
Max r
DS(on)
= 16.4 m
Ω
at V
GS
= 4.5 V, I
D
= 10 A
Q2: N-Channel
Max r
DS(on)
= 11.6 m
Ω
at V
GS
= 10
V
,
I
D
= 12 A
Max r
DS(on)
= 17.2 m
Ω
at V
GS
= 4.5 V, I
D
= 9.5 A
Applications
RoHS Compliant
Computing
Communications
General Purpose Point of Load
Notebook Charger
S2
S2
S2
Q2
G2
D1
D1
S2
S2
S2
G2
5
6
7
8
4
3
2
1
S1/D2
D1
G1
D1
D1
D1
G1
D1
Q1
Pin1
Top
Bottom
Power 56
MOSFET Maximum Ratings
T
A
= 25°C unless otherwise noted
Symbol
V
DS
V
GS
Parameter
Q1
Q2
Units
Drain to Source Voltage
Gate to Source Voltage
Drain Current
-Continuous
-Continuous
30
±20
12
30
±20
22
V
V
(Note 3)
T
C
= 25 °C
T
A
= 25 °C
I
D
11.5
1a
12
1b
A
-Pulsed
50
60
E
AS
Single Pulse Avalanche Energy
(Note 4)
T
A
= 25°C
T
A
= 25°C
25
33
mJ
W
Power Dissipation for Single Operation
2.2
1a
1.0
1c
2.5
1b
1.0
1d
P
D
Power Dissipation for Single Operation
T
J
, T
STG
Operating and Storage Junction
T
e
mperature Range
-55 to +150
°C
Thermal Characteristics
R
θ
JA
R
θ
JA
R
θ
JC
Thermal Resistance, Junction to Ambient
57
1a
125
1c
50
1b
120
1d
4.7
Thermal Resistance, Junction to Ambient
Thermal Resistance, Junction to Case
°C/W
4.6
Package Marking and Ordering Information
Device Marking
Device
Package
Reel Size
13 ”
Tape Width
Quantity
FDMS7606
FDMS7606
Power 56
12 mm
3000 units
©2011 Fairchild Semiconductor Corporation
FDMS7606 Rev.C2
1
Electrical Characteristics
T
J
= 25°C unless otherwise noted
Symbol
Parameter
Test Conditions
Type
Min
Typ
Max Units
Off Characteristics
Q1
Q2
30
30
BV
DSS
Drain to Source Breakdown Voltage
I
D
= 250
μ
A, V
GS
= 0 V
V
Δ
BV
DSS
Δ
T
J
Breakdown Voltage
T
e
mperature
Coefficient
Q1
Q2
16
20
I
D
= 250
μ
A, referenced to 25°C
mV/°C
Q1
Q2
1
I
DSS
I
GSS
Zero Gate Voltage Drain Current
Gate t
o
S
ource Leakage Curent
V
DS
= 24 V, V
GS
= 0 V
μ
A
1
V
V
GS
= 20 V, V
DS
= 0 V
GS
= ±20 V, V
DS
= 0 V
Q1
Q2
100
nA
±100
On Characteristics
Q1
Q2
1.0
1.0
2.1
1.9
3.0
V
V
GS(th)
Gate to Source Threshold Voltage
V
GS
= V
DS
, I
D
= 250
μ
A
3.0
Δ
V
GS(th)
Δ
T
J
Gate to Source Threshold Voltage
T
e
mperature Coefficient
Q1
Q2
-6
-5.5
I
D
= 250
μ
A, referenced to 25°C
mV/°C
V
GS
= 10
V
,
I
D
= 11.5 A
9.2
12.6
11.8
12.0
16.4
14.7
V
V
GS
= 4.5
V
,
I
D
= 10 A
GS
= 10 V,
I
D
= 11.5 A, T
J
= 125°C
Q1
Q2
r
DS(on)
Static Drain to Source On Resistance
m
Ω
V
V
V
GS
= 10
V
,
I
D
= 12 A
GS
= 4.5
V
,
I
= 9.5 A
GS
= 10
V
,
I
D
= 12 A, T
J
= 125°C
9.7
12.8
12.3
11.6
17.2
15.4
V
V
DD
= 5
V
,
I
D
= 11.5 A
DD
= 5
V
,
I
D
= 12 A
Q1
Q2
53
47
g
FS
Forward Transconductance
S
Dynamic Characteristics
Q1
Q2
1050 1400
Q1:
C
iss
C
oss
C
rss
R
g
Input Capacitance
pF
pF
pF
Ω
947
1260
V
DS
= 15 V, V
GS
= 0
V
, f = 1
M
HZ
Q1
Q2
295
191
395
255
Output Capacitance
Reverse Transfer Capacitance
Gate Resistance
Q2:
V
DS
= 15 V, V
GS
= 0
V
, f = 1
M
HZ
Q1
Q2
32
50
131
200
Q1
Q2
0 . 2
0.2
1.6
1.0
4 . 0
2.5
Switching Characteristics
Q1
Q2
7
6
14
12
t
d(on)
t
r
t
d(off)
t
f
Turn-On Delay Time
Rise Time
ns
ns
Q1
V
DD
= 15
V
,
I
D
= 11.5 A, R
GEN
= 6
Ω
Q1
Q2
3
3
10
10
Q1
Q2
18
19
33
34
Q2
Turn-Off Delay Time
Fall Time
ns
V
DD
= 15
V
,
I
D
= 12 A, R
GEN
= 6
Ω
Q1
Q2
3
3
10
10
ns
Q1
Q2
16
19
22
27
Q
g(TOT)
Q
g(TOT)
Q
gs
T
o
tal Gate Charge
T
o
tal Gate Charge
Gate to Source Charge
Gate to Drain “Miller” Charge
V
GS
= 0V to 10 V
V
GS
= 0V to 5 V
nC
nC
nC
nC
Q1
DD
= 15 V,
D
= 11.5 A
V
I
Q1
Q2
8
10
11
15
Q1
Q2
3.2
2.6
Q2
V
DD
= 15 V,
Q1
Q2
2.0
4.2
I
D
= 12 A
Q
gd
©2011 Fairchild Semiconductor Corporation
FDMS7606 Rev.C2
2
Electrical Characteristics
T
J
= 25°C unless otherwise noted
Symbol
Parameter
Test Conditions
Type
Min
Typ
Max Units
Drain-Source Diode Characteristics
V
GS
= 0 V, I
S
= 2 A
(Note 2)
Q1
(Note 2)
Q1
(Note 2)
Q2
(Note 2)
Q2
0.76
0.87
0.75
0.85
1.2
1.2
1.2
1.2
V
V
V
GS
= 0 V, I
S
= 11.5 A
GS
= 0 V, I
S
= 2 A
GS
= 0 V, I
S
= 12 A
V
SD
Source-Drain Diode
Forward Voltage
V
Q1
Q2
22
18
35
ns
33
Q1
t
rr
Reverse Recovery Time
I
F
= 11.5 A, di/dt = 100 A/s
Q2
I
F
= 12 A, di/dt = 100 A/s
Q1
Q2
7
6
13
nC
12
Q
rr
Reverse Recovery Charge
Notes:
2
1.R
is determined with the device mounted on a 1 in
pad 2 oz copper pad on a 1.5 x 1.5 in. board of FR-4 material. R
is guaranteed by design while R
is determined by
θ
JA
θ
JC
θ
CA
the user’s board design.
b. 50 °C/W when mounted on
a 1 in
pad of
2 oz
copper
a. 57 °C/W when mounted on
a 1 in
pad of
2 oz
copper
2
2
d. 120 °C/W when mounted on
a
minimum pad of 2 oz copper
c. 125 °C/W when mounted on
a
minimum pad of 2 oz copper
2. Pulse Test: Pulse Width < 300
μ
s, Duty cycle < 2.0%.
3. As an N-ch device, the negative Vgs rating is for low duty cycle pulse occurrence only. No continuous rating is implied
o
4. Q1: E
of 25
mJ is based on starting T
= 25
C, L = 0.3 mH, I
= 13 A, V
= 27 V, V
= 10 V.
AS
J
AS
DD
GS
o
Q2: E
of 33 mJ is based on starting T
= 25
C, L = 0.3 mH, I
= 15 A, V
= 27 V, V
= 10 V.
AS
J
AS
DD
GS
©2011 Fairchild Semiconductor Corporation
FDMS7606 Rev.C2
3
Typical Characteristics (Q1 N-Channel)
T
J
= 25°C unless otherwise noted
50
40
30
20
10
0
5
4
3
2
1
0
V
GS
= 10 V
PULSE DURATION = 80
μ
s
DUTY CYCLE = 0.5% MAX
V
GS
= 3.5 V
V
GS
= 4 V
V
GS
= 4 V
V
GS
= 6 V
V
GS
= 4.5 V
V
GS
= 4.5 V
V
GS
= 3.5 V
PULSE DURATION = 80
μ
s
DUTY CYCLE = 0.5% MAX
V
GS
= 10 V
40
V
GS
= 6 V
0.0
0.5
1.0
1.5
2.0
0
10
20
30
50
I
D
,
DRAIN CURRENT (A)
V
DS
,
DRAIN TO SOURCE VOLTAGE (V)
Figure 1.
On Region Characteristics
Figur
e
2
. N
o r m a l i z e d O n – R e s i s ta n c e
vs Drain Current and Gate Voltage
1.6
1.4
1.2
1.0
0.8
0.6
32
I
D
= 11.5 A
PULSE DURATION = 80
μ
s
DUTY CYCLE = 0.5% MAX
V
GS
= 10 V
I
D
= 11.5 A
24
16
8
T
J
= 125
o
C
T
J
= 25
o
C
2
4
6
8
10
-75 -50 -25
0
25 50 75
100 125 150
T
J
,
JUNCTION TEMPERATURE
(
o
C
)
V
GS
,
GATE TO SOURCE VOLTAGE (V)
Figure 3. Normalized On Resistance
vs Junction Temperature
Figur
e
4
. On-Resistance
vs Gate to
Source Voltage
50
50
V
GS
= 0 V
PULSE DURATION = 80
μ
s
DUTY CYCLE = 0.5% MAX
10
1
40
30
20
10
0
T
J
= 150
o
C
V
DS
= 5 V
T
J
= 150
o
C
T
J
= 25
o
C
0.1
T
J
= 25
o
C
T
J
= -55
o
C
T
J
= -55
o
C
0.01
0.001
1.5
2.0
2.5
3.0
3.5
4.0
4.5
0.0
0.2
0.4
0.6
0.8
1.0
1.2
V
GS
, GATE TO SOURCE VOLTAGE (V)
V
SD
, BODY DIODE FORWARD VOLTAGE (V)
Figure 5.
Transfer Characteristics
Figur
e
6
. Source
to Drain Diode
Forward Voltage vs Source Current
©2011 Fairchild Semiconductor Corporation
FDMS7606 Rev.C2
4
Typical Characteristics (Q1 N-Channel)
T
J
= 25°C unless otherwise noted
10
8
2000
1000
I
D
= 11.5 A
V
DD
= 10 V
C
iss
V
DD
= 15 V
6
C
oss
V
DD
=
20 V
100
4
2
C
rss
f = 1 MHz
GS
= 0 V
V
0
10
0
3
6
9
12
15
18
0.1
1
10
30
V
DS
, DRAIN TO SOURCE VOLTAGE (V)
Q
g
, GATE CHARGE (nC)
Figure 7.
Gate Charge Characteristics
Figur
e
8
. C
a p a c i t a n c e v s D r a i n
to Source Voltage
20
50
40
30
20
10
0
T
J
= 25
o
C
10
V
GS
= 10 V
T
J
= 100
o
C
V
GS
= 4.5 V
T
J
= 125
o
C
Limited by Package
R
θ
JC
= 4.6
o
C/W
1
0.001
0.01
0.1
1
10
40
25
50
75
100
125
150
T
C
,
CASE TEMPERATURE
(
o
C
)
t
AV
, TIME IN AVALANCHE (ms)
Figur
e
9
. U
n c l a m p e d I n d u c t i v e
Switching Capability
Figur
e
1
0. Maximum Continuous Drain
Current vs
Case Temperature
60
10
500
SINGLE PULSE
R
θ
JA
= 125
o
C/W
100
μ
s
100
10
1 ms
1
0.1
10 ms
100 ms
1s
THIS AREA IS
LIMITED BY r
DS
(
on
)
SINGLE PULSE
T
J
= MAX RATED
R
θ
JA
= 125
o
C/W
10s
DC
T
A
= 25
o
C
1
0.01
0.5
10
-4
10
-3
10
-2
t, PULSE WIDTH (sec)
10
-1
1
10
100 1000
0.01
0.1
1
10
100200
V
DS
, DRAIN to SOURCE VOLTAGE (V)
Figure 11.
Forward Bias Safe
Operating Area
Figur
e
1
2. Single Pulse
Maximum
Power Dissipation
©2011 Fairchild Semiconductor Corporation
FDMS7606 Rev.C2
5
Typical Characteristics (Q1 N-Channel)
T
J
= 25°C unless otherwise noted
2
DUTY CYCLE-DESCENDING ORDER
1
D = 0.5
0.2
0.1
0.05
0.02
0.01
P
0.1
0.01
DM
t
1
t
2
SINGLE PULSE
θ
JA
= 125
o
C/W
NOTES:
DUTY FACTOR: D = t /t
R
1
2
PEAK T
= P
J
x Z
x R
+ T
θ
JA
A
(Note 1c)
DM
θ
JA
0.001
10
-4
10
-3
10
-2
10
-1
t, RECTANGULAR PULSE DURATION (sec)
1
10
100
1000
Figure 13.
Junction-to-Ambient Transient Thermal Response Curve
©2011 Fairchild Semiconductor Corporation
FDMS7606 Rev.C2
6
Typical Characteristics (Q2 N-Channel)
T
J
= 25 °C unless otherwise noted
60
50
40
30
20
10
0
5
4
3
2
1
0
V
GS
= 10 V
PULSE DURATION = 80
μ
s
DUTY CYCLE = 0.5% MAX
V
GS
= 6 V
V
GS
= 4.5 V
V
GS
= 4 V
V
GS
= 3.5 V
V
GS
= 3.5 V
V
GS
= 4 V
PULSE DURATION = 80
μ
s
DUTY CYCLE = 0.5% MAX
V
GS
= 10 V
V
GS
= 6 V
40
V
GS
= 4.5 V
0.0
0.5
1.0
1.5
2.0
0
10
20
30
50
60
I
D
,
DRAIN CURRENT (A)
V
DS
,
DRAIN TO SOURCE VOLTAGE (V)
Figure 14.
On-Region Characteristics
Figure 15. Normalized on-Resistance vs Drain
Current and Gate
Voltage
1.6
1.4
1.2
1.0
0.8
0.6
40
I
D
= 12 A
PULSE DURATION = 80
μ
s
DUTY CYCLE = 0.5% MAX
36
V
GS
= 10 V
32
I
D
= 12 A
28
24
20
T
J
= 125
o
C
16
12
8
T
J
= 25
o
C
4
-75 -50 -25
0
25
50
75 100
125 150
2
4
6
8
10
T
J
,
JUNCTION TEMPERATURE
(
o
C
)
V
GS
,
GATE TO SOURCE VOLTAGE (V)
Figure 17. On-Resistance vs Gate to
Source Voltage
Figure 16. Normalized On-Resistance
vs Junction Temperature
100
60
50
40
30
20
10
0
V
GS
= 0 V
PULSE DURATION = 80
μ
s
DUTY CYCLE = 0.5% MAX
V
DS
= 5 V
10
1
T
J
= 150
o
C
T
J
= 25
o
C
T
J
= 150
o
C
T
J
= -55
o
C
T
J
= 25
o
C
0.1
0.01
T
J
= -55
o
C
0.0
0.2
0.4
0.6
0.8
1.0
1.2
1
2
3
4
5
V
SD
, BODY DIODE FORWARD VOLTAGE (V)
V
GS
, GATE TO SOURCE VOLTAGE (V)
Figure 18. Transfer Characteristics
Figure 19. Source to Drain Diode
Forward Voltage vs Source Current
©2011 Fairchild Semiconductor Corporation
FDMS7606 Rev.C2
7
Typical Characteristics (Q2 N-Channel)
T
J
= 25°C unless otherwise noted
2000
10
I
D
= 12 A
C
iss
1000
8
V
DD
= 10 V
6
V
DD
= 15 V
C
oss
4
V
DD
=
20 V
C
rss
100
50
2
0
f = 1 MHz
V
GS
= 0 V
0.1
1
10
30
0
5
10
Q , GATE CHARGE (nC)
15
20
V
DS
, DRAIN TO SOURCE VOLTAGE (V)
g
Figure 21. Capacitance vs Drain
to Source Voltage
Figure 20. Gate Charge Characteristics
30
40
30
20
10
0
V
GS
= 10 V
T
J
= 25
o
C
T
J
= 100
o
C
10
V
GS
= 4.5 V
Limited by Package
R
θ
JC
= 4.7
o
C/W
T
J
= 125
o
C
1
0.001
25
50
75
100
125
150
0.01
0.1
1
10
40
T
C
,
CASE TEMPERATURE
(
o
C
)
t
AV
, TIME IN AVALANCHE (ms)
Figure 22. Unclamped Inductive
Switching Capability
Figur e
23. Maximum Continuous Drain
Current vs
Case Temperature
70
500
SINGLE PULSE
θ
JA
= 120
o
C/W
100
μ
s
10
1
R
100
10
1
m
s
10 ms
THIS AREA IS
LIMITED BY r
DS
(
on
)
100 ms
1s
SINGLE PULSE
T
J
= MAX RATED
0.1
0.01
10s
DC
R
θ
JA
= 120
o
C/W
T
A
= 25
o
C
1
0.01
0.1
1
10
100200
0.5
10
-4
10
-3
10
-2
t, PULSE WIDTH (sec)
10
-1
1
10
100 1000
V
DS
, DRAIN to SOURCE VOLTAGE (V)
Figure 24. Forward Bias Safe
Operating Area
Figure 25. Single Pulse Maximum Power
Dissipation
©2011 Fairchild Semiconductor Corporation
FDMS7606 Rev.C2
8
Typical Characteristics (Q2 N-Channel)
T
J
= 25 °C unless otherwise noted
2
DUTY CYCLE-DESCENDING ORDER
1
D = 0.5
0.2
0.1
0.05
0.1
P
DM
0.02
0.01
t
1
t
2
SINGLE PULSE
0.01
R
θ
JA
= 120
o
C/W
NOTES:
DUTY FACTOR: D = t
/t
1
2
(Note 1d)
PEAK T
= P
J
x Z
x R
+ T
DM
θ
JA
θ
JA
A
0.001
10
-4
10
-3
10
-2
10
-1
t, RECTANGULAR PULSE DURATION (sec)
1
10
100
1000
Figure 26. Junction-to-Ambient Transient Thermal Response Curve
©2011 Fairchild Semiconductor Corporation
FDMS7606 Rev.C2
9
TRADEMARKS
The following includes registered and unregistered trademarks and service marks, owned by Fairchild Semiconductor and/or its global subsidiaries, and is not
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μ
SerDes
Saving our world, 1mW/W/kW at a time™
SignalWise
SmartMax
SMART START
Solutions for Your Success
SPM
®
ESBC
MicroPak
®
UHC
®
MicroPak2
MillerDrive
MotionMax
MotionGrid
®
Ultra FRFET
UniFET
VCX
VisualMax
VoltagePlus
XS™
Fairchild
®
STEALTH
Fairchild Semiconductor
®
FACT Quiet Series
FACT
®
SuperFET
®
SuperSOT
-3
MTi
®
SuperSOT
-6
SuperSOT
-8
SupreMOS
®
SyncFET
Sync-Lock™
MTx
®
FAST
®
MVN
®
FastvCore
FETBench
FPS
mWSaver
®
Xsens™
OptoHiT
仙童
™
OPTOLOGIC
®
* Trademarks of System General Corporation, used under license by Fairchild Semiconductor.
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FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE
RELIABILITY, FUNCTION, OR DESIGN. T
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AT
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THESE SPECIFICATIONS DO NOT EXPAND THE TERMS OF FAIRCHILD’S WORLDWIDE TERMS AND CONDITIONS, SPECIFICALLY THE WARRANTY
THEREIN, WHICH COVERS THESE PRODUCTS.
LIFE SUPPORT POLICY
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE
EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION.
As used herein:
1. Life
support devices or systems are devices or systems which, (a) are
intended for surgical implant into the body or (b) support or sustain
life, and (c) whose failure to perform when properly used in
accordance with instructions for use provided in the labeling, can be
reasonably expected to result in a significant injury of the user.
2. A
critical component in any component of a life support, device, or
system whose failure to perform can be reasonably expected to
cause the failure of the life support device or system, or to affect its
safety or effectiveness.
ANTI-COUNTERFEITING POLICY
under Sales Support.
Counterfeiting of semiconductor parts is a growing problem in the industry. All manufacturers of semiconductor products are experiencing counterfeiting of their
parts. Customers who inadvertently purchase counterfeit parts experience many problems such as loss of brand reputation, substandard performance, failed
applications, and increased cost of production and manufacturing delays. Fairchild is taking strong measures to protect ourselves and our customers from the
proliferation of counterfeit parts. Fairchild strongly encourages customers to purchase Fairchild parts either directly from Fairchild or from Authorized Fairchild
Distributors who are listed by country on our web page cited above. Products customers buy either from Fairchild directly or from Authorized Fairchild Distributors
are genuine parts, have full traceability, meet Fairchild’s quality standards for handling and storage and provide access to Fairchild’s full range of up-to-date technical
and product information. Fairchild and our Authorized Distributors will stand behind all warranties and will appropriately address any warranty issues that may arise.
Fairchild will not provide any warranty coverage or other assistance for parts bought from Unauthorized Sources. Fairchild is committed to combat this global
problem and encourage our customers to do their part in stopping this practice by buying direct or from authorized distributors.
PRODUCT STATUS DEFINITIONS
Definition of Terms
Datasheet Identification
Product Status
Definition
Datasheet contains the design specifications for product development. Specifications may change
in any manner without notice.
Advance Information
Formative / In Design
Datasheet contains preliminary data; supplementary data will be published at a later date. Fairchild
Semiconductor reserves the right to make changes at any time without notice to improve design.
Preliminary
No Identification Needed
Obsolete
First Production
Full Production
Not In Production
Datasheet contains final specifications. Fairchild Semiconductor reserves the right to make
changes at any time without notice to improve the design.
Datasheet contains specifications on a product that is discontinued by Fairchild Semiconductor.
The datasheet is for reference information only.
Rev. I73
© Fairchild Semiconductor Corporation
