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May 2014
FDMS7608S
Dual N-Channel PowerTrench
®
MOSFET
Q1: 30 V, 22 A, 10.0 m
Ω
Q2: 30 V, 30 A, 6.3 m
Ω
Features
General Description
Q1: N-Channel
This device includes two specialized N-Channel MOSFE
T
s
i
n a
dual MLP package. The switch node has been internally
connected to enable easy placement and routing of synchronous
buck converters. The control MOSFET (Q1) and synchronous
SyncFET
TM
(Q2) have been designed to provide optimal power
efficiency.
Max r
DS(on)
= 10.0 m
Ω
at V
GS
= 10 V, I
D
= 12 A
Max r
DS(on)
= 13.6 m
Ω
at V
GS
= 4.5 V, I
D
= 10 A
Q2: N-Channel
Max r
DS(on)
= 6.3 m
Ω
at V
GS
= 10 V, I
D
= 15 A
Max r
DS(on)
= 7.2 m
Ω
at V
GS
= 4.5 V, I
D
= 13 A
Applications
RoHS Compliant
Computing
Communications
General Purpose Point of Load
Notebook VCORE
S2
Q2
S2
D1
D1
S2
S2
S2
G2
S1/D2
D1
G1
D1
D1
D1
D1
G1
S2
G2
Q1
Pin1
Top
Bottom
Power 56
MOSFET Maximum Ratings
T
A
= 25°C unless otherwise noted
Symbol
V
DS
V
GS
Parameter
Q1
30
Q2
30
Units
Drain to Source Voltage
Gate to Source Voltage
V
V
(Note 3)
±20
±20
Drain Current
-Continuous (Package
limited)
-Continuous
T
C
= 25 °C
T
A
= 25 °C
22
30
I
D
12
1a
50
15
1b
60
A
-Pulsed
E
AS
Single Pulse Avalanche Energy
Power Dissipation for Single Operation
Power Dissipation for Single Operation
Operating and Storage Junction
T
e
mperature Range
(Note 4)
T
A
= 25°C
T
A
= 25°C
29
33
mJ
W
2.2
1a
1.0
1c
2.5
1b
1.0
1d
P
D
T
J
, T
STG
-55 to +150
°C
Thermal Characteristics
R
θ
JA
R
θ
JA
R
θ
JC
Thermal Resistance, Junction to Ambient
57
1a
125
1c
50
1b
120
1d
3.2
Thermal Resistance, Junction to Ambient
Thermal Resistance, Junction to Case
°C/W
4.0
Package Marking and Ordering Information
Device Marking
Device
Package
Reel Size
13 ”
Tape Width
Quantity
FDMS7608S
FDMS7608S
Power 56
12 mm
3000 units
©2011 Fairchild Semiconductor Corporation
FDMS7608S Rev.C1
1
Electrical Characteristics
T
J
= 25°C unless otherwise noted
Symbol
Parameter
Test Conditions
Type
Min
Typ
Max Units
Off Characteristics
I
D
= 250
μ
A, V
GS
= 0 V
I
D
= 1 mA, V
GS
= 0 V
Q1
Q2
30
30
BV
DSS
Drain to Source Breakdown Voltage
V
Δ
BV
DSS
Δ
T
J
Breakdown Voltage
T
e
mperature
Coefficient
I
D
= 250
μ
A, referenced to 25°C
Q1
Q2
13
19
mV/°C
I
D
= 10 mA, referenced to 25°C
Q1
Q2
1
I
DSS
I
GSS
Zero Gate Voltage Drain Current
Gate to Source Leakage Current
V
DS
= 24 V, V
GS
= 0 V
V
GS
= 20 V, V
DS
= 0 V
μ
A
500
Q1
Q2
100
100
nA
nA
On Characteristics
V
GS
= V
DS
, I
D
= 250
μ
A
Q1
Q2
1.2
1.2
1.9
1.7
3.0
3.0
V
GS(th)
Gate to Source Threshold Voltage
V
V
GS
= V
DS
, I
D
= 1 mA
Δ
V
GS(th)
Δ
T
J
Gate to Source Threshold Voltage
T
e
mperature Coefficient
I
D
= 250
μ
A, referenced to 25°C
I
D
= 10 mA, referenced to 25°C
Q1
Q2
-6
-4
mV/°C
V
V
GS
= 10
V
,
I
D
= 12 A
GS
= 4.5
V
,
I
D
= 10 A
7.4
10.0
10.3
10.0
13.6
13.9
Q1
Q2
V
GS
= 10
V
,
I
D
= 12 A, T
J
= 125°C
r
DS(on)
Static Drain to Source On Resistance
m
Ω
V
GS
= 10
V
,
I
D
= 15 A
V
GS
= 4.5
V
,
I
D
= 13 A
V
GS
= 10
V
,
I
D
= 15 A, T
J
= 125°C
4.8
6.0
6.6
6.3
7.2
8.6
V
DD
= 5
V
,
I
D
= 12 A
Q1
Q2
54
76
g
FS
Forward Transconductance
S
V
DD
= 5
V
,
I
D
= 15 A
Dynamic Characteristics
Q1
Q2
1135 1510
1380 1835
Q1:
C
iss
C
oss
C
rss
R
g
Input Capacitance
pF
pF
pF
Ω
V
DS
= 15 V, V
GS
= 0
V
, f = 1
M
HZ
Q1
Q2
390
478
520
635
Output Capacitance
Reverse Transfer Capacitance
Gate Resistance
Q2:
V
DS
= 15 V, V
GS
= 0
V
, f = 1
M
HZ
Q1
Q2
42
60
65
90
Q1
Q2
0.2
0.2
1.6
0.5
3.2
2.0
Switching Characteristics
Q1
Q2
7
7
14
14
t
d(on)
t
r
t
d(off)
t
f
Turn-On Delay Time
Rise Time
ns
ns
Q1
V
DD
= 15
V
,
I
D
= 12 A, R
GEN
= 6
Ω
Q1
Q2
3
3
10
10
Q1
Q2
19
20
35
36
Q2
Turn-Off Delay Time
Fall Time
ns
V
DD
= 15
V
,
I
D
= 15 A, R
GEN
= 6
Ω
Q1
Q2
3
2
10
10
ns
Q1
Q2
18
21
24
30
Q
g(TOT)
Q
g(TOT)
Q
gs
T
o
tal Gate Charge
T
o
tal Gate Charge
Gate to Source Charge
Gate to Drain “Miller” Charge
V
GS
= 0V to 10 V
V
GS
= 0V to 5 V
nC
nC
nC
nC
Q1
V
DD
= 15 V,
Q1
Q2
9
12
14
16
I
D
= 12 A
Q1
Q2
3.6
3.5
Q2
V
DD
= 15 V,
I
D
= 15 A
Q1
Q2
2.5
3.0
Q
gd
©2011 Fairchild Semiconductor Corporation
FDMS7608S Rev.C1
2
Electrical Characteristics
T
J
= 25°C unless otherwise noted
Symbol
Parameter
Test Conditions
Type
Min
Typ
Max Units
Drain-Source Diode Characteristics
V
GS
= 0 V, I
S
= 2 A
(Note 2)
Q1
(Note 2)
Q1
(Note 2)
Q2
(Note 2)
Q2
0.75
0.84
0.63
0.80
1.1
1.2
0.8
1.2
V
V
V
GS
= 0 V, I
S
= 12 A
GS
= 0 V, I
S
= 2 A
GS
= 0 V, I
S
= 15 A
V
SD
Source-Drain Diode Forward Voltage
V
Q1
Q2
25
21
40
ns
34
Q1
t
rr
Reverse Recovery Time
I
F
= 12 A, di/dt = 100 A/
μ
s
Q2
I
F
= 15 A, di/dt = 300 A/
μ
s
Q1
Q2
9
19
18
nC
33
Q
rr
Reverse Recovery Charge
Notes:
2
1.R
is determined with the device mounted on a 1 in
pad 2 oz copper pad on a 1.5 x 1.5 in. board of FR-4 material. R
is guaranteed by design while R
is determined by
θ
CA
θ
JA
θ
JC
the user’s board design.
b. 50 °C/W when mounted on
a 1 in
pad of
2 oz
copper
a. 57 °C/W when mounted on
a 1 in
pad of
2 oz
copper
2
2
d. 120 °C/W when mounted on
a
minimum pad of 2 oz copper
c. 125 °C/W when mounted on
a
minimum pad of 2 oz copper
2. Pulse Test: Pulse Width < 300
μ
s, Duty cycle < 2.0%.
3. As an N-ch device, the negative Vgs rating is for low duty cycle pulse occurrence only. No continuous rating is implied.
o
4. Q1: E
of 29 mJ is based on starting T
= 25
C; N-ch: L = 0.3 mH, I
= 14 A, V
= 27 V, V
= 10 V. 100% tested at L = 3 mH, I
= 3.75 A.
AS
J
AS
DD
GS
AS
o
Q2: E
of 33 mJ is based on starting T
= 25
C; N-ch: L = 0.3 mH, I
= 15 A, V
= 27 V, V
= 10 V. 100% tested at L = 3 mH, I
= 3.9 A.
AS
J
AS
DD
GS
AS
©2011 Fairchild Semiconductor Corporation
FDMS7608S Rev.C1
3
Typical Characteristics (Q1 N-Channel)
T
J
= 25°C unless otherwise noted
50
40
30
20
10
0
6
5
4
3
2
1
0
V
GS
= 10 V
V
GS
= 6 V
PULSE DURATION = 80
μ
s
DUTY CYCLE = 0.5% MAX
V
GS
= 4.5 V
V
GS
= 3 V
V
GS
= 3.5 V
V
GS
= 3.5 V
V
GS
= 4 V
V
GS
= 4 V
V
GS
= 3 V
PULSE DURATION = 80
μ
s
DUTY CYCLE = 0.5% MAX
V
GS
= 10 V
40
V
GS
= 4.5 V
V
GS
= 6 V
0.0
0.5
1.0
1.5
2.0
0
10
20
30
50
I
D
,
DRAIN CURRENT (A)
V
DS
,
DRAIN TO SOURCE VOLTAGE (V)
Figure 1.
On Region Characteristics
Figur
e
2
. N
o r m a l i z e d O n – R e s i s ta n c e
vs Drain Current and Gate Voltage
1.6
40
I
D
= 12 A
GS
= 10 V
PULSE DURATION = 80
μ
s
DUTY CYCLE = 0.5% MAX
V
1.4
1.2
1.0
0.8
0.6
30
20
10
0
I
D
= 12 A
T
J
= 125
o
C
T
J
= 25
o
C
-75 -50 -25
0
25 50 75
100 125 150
2
3
4
5
6
7
8
9
10
T
J
,
JUNCTION TEMPERATURE
(
o
C
)
V
GS
,
GATE TO SOURCE VOLTAGE (V)
Figure 3. Normalized On Resistance
vs Junction Temperature
Figur
e
4
. On-Resistance
vs Gate to
Source Voltage
50
50
PULSE DURATION = 80
μ
s
V
GS
= 0 V
DUTY CYCLE = 0.5% MAX
10
1
40
30
20
10
0
T
J
= 150
o
C
V
DS
= 5 V
T
J
= 150
o
C
T
J
= 25
o
C
T
J
= 25
o
C
0.1
T
J
= -55
o
C
T
J
= -55
o
C
0.01
0.001
1.5
2.0
2.5
3.0
3.5
4.0
4.5
0.0
0.2
0.4
0.6
0.8
1.0
1.2
V
GS
, GATE TO SOURCE VOLTAGE (V)
V
SD
, BODY DIODE FORWARD VOLTAGE (V)
Figure 5.
Transfer Characteristics
Figur
e
6
. Source
to Drain Diode
Forward Voltage vs Source Current
©2011 Fairchild Semiconductor Corporation
FDMS7608S Rev.C1
4
Typical Characteristics (Q1 N-Channel)
T
J
= 25°C unless otherwise noted
10
8
2000
1000
I
D
= 12 A
C
iss
V
DD
= 10 V
V
DD
= 15 V
V
DD
=
20 V
C
oss
6
100
4
C
rss
2
f = 1 MHz
GS
= 0 V
V
0
10
0.1
1
10
30
0
3
6
9
12
15
18
V
DS
, DRAIN TO SOURCE VOLTAGE (V)
Q ,
GATE CHARGE (nC)
g
Figure 7.
Gate Charge Characteristics
Figur
e
8
. C
a p a c i t a n c e v s D r a i n
to Source Voltage
30
50
40
30
20
10
0
10
T
J
= 25
o
C
T
J
= 100
o
C
V
GS
= 10 V
T
J
= 125
o
C
V
GS
= 4.5 V
Limited by Package
θ
JC
= 4.0
o
C/W
R
1
0.001
0.01
0.1
1
10
50
25
50
75
100
125
150
T
C
,
CASE TEMPERATURE
(
o
C
)
t
AV
, TIME IN AVALANCHE (ms)
Figur
e
9
. U
n c l a m p e d I n d u c t i v e
Switching Capability
Figur
e
1
0. Maximum Continuous Drain
Current vs
Case Temperature
100
10
1000
SINGLE PULSE
θ
JA
= 125
o
C/W
R
100
μ
s
100
10
1 ms
1
10 ms
THIS AREA IS
LIMITED BY r
DS
(
on
)
100 ms
SINGLE PULSE
T
J
= MAX RATED
θ
JA
= 125
o
C/W
T
A
= 25
o
C
1s
0.1
10s
R
DC
1
0.01
0.5
0.01
0.1
1
10
100200
10
-4
10
-3
10
-2
t, PULSE WIDTH (sec)
10
-1
1
10
100 1000
V
DS
, DRAIN to SOURCE VOLTAGE (V)
Figure 11.
Forward Bias Safe
Operating Area
Figur
e
1
2. Single Pulse
Maximum
Power Dissipation
©2011 Fairchild Semiconductor Corporation
FDMS7608S Rev.C1
5
Typical Characteristics (Q1 N-Channel)
T
J
= 25°C unless otherwise noted
2
DUTY CYCLE-DESCENDING ORDER
1
D = 0.5
0.2
0.1
0.05
0.1
0.01
0.02
0.01
P
DM
t
1
SINGLE PULSE
θ
JA
= 125
o
C/W
t
2
R
NOTES:
DUTY FACTOR: D = t /t
1
2
(Note 1b)
PEAK T
= P
J
x Z
x R
+ T
θ
JA
A
DM
θ
JA
0.001
10
-4
10
-3
10
-2
10
-1
t, RECTANGULAR PULSE DURATION (sec)
1
10
100
1000
Figure 13.
Junction-to-Ambient Transient Thermal Response Curve
©2011 Fairchild Semiconductor Corporation
FDMS7608S Rev.C1
6
Typical Characteristics (Q2 N-Channel)
T
J
= 25 °C unless otherwise noted
60
50
40
30
20
10
0
4
3
2
1
0
V
GS
= 10 V
V
GS
= 6 V
V
GS
= 4.5 V
V
GS
= 4 V
PULSE DURATION = 80
μ
s
DUTY CYCLE = 0.5% MAX
V
GS
= 3 V
V
GS
= 3.5 V
V
GS
= 3.5 V
V
GS
= 4 V
V
GS
= 3 V
V
GS
= 10 V
V
GS
= 6 V
V
GS
= 4.5 V
20
PULSE DURATION = 80
μ
s
DUTY CYCLE = 0.5% MAX
0.0
0.5
1.0
1.5
2.0
0
10
30
40
50
60
I
D
,
DRAIN CURRENT (A)
V
DS
,
DRAIN TO SOURCE VOLTAGE (V)
Figure 14.
On-Region Characteristics
Figure 15. Normalized on-Resistance vs Drain
Current and Gate
Voltage
1.6
28
I
D
= 15 A
GS
= 10 V
PULSE DURATION = 80
μ
s
DUTY CYCLE = 0.5% MAX
V
24
1.4
1.2
1.0
0.8
0.6
I
D
= 15 A
20
16
12
T
J
= 125
o
C
8
4
T
J
= 25
o
C
0
2
4
6
8
10
-75 -50 -25
0
25 50 75
100 125 150
T
J
,
JUNCTION TEMPERATURE
(
o
C
)
V
GS
,
GATE TO SOURCE VOLTAGE (V)
Figure 17. On-Resistance vs Gate to
Source Voltage
Figure 16. Normalized On-Resistance
vs Junction Temperature
60
60
PULSE DURATION = 80
μ
s
V
GS
= 0 V
DUTY CYCLE = 0.5% MAX
10
1
50
40
30
20
10
0
V
DS
= 5 V
T
J
= 125
o
C
T
J
= 125
o
C
T
J
= 25
o
C
T
J
= 25
o
C
0.1
T
J
= -55
o
C
T
J
= -55
o
C
0.01
0.001
1.5
2.0
2.5
3.0
3.5
4.0
0.0
0.2
0.4
0.6
0.8
1.0
1.2
V
GS
, GATE TO SOURCE VOLTAGE (V)
V
SD
, BODY DIODE FORWARD VOLTAGE (V)
Figure 18. Transfer Characteristics
Figure 19. Source to Drain Diode
Forward Voltage vs Source Current
©2011 Fairchild Semiconductor Corporation
FDMS7608S Rev.C1
7
Typical Characteristics (Q2 N-Channel)
T
J
= 25°C unless otherwise noted
10
8
3000
1000
I
D
= 15 A
C
iss
V
DD
= 10 V
6
C
oss
V
DD
= 15 V
100
10
4
V
DD
=
20 V
C
rss
2
f = 1 MHz
V
GS
= 0 V
0
0.1
1
10
30
0
5
10
15
20
V
DS
, DRAIN TO SOURCE VOLTAGE (V)
Q
g
, GATE CHARGE (nC)
Figure 21. Capacitance vs Drain
to Source Voltage
Figure 20. Gate Charge Characteristics
30
70
56
42
28
14
0
10
T
J
= 25
o
C
T
J
= 100
o
C
V
GS
= 10 V
V
GS
= 4.5 V
T
J
= 125
o
C
Limited by Package
R
θ
JC
= 3.2
o
C/W
1
0.001
0.01
0.1
1
10
100
25
50
75
100
125
150
T
C
,
CASE TEMPERATURE
(
o
C
)
t
AV
, TIME IN AVALANCHE (ms)
Figure 22. Unclamped Inductive
Switching Capability
Figure 23. Maximum Continuous Drain
Current vs
Case Temperature
1000
100
10
SINGLE PULSE
100
μ
s
R
θ
JA
= 120
o
C/W
100
10
1 ms
10 ms
THIS AREA IS
LIMITED BY r
1
100 ms
DS
(
on
)
1s
SINGLE PULSE
T
J
= MAX RATED
θ
JA
= 120
o
C/W
T
A
= 25
o
C
0.1
10s
DC
R
1
0.5
0.01
10
-4
10
-3
10
-2
t, PULSE WIDTH (sec)
10
-1
10
0
10
1
0.01
0.1
1
10
100200
100 1000
V
DS
, DRAIN to SOURCE VOLTAGE (V)
Figure 24. Forward Bias Safe
Operating Area
Figure 25. Single Pulse Maximum Power
Dissipation
©2011 Fairchild Semiconductor Corporation
FDMS7608S Rev.C1
8
Typical Characteristics (Q2 N-Channel)
T
J
= 25 °C unless otherwise noted
2
DUTY CYCLE-DESCENDING ORDER
1
D = 0.5
0.2
0.1
0.05
0.1
P
DM
0.02
0.01
t
1
t
SINGLE PULSE
0.01
2
θ
JA
= 120
o
C/W
NOTES:
DUTY FACTOR: D = t /t
R
1
2
(Note 1b)
PEAK T
= P
J
x Z
x R
+ T
θ
JA
A
DM
θ
JA
0.001
10
-4
10
-3
10
-2
10
-1
t, RECTANGULAR PULSE DURATION (sec)
10
0
10
1
100
1000
Figure 26. Junction-to-Ambient Transient Thermal Response Curve
©2011 Fairchild Semiconductor Corporation
FDMS7608S Rev.C1
9
Typical Characteristics
(continued)
TM
SyncFET Schottky
body diode
Characteristics
Fairchild’s SyncFET
TM
process embeds a Schottky diode in
parallel with PowerTrench
MOSFET. This diode exhibits similar
characteristics to a discrete external Schottky diode in parallel
Schottky barrier diodes exhibit significant leakage at high tem-
perature and high reverse voltage. This will increase the power
in the device.
®
with
a MOSFET. Figure 27 shows the reverse recovery
characteristic of the FDMS7608S.
10
-2
16
12
8
T
J
= 125
o
C
10
-3
10
-4
10
-5
10
-6
T
J
= 100
o
C
di/dt = 300 A/
μ
s
4
0
T
J
= 25
o
C
-4
23.06 23.0
8
2
3.1
0
2
3.12 23.1
4
2
3.16 23.18 23.2
0
2
3.2
2
2
3.24
0
5
10
15
20
25
30
TIME (ns)
V
DS
, REVERSE VOLTAGE (V)
Figure 28. SyncFET
TM
Body Diode Reverse
Leakage vs.
Drain-Source Voltage
Figure 27. FDMS7608S SyncFET
TM
Body
Diode Reverse Recovery Characteristic
©2011 Fairchild Semiconductor Corporation
FDMS7608S Rev.C1
10
0.05 C
B
5.00
A
2X
4.46
1.27
0.65
8
6
7
5
0.63(5X)
0.25
0.40
6.00
2.67
6.30
0.54
0.66
0.05 C
PIN#1 IDENT
2X
0.92
ꢀꢁꢄꢃꢀꢁꢀꢃ
0.10 C
ꢀꢁꢂꢀꢀꢁꢀꢃ
0.08 C
2
4
1
3
0.65 (5X)
ꢀꢁꢀꢂꢃꢀꢁꢀꢂꢃ
4.00
C
SIDE VIEW
SEATING
PLANE
RECOMMENDED LAND PATTERN
(OPTION 1 – FUSED LEADS 5,6,7)
ꢃꢁꢀꢀꢀꢁꢀꢃ
ꢅꢁꢆꢀꢀꢁꢀꢃ
(0.34)4X
ꢀꢁꢉꢅꢀꢁꢀꢃꢊꢃ;ꢋ
4.46
1.27
2
1
3
4
PIN#1 IDENT
0.65(8X)
8
6
7
5
0.63(8X)
ꢀꢁꢌꢂꢀꢁꢀꢃ
0.40
(0.66)
ꢀꢁꢃꢃꢀꢁꢀꢃ
ꢈꢁꢀꢀꢀꢁꢀꢃ
2.67
ꢂꢁꢈꢄꢀꢁꢀꢃ
6.30
0.54
0.66
0.45
0.92
5
8
6
7
ꢀꢁꢃꢇꢀꢁꢀꢃꢊꢃ;ꢋ
0.10 C A B
0.05 C
1.27
ꢅꢁꢆꢇꢀꢁꢀꢃ
2
4
1
3
4.00
BOTTOM VIEW
RECOMMENDED LAND PATTERN
(OPTION 2 – ISOLATED LEADS)
NOTES:
A. PACKAGE
DOES NOT FULLY CONFORM TO
JEDEC STANDARD.
B. DIMENSIONS
ARE IN MILLIMETERS.
C. DIMENSIONS
AND TOLERANCES PER
ASME Y14.5M, 2009.
D. LAND
PATTERN RECOMMENDATION IS
EXISTING INDUSTRY LAND PATTERN.
E. DRAWING
FILENAME: MKT-MLP08Prev2.
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