onsemi-FDMW2512NZ
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October 2005
FDMW2512NZ
Monolithic Common Drain N-Channel 2.5V Specified PowerTrench
®
MOSFET
General Description
Features
This dual N-Channel MOSFET has been designed
using Fairchild Semiconductor’s advanced Power
Trench process to optimize the R
DS(ON)
@ V
GS
= 2.5v on
special MicroFET lead frame with all the drains on one
side of the package.
•
7.2 A, 20 V
R
DS(ON)
= 26
m
Ω
@ V
GS
= 4.5 V
DS(ON)
= 34
m
Ω
@ V
GS
= 2.5 V
R
•
ESD protection Diode(note 3)
Applications
•
Low Profile – 0.8 mm maximum – in the new
package MicroFET 2 x 5 mm
•
Li-Ion Battery Pack
PIN 1
Bottom Drain Contact
Q2
S1 S1 G1
4
3
G2
S2
S2
G1
S1
S1
5
6
2
1
Q1
S2 S2 G2
MLP 2×5
Bottom Drain Contact
Absolute Maximum Ratings
T
A
=25
o
C unless otherwise noted
Symbol
V
DSS
V
GSS
Parameter
Ratings
Units
Drain-Source Voltage
20
V
V
A
Gate-Source Voltage
Drain Current
– Continuous
– Pulsed
±
12
7.2
28
I
D
(Note 1a)
P
D
Power Dissipation (Steady State)
(Note 1a)
(Note 1b)
2.2
0.8
W
T
J
, T
STG
Operating and Storage Junction Temperature Range
–55 to +150
°
C
Thermal Characteristics
Thermal Resistance, Junction-to-Ambient
Thermal Resistance, Junction-to-Ambient
(Note 1a)
(Note 1b)
55
R
θ
JA
R
θ
JA
°
C/W
145
Package Marking and Ordering Information
Device Marking
Device
Reel Size
Tape width
Quantity
2512Z
FDMW2512NZ
13’’
12mm
3000 units
FDMW2512NZ Rev D
©
2005 Fairchild Semiconductor Corporation
Electrical Characteristics
T
A
= 25°C unless otherwise noted
Symbol
Parameter
Test Conditions
Min Typ
Max Units
Off Characteristics
BV
DSS
Drain–Source Breakdown
20
V
V
GS
= 0 V,
I
D
= 250
µ
A
Voltage
Breakdown Voltage Temperature
Coefficient
12
∆
BV
DSS
∆
T
J
I
D
= 250
µ
A, Referenced to 25
°
C
mV/
°
C
I
DSS
I
GSS
Zero Gate Voltage Drain Current
V
DS
= 16 V,
V
GS
= 0 V
1
µ
A
µ
A
Gate–Body Leakage,
V
GS
=
±
12 V,
V
DS
= 0 V
±
10
On Characteristics
(Note 2)
V
GS(th)
Gate Threshold Voltage
0.5
0.8
–3
1.5
V
V
DS
= V
GS
I
D
= 250
µ
A, Referenced to 25
C
,
I
D
= 250
µ
A
Gate Threshold Voltage
Temperature Coefficient
∆
V
GS(th)
∆
T
J
mV/
°
C
R
DS(on)
Static Drain–Source
On–Resistance
V
GS
= 4.5 V,
V
GS
= 4.0 V,
V
GS
= 3.1 V,
V
GS
= 2.5 V,
I
D
= 7.2 A
I
D
= 7.2 A
I
D
= 6.4 A
I
D
= 6.4 A
19
20
22
23
25
26
28
32
34
39
m
Ω
V
GS
= 4.5 V, I
D
= 7.2 A, T
J
=125
°
C
g
FS
Forward Transconductance
V
DS
= 5 V,
I
D
=7.2 A
30
S
Dynamic Characteristics
C
iss
Input Capacitance
740
165
pF
pF
pF
Ω
V
DS
= 15 V,
V
GS
= 0 V,
C
oss
Output Capacitance
f = 1.0 MHz
C
rss
R
G
Reverse Transfer Capacitance
Gate Resistance
127
1.4
f = 1.0 MHz
Switching Characteristics
(Note 2)
t
d(on)
t
r
t
d(off)
t
f
Turn–On Delay Time
Turn–On Rise Time
Turn–Off Delay Time
Turn–Off Fall Time
Total Gate Charge
Gate–Source Charge
Gate–Drain Charge
8
10
16
13
9
16
20
29
23
13
ns
ns
V
DD
= 10 V,
I
D
= 1 A,
R
GEN
= 6
Ω
V
GS
= 4.5 V,
ns
ns
Q
g
Q
gs
Q
gd
nC
nC
nC
V
DS
= 10 V,
V
GS
= 4.5 V
I
D
= 7.2 A,
1
3
Drain–Source Diode Characteristics
V
SD
Drain–Source Diode Forward
Voltage
V
GS
= 0 V,
I
S
= 1.8 A
(Note 2)
0.7
1.2
V
t
rr
Diode Reverse Recovery Time
I
F
= 7.2 A,
dI
F
/dt = 100 A/µs
15
4
nS
nC
Q
rr
Diode Reverse Recovery Charge
Notes:
1.
R
θ
JA
is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of
the drain pins.
R
θ
JC
is guaranteed by design while R
θ
CA
is determined by the user’s board design.
a)
55°C/W when
b) 145°C/W when mounted on a
minimum pad of 2 oz copper
Scale 1 : 1 on letter size paper
mounted on a 1in
2
pad
of 2 oz copper
2
.
Pulse Test: Pulse Width < 300
µ
s,
Duty Cycle
< 2.0%
3. The diode connected between the gate
and source serves only as protection
againts ESD.
No gate overvoltage
rating is implied.
FDMW2512NZ Rev D
Typical Characteristics
50
2.4
2.2
2
V
GS
= 4.5V
3.5V
3.0V
45
40
35
30
25
20
15
10
5
2.5V
V
GS
= 1.8V
1.8
1.6
1.4
1.2
1
2.0V
1.8V
2.0V
2.5V
10
3.1V
15
4.0V
4.5V
0.8
0
0
5
20
25
30
0
1
2
3
4
I
D
, DRAIN CURRENT (A)
V
DS
, DRAIN-SOURCE VOLTAGE (V)
Figure 1. On-Region Characteristics.
Figure 2. On-Resistance Variation with
Drain Current and Gate Voltage.
0.074
1.6
1.4
1.2
1
I
D
= 7.2A
I
D
= 3.6A
0.066
0.058
0.05
V
GS
= 4.5V
T
A
= 125
o
C
0.042
0.034
0.026
0.018
0.01
T
A
= 25
o
C
0.8
0.6
-50
-25
0
25
50
75
100
125
150
1
2
3
4
5
T
J
, JUNCTION TEMPERATURE (
o
C)
V
GS
, GATE TO SOURCE VOLTAGE (V)
Figure 3. On-Resistance Variation with
Temperature.
Figure 4. On-Resistance Variation with
Gate-to-Source Voltage.
100
30
V
DS
= 5V
T
A
= -55
o
C
25
o
C
V
GS
= 0V
10
25
20
15
10
5
125
o
C
1
T
A
= 125
o
C
0.1
25
o
C
0.01
-55
o
C
0.001
0.0001
0
0
0.2
0.4
0.6
0.8
1
1.2
0.5
1
1.5
2
2.5
3
V
SD
, BODY DIODE FORWARD VOLTAGE (V)
V
GS
, GATE TO SOURCE VOLTAGE (V)
Figure 5. Transfer Characteristics.
Figure 6. Body Diode Forward Voltage Variation
with Source Current and Temperature.
FDMW2512NZ Rev D
Typical Characteristics
5
1200
1000
800
600
400
200
0
f = 1MHz
V
GS
= 0 V
I
D
= 7.2A
10V
V
DS
= 5V
4
3
2
1
0
C
iss
15V
C
oss
C
rss
0
2
4
6
8
10
12
0
4
8
12
16
20
Q
g
, GATE CHARGE (nC)
V
DS
, DRAIN TO SOURCE VOLTAGE (V)
Figure 7. Gate Charge Characteristics.
Figure 8. Capacitance Characteristics.
100
50
40
30
20
10
0
SINGLE PULSE
R
θ
JA
= 145°C/W
R
DS(ON)
LIMIT
100us
T
A
= 25°C
10
1
1ms
10ms
100ms
1s
10s
DC
V
GS
= 4.5V
SINGLE PULSE
R
θ
JA
= 145
o
C/W
T
A
= 25
o
C
0.1
0.01
0.001
0.01
0.1
1
10
100
1000
0.1
1
10
100
t
1
, TIME (sec)
V
DS
, DRAIN-SOURCE VOLTAGE (V)
Figure 9. Maximum Safe Operating Area.
Figure 10. Single Pulse Maximum
Power Dissipation.
1
D = 0.5
R
θ
JA
(t) = r(t) * R
θ
JA
R
θ
JA
=145 °C/W
0.2
P(pk)
0.1
0.1
t
1
0.05
0.02
t
2
J
– T
A
= P * R
θ
JA
(t)
Duty Cycle, D = t
1
/ t
2
T
0.01
SINGLE PULSE
0.01
0.0001
0.001
0.01
0.1
1
10
100
1000
t
1
, TIME (sec)
Figure 11. Transient Thermal Response Curve.
Thermal characterization performed using the conditions described in Note 1b.
Transient thermal response will change depending on the circuit board design.
FDMW2512NZ Rev D
Dimensional Outline and Pad Layout
FDMW2512NZ Rev D
TRADEMARKS
The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is
not intended to be an exhaustive list of all such trademarks.
®
ACEx™
PowerSaver™
SuperSOT™-6
SuperSOT™-8
SyncFET™
ISOPLANAR™
LittleFET™
MICROCOUPLER™
MicroFET™
MicroPak™
MICROWIRE™
MSX™
FAST
®
PowerTrench
ActiveArray™
Bottomless™
Build it Now™
CoolFET™
CROSSVOLT
™
DOME™
EcoSPARK™
E
2
CMOS™
EnSigna™
FACT™
FASTr™
FPS™
FRFET™
GlobalOptoisolator™
GTO™
®
QFET
®
QS™
TinyLogic
QT Optoelectronics™
Quiet Series™
RapidConfigure™
RapidConnect™
μ
SerDes™
ScalarPump™
SILENT SWITCHER
SMART START™
SPM™
Stealth™
TINYOPTO™
TruTranslation™
UHC™
HiSeC™
®
I
2
C™
UltraFET
MSXPro™
OCX™
UniFET™
VCX™
Wire™
i-Lo
™
ImpliedDisconnect™
IntelliMAX™
OCXPro™
OPTOLOGIC
®
®
OPTOPLANAR™
PACMAN™
POP™
Power247™
PowerEdge™
FACT Quiet Series™
Across the board. Around the world.™
®
The Power Franchise
SuperFET™
SuperSOT™-3
Programmable Active Droop™
DISCLAIMER
FAIRCHILD SEMICONDUCTOR RESERVE
S
T
HE RIGH
T
T
O MAKE CHANGES WITHOU
T
F
URTHER NOTIC
E
T
O
A
NY
PRODUCTS HEREI
N
T
O IMPROVE RELIABILIT
Y
,
F
UNCTION OR DESIGN. FAIRCHILD DOES NO
T
A
SSUM
E
A
N
Y
L
IABILITY
ARISING OU
T
O
F
T
H
E
A
PPLICATION OR USE O
F
A
N
Y
P
RODUC
T
O
R CIRCUI
T
D
ESCRIBED HEREIN; NEITHER DOES IT
CONVE
Y
A
N
Y
L
ICENSE UNDER ITS PATEN
T
R
IGHTS, NO
R
T
HE RIGHTS OF OTHERS.
LIFE SUPPORT POLICY
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOU
T
T
HE EXPRESS WRITTE
N
A
PPROVA
L
O
F FAIRCHILD SEMICONDUCTOR CORPORATION.
As used herein:
1. Life support devices or systems are devices or
systems which, (a) are intended for surgical implant into
the body, or (b) support or sustain life, or (c) whose
failure to perform when properly used in accordance
with instructions for use provided in the labeling, can be
reasonably expected to result in significant injury to the
user.
2. A critical component is any component of a life
support device or system whose failure to perform can
be reasonably expected to cause the failure of the life
support device or system, or to affect its safety or
effectiveness.
PRODUCT STATUS DEFINITIONS
Definition of Terms
Datasheet Identification
Product Status
Definition
Advance Information
Formative or
In Design
This datasheet contains the design specifications for
product development. Specifications may change in
any manner without notice.
Preliminary
First Production
This datasheet contains preliminary data, and
supplementary data will be published at a later date.
Fairchild Semiconductor reserves the right to make
changes at any time without notice in order to improve
design.
No Identification Needed
Obsolete
Full Production
This datasheet contains final specifications. Fairchild
Semiconductor reserves the right to make changes at
any time without notice in order to improve design.
Not In Production
This datasheet contains specifications on a product
that has been discontinued by Fairchild semiconductor.
The datasheet is printed for reference information only.
Rev. I17
