onsemi-FDN340P

Part #onsemi-FDN340P
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onsemi-FDN340P
February 2007  
FDN340P  
Single P-Channel, Logic Level, PowerTrench

MOSFET  
General Description  
Features  
This
P
–
Channel Logic Level MOSFET is produced  
using Fairchild Semiconductor advanced Power Trench  
process that has been especially tailored to minimize  
the on-state resistance and yet maintain low gate  
charge for superior switching performance.  
•
–2A, 20 V  
R

DS(ON)

= 70 m
Ω
@ V

GS

= –4.5 V  
R

DS(ON)

= 110 m
Ω
@ V

GS

= –2.5 V  
•
Low gate charge (7.2 nC typical).  
These devices are well suited for portable electronics  
applications: load switching and power management,  
battery charging circuits, and DC/DC conversion.  
•
High performance trench technology for extremely  
low R

DS(ON)  

.
•
High power version of industry Standard SOT-23  
package. Identical pin-out to SOT-23 with 30%  
higher power handling c
a
pability.  
D
G
S
Absolute Maximum Ratings
 
T

A

=25

o

C unless otherwise noted  
Sym bol  
Param eter  
Ratings  
Units  
V

DSS  

Drain-Source Voltage  
–20  
V
V

GSS  

I

D  

Gate-Source Voltage  
Drain Current
 
– Continuous  
– Pulsed  
±
8  
–2  
–10  
V
A
(Note 1a)  
P

D  

Power Dissipation for Single Operation  
(Note 1a)  
(Note 1b)  
0.5  
0.46  
W
T

J

, T

STG  

Operating and Storage Junction Temperature Range  
–55 to +150  
°
C  
Thermal Characteristics  
°
C/W  
°
C/W  
R

θ
JA  

R

θ
J
C  

Thermal Resistance, Junction-to-Ambient  
Thermal Resistance, Junction-to-Case  
(Note 1a)  
(Note 1)  
250  
75  
Package Marking and Ordering Information  
Device Marking  
Device  
Reel Size  
Tape width  
Quantity  
340  
FDN340P  
7’’  
8mm  
3000 units  
200
7
Fairchild Semiconductor Corporation  
FDN340P Rev E
1  

Electrical Characteristics  
T

A

= 25°C unless otherwise noted  
Symbol  
Parameter  
Test Conditions  
Min Typ Max
 
Units  
Off Characteristics  
BV

DSS  

Drain–Source Breakdown Voltage  
V

GS

= 0 V, I

D

= –250
µ
A  
–20  
V
Breakdown Voltage Temperature  
∆
BV
DSS  
∆
T

J  

I

D

= –250
µ
A,Referenced to 25
°
C  
–12  
mV
/
°
C  
µ
A  
Coefficient  
V

DS

= –16 V,
 
V

GS

= 0 V  
V

DS

= –16 V,
V

GS

= 0 V
,
T

J

=55
°
C  
–1  
–10  
100  
–100  
I

DSS  

Zero Gate Voltage Drain Current  
I

GSSF  

I

GSSR  

Gate–Body Leakage, Forward  
Gate–Body Leakage, Reverse  
V

GS

= 8 V,  
V

GS

= –8 V,  
V

DS

= 0 V  
V

DS

= 0 V  
nA  
nA  
On Characteristics  
(Note 2)  
V

GS(th)  

Gate Threshold Voltage  
V

DS

= V

G
S

,
I

D

= –250
µ
A  
I

D

= –250
µ
A,Referenced to 25
°
C  
–0.4  
–5  
–0.8  
3
–1.5  
V
Gate Threshold Voltage  
Temperature Coefficient  
∆
V
GS(th)  
∆
T

J  

mV
/
°
C  
m
Ω  
R

DS(on)  

Static Drain–Source  
On–Resistance  
V

GS

= –4.5 V,
 
I

D

= –2 A  
60  
77  
82  
70  
120  
110  
V

GS

= –4.5 V,
I

D

= –2 A,T

J

=125
°
C  
V

G
S

= –2.5 V,  
I

D

= –1.7A,  
I

D(on)  

g

FS  

On–State Drain Current  
Forward Transconductance  
V

GS

= –4.5 V,
 
V

DS

= –5 V  
A
S
V

DS

= –4.5 V,  
I

D

= –2 A  
9
Dynamic Characteristics  
600  
175  
80  
Input Capacitance  
779  
121  
56  
pF  
pF  
pF  
V

DS

= –10 V,  
f = 1.0 MHz  
V

GS

= 0 V,  
Output Capacitance  
Reverse Transfer Capacitance  
Switching Characteristics
 
(Note 2)  
t

d(on)  

t

r  

t

d(off)  

t

f  

Turn–On Delay Time  
Turn–On Rise Time  
Turn–Off Delay Time  
Turn–Off Fall Time  
Total Gate Charge  
Gate–Source Charge  
Gate–Drain Charge  
V

DD

= –10 V,  
V

GS

= –4.5 V,  
I

D

= –1 A,  
R

GEN

= 6
Ω  
10  
9
20  
10  
43  
20  
10  
ns  
ns  
ns  
27  
11  
7.2  
1.7  
1.5  
ns  
Q

g  

Q

gs  

Q

gd  

V

DS

= –10V,  
V

GS

= –4.5 V  
I

D

= –3.5 A,  
nC  
nC  
nC  
Drain–Source Diode Characteristics and Maximum Ratings  
I

S  

Maximum Continuous Drain–Source Diode Forward Current  
Drain–Source Diode Forw
a
r
d  
–0.42  
–1.2  
A
V
V

SD  

V

GS

= 0 V,
 
I

S

= –0.42 A
 
(Note 2)  
–0.7  
Voltage  
Notes:  
1.  
R

θ
J
A

is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of  
the drain pins.
 
R

θ
J
C

is guaranteed by design while R

θ
C
A

is determined by the user’s board design.  
a. 250°C/W when mounted on a  
b. 270°C/W when mounted on a  
2
2
0.02in pad
 
of 2 oz copper  
.001 in
 
pad of 2 oz copper  
Scale 1 : 1 on letter size paper  
2.
Pulse Test: Pulse Width < 300
µ
s, Duty Cycle < 2.0%  
FDN340P Rev E
1
 

Typical Characteristics  
15  
2
1.8  
1.6  
1.4  
1.2  
1
V

GS

= -4.5V  
-3.0V  
-3.5V  
-2.5V  
V
V

GS

=-2.0V  
12  
9
-2.0V  
-2.5V  
6
-3.0V  
-3.5V  
3
-4.5V  
-1.5V  
0
0.8  
0
1
2
3
4
0
3
6
9
12  
15  
–
V

D
S

, DRAIN TO SOURCE VOLTAGE (V)  
-I

D

, DRAIN CURRENT (A)  
Figure 1. On-Region Characteristics.  
Figure 2. On-Resistance Variation with  
Drain Current and Gate Voltage.  
1.4  
1.3  
0.22  
I

D

= -1A  
I

D

= -2A  
V

GS

= -4.5V  
0.18  
0.14  
0.1  
1.2  
1.1  
1
T

A

= 125

o

C  
T

A

= 2
5

o

C  
0.9  
0.8  
0.7  
0.06  
0.02  
-50  
-25  
0
25  
50  
75  
100  
125  
150  
1
2
3
4
5
T

J

, JUNCTION TEMPERATURE (

o

C)  
–
V

GS

, GATE TO SOURCE VOLTAGE (V)  
Figure 3. On-Resistance Variation with  
Temperature.  
Figure 4. On-Resistance Variation with  
Gate-to-Source Voltage.  
10  
8
10  
V

D
S

= -5V  
V

GS

= 0V  
T

A

= -55

o

C  
25

o

C  
125

o

C  
1
T

A

= 125

o

C  
6
0.1  
25

o

C  
4
0.01  
-5
5

o  

C
2
0.001  
0
0.0001  
0.5  
1
1.5  
2
2.5  
0
0.2  
0.4  
0.6  
0.8  
1
1.2  
–
V

GS

, GATE TO SOURCE VOLTAGE (V)  
–
V

S
D

, BODY DIODE FORW
 
ARD VOLTAGE (V)  
Figure 5. Transfer Characteristics.  
Figure 6. Body Diode Forward Voltage Variation  
with Source Current and Temperature.  
FDN340P Rev E
1
 

Typical Characteristics  
5
1000  
800  
600  
400  
200  
0
f = 1 MHz  
V

GS

= 0 V  
I

D

= -3.5A  
V

D
S

= -5V  
-10V  
C

ISS  

4
3
2
1
0
-15V  
C

OSS  

C

RSS  

0
1
2
3
4
5
6
7
8
9
0
5
10  
15  
20  
Q

g

, GATE CHARGE (nC)  
–
V

D
S

, DRAIN TO SOURCE VOLTAGE (V)  
Figure 7. Gate Charge Characteristics.  
Figure 8. Capacitance Characteristics.  
50  
40  
30  
20  
10  
0
100  
10  
SINGLE PULSE  
R
= 270° C/W  
θ
JA  
R

DS(ON)

LIMIT  
100
µ
s  
1ms  
10ms  
T
= 25°C  
A
100ms  
1
1s  
DC  
V

GS

= -10V  
SINGLE PULSE  
0.1  
0.01  
R

θ
JA

= 270

o

C/W  
T

A

= 25

o

C  
0.001  
0.01  
0.1  
1
10  
100  
0.1  
1
10  
100  
SINGLE PULSE TIME (SEC)  
–
V

D
S

, DRAIN-SOURCE VOLTAGE (V)  
Figure 9. Maximum Safe Operating Area.  
Figure 10. Single Pulse Maximum  
Power Dissipation.  
1
D = 0.5  
0.5  
0.2  
0.2  
R
JA
(t) = r(t)
 
* R
 
JA  
θ
θ
0.1  
R
= 270 °C/W  
JA  
θ
0.1  
0.05  
0.05  
0.02  
P(pk)  
0.01  
0.02  
t
1
Single Pulse  
0.01  
t
2
0.005  
T
J
– T
 
= P
 
* R  
(t)  
θ
JA  
A
Duty Cycle, D = t
 
/t  
1
2
0.002  
0.001  
0.0001  
0.001  
0.01  
0.1  
, TIME (sec)  
1
10  
100  
300  
t
1
Figure 11. Transient Thermal Response Curve.  
Thermal characterization performed using the conditions described in Note 1b.  
Transient thermal response will change depending on the circuit board design.  
FDN340P Rev E
1
 

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N O R
 
TH E
 
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O F
 
O TH ER S .
 
TH ES E
 
S P EC IF IC A TIO N S
 
D O
 
N O T
 
EX P A N D
 
TH E
 
TER M S
 
O F
 
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IF E
 
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S Y S TEM S  
W ITH O U T
 
TH E
 
EX P R ES S
 
W R ITTEN
 
A P P R O V A L
 
O F
 
F A IR C H IL D
 
S EM IC O N D U C TO R
 
C O R P O R A TIO N .  
A s
 
used herein:  
1 .
 
L ife
 
sup p ort
 
dev ic es
 
or sy
 
stem s
 
are dev
 
ic es
 
or sy
 
stem s  
whic h,
 
(a) are intended for surgic
 
al im
 
p lant
 
into the b
 
ody ,
 
or  
(b ) sup
 
p ort
 
or sustain life, or (c
 
) whose failure to p
 
erform  
when p
 
rop erly
 
used in ac
 
c ordanc e
 
with instruc
 
tions for use  
p rov ided
 
in the lab
 
eling, c
 
an b
 
e reasonab
 
ly ex
 
p ec ted
 
to  
result in signific
 
ant injury to the user.
ꢀ
 
2. A c
 
ritic al
 
c om p onent
 
is any c
 
om p onent
 
of a life sup
 
p ort  
dev ic e
 
or sy
 
stem whose failure to p
 
erform c
 
an b
 
e  
reasonab ly
 
ex p ec ted
 
to c
 
ause the failure of the life sup
 
p ort  
dev ic e
 
or sy
 
stem ,
 
or to affec
 
t its safety or effec
 
tiv eness.
ꢀ  
P RO DU C T
 
STATU S
 
DEF IN ITIO N S  
De fin itio n
 
o f
 
Te rm s  
Da ta s h e e t
 
Id e n tific a tio n  
P ro d u c t
 
Sta tu s  
De fin itio n  
A dv anc e
 
Inform ation  
F orm ativ e or
 
In  
D esign  
This datasheet c
 
ontains the design sp
 
ec ific ations
 
for  
p roduc t
 
dev elop m ent.
 
S p ec ific ations
 
m ay
 
c hange
 
in  
any m
 
anner without notic
 
e.  
P relim inary  
F irst P roduc tion  
This datasheet c
 
ontains p
 
relim inary
 
data, and  
sup p lem entary
 
data will b
 
e p
 
ub lished
 
at a later date.  
F airc hild
 
S em ic onduc tor
 
reserv es
 
the right to m
 
ak e  
c hanges
 
at any tim
 
e without notic
 
e in order to im
 
p rov e  
design.  
N o
 
Identific ation
 
N eeded  
O b solete  
F ull P roduc tion  
This datasheet c
 
ontains final sp
 
ec ific ations.
 
F airc hild  
S em ic onduc tor
 
reserv es the right to m
 
ak e
 
c hanges
 
at  
any tim
 
e without notic
 
e in order to im
 
p rov e design.
ꢀ  
N ot
 
In P
 
roduc tion  
This datasheet c
 
ontains sp
 
ec ific ations
 
on a p
 
roduc t  
that has b
 
een disc
 
ontinued b
 
y F
 
airc hild sem ic onduc tor.  
The datasheet is p
 
rinted for referenc
 
e inform
 
ation only
 
.  
R ev .
 
I22