onsemi-FDN352AP

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August 2005  
FDN352AP  
Single P-Channel, PowerTrench

®

MOSFET  
Features  
General Description  
■
–1.3 A, –30V  
R
R
= 180 m
Ω
@ V
 
= –10V  
This P-Channel Logic Level MOSFET is produced using Fair-  
child Semiconductor advanced Power
T
r
ench process that has  
been especially tailored to minimize the on-state resistance and  
yet maintain low gate charge for superior switching perfor-  
mance.  
DS(ON)  
DS(ON)  
GS  
–1.1 A, –30V  
= 300 m
Ω
@ V
 
= –4.5V  
GS  
■
High performance trench technology for extremely low  
R
.
DS(ON)  
■
High power version of industry Standard SO
T
–
23 package.  
Identical pin-out to SO
T
–
23 with 30% higher power handling  
capabilit
y
.  
These devices are well suited for low voltage and battery pow-  
ered applications where low in-line power loss is needed in a  
very small outline surface mount package.  
Applications  
■
Notebook computer power management  
D
D
S
G
S
G
SuperSOT™-3  
Absolute Maximum Ratings
T =
 
25°C unless otherwise noted  
A
Symbol  
Parameter  
Ratings  
Units  
V
Drain-Source Voltage  
Gate-Source Voltage  
–30  
25  
V
V
A
DSS  
V
GSS  
I
Drain Current  
– Continuous  
– Pulsed  
(Note 1a)  
–1.3  
D
–10  
P
Power Dissipation for Single Operation  
(Note 1a)  
(Note 1b)  
0.5  
W
°
C  
D
0.46  
T , T  
Operating and Storage Junction
T
e
mperature Range  
–55 to +150  
J
STG  
Thermal Characteristics  
R
R
Thermal Resistance, Junction-to-Ambient  
Thermal Resistance, Junction-to-Case  
(Note 1a)  
(Note 1)  
250  
75  
°
C/W  
θ
JA  
θ
JC  
Package Marking and Ordering Information  
Device Marking  
Device  
Reel Size  
Tape width  
Quantity  
52AP  
FDN352AP  
7’’  
8mm  
3000 units  
©2005 Fairchild Semiconductor Corporation  
FDN352AP Rev. C1  
1

Electrical Characteristics
T =
 
25°C unless otherwise noted  
A
Symbol  
Parameter  
Test Conditions  
Min Typ Max
 
Units  
Off Characteristics  
BV  
Drain–Source Breakdown Voltage  
V
I
= 0
V
, I
 
=
–
250
µ
A  
–30  
V
DSS  
GS  
D
∆
BV

DSS  

Breakdown Voltage
T
e
mperature Coefficient  
= –250
µ
A, Referenced to 25
°
C  
–17  
mV/
°
C  
D
∆
T  
J
I
Zero Gate Voltage Drain Current  
Gate–Body Leakage  
V
V
= –24
V
, V
 
= 0 V  
–1  
µ
A  
DSS  
DS  
GS  
I
=
25
V
, V
 
= 0 V  
100  
nA  
GSS  
GS  
DS  
On Characteristics
(Note 2)  
Gate Threshold Voltage  
V
V
I
= V
 
, I
 
= –250
µ
A  
–0.8  
–2.0  
4
–2.5  
V
GS(th)  
DS  
GS  
D
∆
V

GS(th)  

Gate Threshold Voltage  
T
e
mperature Coefficient  
= –250
µ
A, Referenced to 25
°
C  
mV/
°
C  
D
∆
T  
J
R
Static Drain–Source  
On–Resistance  
V
V
V
= –10
V
, I
 
=
–
1.3 A  
150  
250  
330  
180  
300  
400  
m
Ω  
DS(on)  
GS  
D
= –4.5
V
, I
 
=
–
1.1 A  
GS  
GS  
D
= –4.5
V
, I
 
=
–
1.1 A, T
 
= 125
°
C  
D
J
g
Forward
T
r
ansconductance  
V
= –5
V
, I
 
=
–
0.9 A  
2.0  
S
FS  
DS  
D
Dynamic Characteristics  
C
C
C
Input Capacitance  
V
= –15
V
, V
 
= 0 V, f =
1
.0 MHz  
150  
40  
pF  
pF  
pF  
iss  
DS  
GS  
Output Capacitance  
oss  
rss  
Reverse
T
r
ansfer Capacitance  
20  
Switching Characteristics
(Note 2)  
t
t
t
t
T
u
rn–On Delay Time  
T
u
rn–On Rise Time  
T
u
rn–Off Delay Time  
T
u
rn–Off Fall Time  
T
o
tal Gate Charge  
Gate–Source Charge  
Gate–Drain Charge  
V
V
= –10
V
, I
 
=
–
1 A,  
4
8
28  
18  
2
ns  
ns  
d(on)  
DD  
GS  
D
= –10
V
, R  
= 6
Ω  
GEN  
15  
10  
1
r
ns  
d(off)  
f
ns  
Q
Q
Q
V
V
= –10
V
, I
 
=
–
0.9 A,  
1.4  
0.5  
0.5  
1.9  
nC  
nC  
nC  
g
DS  
GS  
D
= –4.5 V  
gs  
gd  
Drain–Source Diode Characteristics and Maximum Ratings  
Maximum Continuous Drain–Source Diode Forward Current  
I
–0.42  
–1.2  
A
V
S
V
Drain–Source Diode Forward Voltage  
Diode Reverse Recovery Time  
Diode Reverse Recovery Charge  
V
= 0
V
, I
 
=
–
0.42 A  
(Note 2)  
–0.8  
17  
7
SD  
GS  
S
t
I
= –3.9 A,  
F
ns  
nC  
rr  
dI /dt
 
= 100 A/µs  
F
Q
rr  
Notes:  
1. R

θ
JA

is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting  
surface of the drain pins R

θ
JC

is guaranteed by design while R

θ
JA

is determined by the user’s board design.  
(a) R

θ
JA

= 250°C/W when mounted on a 0.02 in

2

pad of 2oz. copper.  
(b) R

θ
JA

= 270°C/W when mounted on a 0.001 in

2

pad of 2oz. copper.  
2. Pulse
 
T
e
st: Pulse Width < 300
µ
s, Duty Cycle < 2.0%  
2
FDN352AP Rev. C1  

Typical Characteristics  
10  
2.4  
2.2  
2.0  
1.8  
1.6  
1.4  
1.2  
1.0  
0.8  
V

GS

= -4.0V  
V

GS

= -10V  
8
-4.5V  
-6.0V  
6
-5.0V  
-4.5V  
-6.0V  
4
-7.0V  
-4.0V  
-8.0V  
-10V  
2
0
-3.5V  
4
-3.0V  
0
1
2
3
5
0
2
4
6
8
10  
-V

DS

, DRAIN TO SOURCE VOLTAGE (V)  
-I

D

, DRAIN CURRENT (A)  
Figure 1. On-Region Characteristics.  
Figure 2. On-Resistance Variation with  
Drain Current and Gate Voltage.  
0.7  
0.6  
0.5  
0.4  
0.3  
0.2  
0.1  
1.4  
I

D

= -0.45A  
I

D

= -0.9A  
V

GS

= -10V  
1.2  
1
T

A

= 12
5

o

C  
T

A

= 2
5

o

C  
0.8  
0.6  
-50  
-25  
0
25  
50  
75  
100  
125  
150  
2
4
6
8
10  
T

J

, JUNCTION TEMPERATURE (

o

C)  
-V

GS

, GATE TO SOURCE VOLTAGE (V)  
Figure 3. On-Resistance Variation with  
Temperature.  
Figure 4. On-Resistance Variation with  
Gate-to-Source Voltage.  
10  
8
100  
10  
1
V

GS

= 0V  
V

DS

= -5V  
T

A

= -5
5

o  

C
125

o

C  
T

A

= 12
5

o

C  
6
25

o

C  
0.1  
25

o

C  
4
0.01  
0.001  
-55

o

C  
2
0.0001  
0
0.0  
0.2  
0.4  
0.6  
0.8  
1.0  
1.2  
1.4  
1
2
3
4
5
6
7
8
-V

G
S

, GATE TO SOURCE VOLTAGE (V)  
-V

SD

, BODY
 
DIODE FORWARD VOLTAGE (V)  
Figure 5. Transfer Characteristics.  
Figure 6. Body Diode Forward Voltage Variation  
with Source Current and Temperature.  
3
FDN352AP Rev. C1  

Typical Characteristics  
10  
200  
150  
100  
50  
f = 1 MHz  

GS

= 0 V  
I

D

= -0.9A  
V
8
V

DS

= -10V  
-20V  
C

iss  

6
4
2
0
-15V  
C

oss  

C

rss  

0
0
5
10  
15  
20  
25  
30  
0
0.5  
1
1.5  
2
2.5  
3
Q

g

, GATE CHARGE (nC)  
-V

DS

, DRAIN TO SOURCE VOLTAGE (V)  
Figure 7. Gate Charge Characteristics.  
Figure 8. Capacitance Characteristics.  
100  
10  
50  
40  
30  
20  
10  
0
SINGLE PULSE  
R

θ

JA

= 270
°
C/W  
T

A

= 25
°
C  
100
µ
s  
R

DS(ON)

LIMIT  
1ms  
10ms  
1
100ms  
1s  
10s  
DC  
V

GS

= -10V  
SINGLE PULSE  
R

θ

JA

= 270

o

C/W  
T

A

= 25

o

C  
0.1  
0.01  
0.0001  
0.001  
0.01  
0.1  
1
10  
100  
1000  
0.1  
1
10  
100  
-V

DS

, DRAIN-SOURCE VOLTAGE (V)  
t

1

, TIME (sec)  
Figure 9. Maximum Safe Operating Area.  
Figure 10. Single Pulse Maximum  
Power Dissipation.  
1
D = 0.5  
R
θ

JA

(t) = r(t) * R
θ  
JA  
0.2  
R
θ

JA

= 270
°
C/W  
0.1  
0.01  
0.1  
0.05  
P(pk)  
0.02  
0.01  
t

1  

t

2  

T

J

– T

A

= P * R  
θ

JA

(t)  
Duty Cycle, D =
t

1

/ t

2  

SINGLE PULSE  
0.001  
0.0001  
0.001  
0.01  
0.1  
1
10  
100  
1000  
t

1

, TIME (sec)  
Figure 11. Transient Thermal Response Curve.  
Thermal characterization performed using the conditions described in Note 1c.  
Transient thermal response will change depending on the circuit board design.  
4
FDN352AP Rev. C1  

TRADEMARKS  
The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is  
not intended to be an exhaustive list of all such trademarks.  
ACEx™  
PowerSaver™  
SuperSOT™-8  
SyncFET™  
TinyLogic  
ISOPLANAR™  
LittleFET™  
MICROCOUPLER™  
MicroFET™  
MicroPak™  
MICROWIRE™  
MSX™  
FAST  
ActiveArray™  
Bottomless™  
Build it Now™  
CoolFET™  
CROSSVOLT
™  
DOME™  
EcoSPARK™  
E

2

CMOS™  
EnSigna™  
FACT™  
PowerTrench  
FASTr™  
FPS™  
FRFET™  
GlobalOptoisolator™  
GTO™  
QFET  
QS™  
TINYOPTO™  
TruTranslation™  
UHC™  
QT Optoelectronics™  
Quiet Series™  
RapidConfigure™  
RapidConnect™  
µ
SerDes™  
SILENT SWITCHER  
SMART START™  
SPM™  
UltraFET  
HiSeC™  
I

2

C™  
UniFET™  
VCX™  
Wire™  
MSXPro™  
OCX™  
i-Lo
™  
ImpliedDisconnect™  
IntelliMAX™  
OCXPro™  
OPTOLOGIC  
OPTOPLANAR™  
PACMAN™  
POP™  
Power247™  
PowerEdge™  
FACT Quiet Series™  
Stealth™  
Across the board. Around the world.™  
SuperFET™  
SuperSOT™-3  
SuperSOT™-6  
The Power Franchise  
Programmable Active Droop™  
DISCLAIMER  
FAIRCHILD SEMICONDUCTOR RESERVE
S
T
HE RIGH
T
T
O MAKE CHANGES WITHOU
T
F
URTHER NOTIC
E
T
O
A
NY  
PRODUCTS HEREI
N
T
O IMPROVE RELIABILIT
Y
,
F
UNCTION OR DESIGN. FAIRCHILD DOES NO
T
A
SSUM
E
A
N
Y
L
IABILITY  
ARISING OU
T
O
F
T
H
E
A
PPLICATION OR USE O
F
A
N
Y
P
RODUC
T
O
R CIRCUI
T
D
ESCRIBED HEREIN; NEITHER DOES IT  
CONVE
Y
A
N
Y
L
ICENSE UNDER ITS PATEN
T
R
IGHTS, NO
R
T
HE RIGHTS OF OTHERS.  
LIFE SUPPORT POLICY  
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT  
DEVICES OR SYSTEMS WITHOU
T
T
HE EXPRESS WRITTE
N
A
PPROVA
L
O
F FAIRCHILD SEMICONDUCTOR CORPORATION.  
As used herein:  
1. Life support devices or systems are devices or  
systems which, (a) are intended for surgical implant into  
the body, or (b) support or sustain life, or (c) whose  
failure to perform when properly used in accordance  
with instructions for use provided in the labeling, can be  
reasonably expected to result in significant injury to the  
user.  
2. A critical component is any component of a life  
support device or system whose failure to perform can  
be reasonably expected to cause the failure of the life  
support device or system, or to affect its safety or  
effectiveness.  
PRODUCT STATUS DEFINITIONS  
Definition of Terms  
Datasheet Identification  
Product Status  
Definition  
Advance Information  
Formative or  
In Design  
This datasheet contains the design specifications for  
product development. Specifications may change in  
any manner without notice.  
Preliminary  
First Production  
This datasheet contains preliminary data, and  
supplementary data will be published at a later date.  
Fairchild Semiconductor reserves the right to make  
changes at any time without notice in order to improve  
design.  
No Identification Needed  
Obsolete  
Full Production  
This datasheet contains final specifications. Fairchild  
Semiconductor reserves the right to make changes at  
any time without notice in order to improve design.  
Not In Production  
This datasheet contains specifications on a product  
that has been discontinued by Fairchild semiconductor.  
The datasheet is printed for reference information only.  
Rev. I16  
5
FDN352AP Rev. C1  

ON Semiconductor and  
are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.  
ON Semiconductor owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of ON Semiconductor’s product/patent  
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arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.  
Buyer is responsible for its products and applications using ON Semiconductor products, including compliance with all laws, regulations and safety requirements or standards,  
regardless of any support or applications information provided by ON Semiconductor. “Typical” parameters which may be provided in ON Semiconductor data sheets and/or  
specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer  
application by customer’s technical experts. ON Semiconductor does not convey any license under its patent rights nor the rights of others. ON Semiconductor products are not  
designed, intended, or authorized for use as a critical component in life support systems or any FDA Class 3 medical devices or medical devices with a same or similar classification  
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application, Buyer shall indemnify and hold ON Semiconductor and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and  
expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such  
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literature is subject to all applicable copyright laws and is not for resale in any manner.  
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