onsemi-FDP18N50
| Part # | onsemi-FDP18N50 |
| Download | onsemi-FDP18N50 |
October 2006
TM
UniFET
FDP18N50 / FDPF18N50
500V N-Channel MOSFET
Features
Description
•
•
•
•
•
•
18A, 500
V
, R
DS(on)
= 0.265
Ω
@V
GS
= 10 V
Low gate charge ( typical 45 nC)
Low C
rss
( typical
25 pF)
Fast switching
These N-Channel enhancement mode power field effect
transistors are produced using Fairchild’s proprietary, planar
stripe, DMOS technology.
This advanced technology has been especially tailored to
minimize on-state resistance, provide superior switching
performance, and withstand high energy pulse in the avalanche
and commutation mode. These devices are well suited for high
efficient switched mode power supplies and active power factor
correction.
100% avalanche tested
Improved dv/dt capability
D
G
TO-220F
FDPF Series
S
TO-220
FDP Series
G D
S
G
D S
Absolute Maximum Ratings
Symbol
Parameter
FDP18N50 FDPF18N50
Unit
V
DSS
Drain-Source Voltage
Drain Current
500
V
I
D
– Continuous (T
C
= 25
°
C)
– Continuous (T
C
= 100
°
C)
1
8
10
.
8
1
8 *
10
.
8
*
A
A
(Note 1)
(Note 2)
I
DM
Drain Current
– Pulsed
72
72
*
A
V
V
GSS
E
AS
I
AR
Gate-Source voltage
±
30
945
18
Single Pulsed Avalanche Energy
Avalanche Current
mJ
A
(Note 1)
(Note 1)
(Note 3)
E
AR
dv/dt
P
D
Repetitive Avalanche Energy
Peak Diode Recovery dv/dt
23
mJ
V/ns
4.5
Power Dissipation
(T
C
= 25
°
C)
235
58
W
– Derate above 25
°
C
1.88
0.47
W/
°
C
T
J,
T
STG
Operating and Storage
T
e
mperature Range
-55 to +150
300
°
C
T
L
Maximum Lead
T
e
mperature for Soldering Purpose,
1/8” from Case for 5 Seconds
°
C
* Drain current limited by maximum junction temperature
Thermal Characteristics
Symbol
Parameter
FDP18N50 FDPF18N50
Unit
°
C/W
°
C/W
°
C/W
R
θ
JC
Thermal Resistance, Junction-to-Case
Thermal Resistance, Case-to-Sink Typ.
Thermal Resistance, Junction-to-Ambient
0.53
0.5
2.15
—
R
θ
CS
R
θ
JA
62.5
62.5
©2006 Fairchild Semiconductor Corporation
FDP18N50 / FDPF18N50 Rev. A
1
Package Marking and Ordering Information
Device Marking
FDP18N50
Device
FDP18N50
FDPF18N50
Package
TO-220
Reel Size
Tape Width
Quantity
–
–
–
–
50
50
FDPF18N50
TO-220F
Electrical Characteristics
T
= 25°C unless otherwise noted
C
Symbol
Parameter
Conditions
Min. Typ. Max
Units
Off Characteristics
BV
DSS
Drain-Source Breakdown Voltage
V
GS
= 0
V
,
I
D
= 250
µ
A
D
= 250
µ
A, Referenced to 25
°
C
500
—
—
—
—
V
∆
BV
DSS
Breakdown Voltage
T
e
mperature
Coefficient
I
0.5
V/
°
C
/
∆
T
J
I
DSS
Zero Gate Voltage Drain Current
V
DS
= 500
V
,
V
GS
= 0V
DS
= 400
V
,
T
C
= 125
°
C
—
—
—
—
1
10
µ
A
µ
A
V
I
GSSF
I
GSSR
Gate-Body Leakage Current, Forward
Gate-Body Leakage Current, Reverse
V
GS
= 30
V
,
V
DS
= 0V
V
GS
= -30V, V
DS
= 0V
—
—
—
—
100
nA
nA
-100
On Characteristics
V
GS(th)
Gate Threshold Voltage
R
DS(on)
V
DS
= V
GS
, I
D
= 250
µ
A
3.0
—
—
0.220
25
5.0
0.265
—
V
Ω
S
Static Drain-Source
On-Resistance
V
GS
= 10
V
,
I
D
= 9A
(Note 4)
g
FS
Forward Transconductance
V
DS
= 40
V
,
I
D
= 9A
—
Dynamic Characteristics
C
iss
C
oss
C
rss
Input Capacitance
V
DS
= 25
V
,
V
GS
= 0V,
f = 1.0MHz
—
—
—
2200
330
25
2860
430
40
pF
pF
pF
Output Capacitance
Reverse Transfer Capacitance
Switching Characteristics
t
d(on)
Turn-On Delay Time
t
r
t
d(off)
t
f
V
DD
= 250
V
,
I
D
= 18A
—
—
—
—
—
—
—
55
165
95
120
340
200
190
60
ns
ns
R
G
= 25
Ω
Turn-On Rise Time
Turn-Off Delay Time
Turn-Off Fall Time
T
o
tal Gate Charge
Gate-Source Charge
Gate-Drain Charge
ns
(Note 4, 5)
(Note 4, 5)
90
ns
Q
g
V
DS
= 400
V
,
I
D
= 18A
GS
= 10V
45
nC
nC
nC
V
Q
gs
Q
gd
12.5
19
—
—
Drain-Source Diode Characteristics and Maximum Ratings
I
S
Maximum Continuous Drain-Source Diode Forward Current
Maximum Pulsed Drain-Source Diode Forward Current
—
—
—
—
—
—
—
18
72
1.4
—
A
A
I
SM
V
SD
t
rr
Drain-Source Diode Forward Voltage
Reverse Recovery Time
V
GS
= 0
V
,
I
S
= 18A
—
V
V
GS
= 0
V
,
I
S
= 18A
500
5.4
ns
µ
C
dI
F
/dt =100A/
µ
s
(Note 4)
Q
rr
Reverse Recovery Charge
—
NOTES:
1. Repetitive Rating: Pulse width limited by maximum junction temperature
2. L = 5.2mH, I
= 18A, V
= 50V, R
= 25
Ω
, Starting T
= 25
°
C
AS
DD
G
J
3. I
≤
18A, di/dt
≤
200A/
µ
s, V
≤
BV
, Starting T
= 25
°
C
SD
DD
DSS
J
4. Pulse
T
e
st: Pulse width
≤
300
µ
s, Duty Cycle
≤
2%
5. Essentially Independent of Operating
T
e
mperature Typical Characteristics
2
FDP18N50 / FDPF18N50 Rev. A
Typical Performance Characteristics
Figure 1. On-Region Characteristics
Figure 2. Transfer Characteristics
10
2
10
1
10
0
V
GS
10
2
10
1
10
0
10
-1
Top :
15.0 V
10.0 V
8.0 V
7.0 V
6.5 V
6.0 V
Bottom :
5.5 V
150
o
C
25
o
C
-55
o
C
* Notes :
1. 250
µ
s Pulse Test
* Notes :
1. V
DS
= 40V
2. 250
µ
s Pulse Test
o
2. T
C
= 25 C
10
-1
10
0
10
1
2
4
6
8
10 12
V
DS
, Drain-Source Voltage [V]
V
GS
, Gate-Source Voltage [V]
Figure 3. On-Resistance Variation vs.
Drain Current and Gate Voltage
Figure 4. Body Diode Forward Voltage
Variation vs. Source Current
and Temperatue
10
2
10
1
10
0
0.6
0.5
V
GS
= 10V
0.4
0.3
V
GS
= 20V
150
o
C
25
o
C
0.2
* Notes :
1. V
GS
= 0V
2. 250
µ
s Pulse Test
o
* Note : T
J
= 25 C
0.1
0.2
0.4
0.6
0.8
1.0
1.2
1.4
1.6
1.8
2.0
2.2
2.4
0
5
10 15 20 25 30 35 40 45 50 55 60 65 70
V
SD
, Source-Drain voltage [V]
I
D
, Drain Current [A]
Figure 5. Capacitance Characteristics
Figure 6. Gate Charge Characteristics
5000
12
C
C
C
iss
= C
gs
+ C
gd
(C
ds
= shorted)
oss
= C
ds
+ C
gd
rss
= C
gd
10
8
4000
3000
2000
1000
0
V
DS
= 100V
V
DS
= 250V
C
oss
V
DS
= 400V
C
iss
6
4
* Note :
1. V
GS
= 0 V
2. f = 1 MHz
C
rss
2
* Note : I
D
= 18A
0
-1
10
10
0
10
1
0
10
20
30
40
50
V
DS
, Drain-Source Voltage [V]
Q
G
, Total Gate Charge [nC]
3
FDP18N50 / FDPF18N50 Rev. A
Typical Performance Characteristics
(Continued)
Figure 7. Breakdown Voltage Variation
vs. Temperature
Figure 8. On-Resistance Variation
vs. Temperature
3.0
2.5
2.0
1.5
1.0
1.2
1.1
1.0
*
N
otes :
1. V
G
S
= 0 V
0.9
* Notes :
1. V
G
S
= 10 V
2. I
D
=
2
50
µ
A
0.5
2. I
D
= 9 A
0.8
-100
0.0
-100
-50
0
50
100
150
200
-50
0
50
100
150
200
T,
J
unction Temperature [
o
C
]
T
J
, Junction Temperature [
o
C
]
J
Figure 9-1. Maximum Safe Operating Area
– FDP18N50
Figure 9-2. Maximum Safe Operating Area
– FDPF18N50
10
2
10
2
10
µ
s
10
µ
s
100
µ
s
1
m
s
10 ms
100 ms
100
µ
s
1
m
s
10
1
10
1
10
0
10
-1
10
-2
10 ms
100 ms
Operation in This Area
is Limited by R
DS(on)
Operation in This Area
is Limited by R
DS(on)
DC
10
0
DC
* Notes :
1. T
C
= 25
o
-1
10
* Notes :
1. T
C
= 25
o
C
C
2. T
J
= 150
o
C
2. T
J
= 150
o
C
3. Single Pulse
3. Single Pulse
-2
10
10
0
10
1
10
2
10
0
10
1
10
2
V
DS
, Drain-Source Voltage [V]
V
DS
, Drain-Source Voltage [V]
Figure 10. Maximum Drain Currentvs. Case Temperature
20
15
10
5
0
25
50
75
100
125
150
T
C
, Case Temperature [
o
C]
4
FDP18N50 / FDPF18N50 Rev. A
Typical Performance Characteristics
(Continued)
Figure 11-1. Transient Thermal Response Curve – FDP18N50
1 0
0
D =
0
.5
0.2
1 0
-1
P
DM
0.1
t
1
t
2
0.05
*
N o te s
1 .
θ
J
C
(
t)
2 .
D u ty
F a cto r,
D = t
1
/t
2
3 .
T
J
M
T
C
P
D M
θ
J
C
(
t)
:
0.02
0.01
o
Z
= 0
.5 3
C /W
M a x.
1 0
-2
–
=
* Z
single p
ulse
1 0
-3
1 0
-5
1 0
-4
1 0
-2
1 0
-1
1 0
0
1 0
1
t
1
, S
q u a
r
e
W a
ve P
u lse
D u ra tio n
[se c]
Figure 11-2. Transient Thermal Response Curve – FDPF18N50
1 0
0
D =
0
.5
0.2
0.1
P
DM
0.05
1 0
-1
t
1
t
2
0.02
0.01
*
N o te s
1 .
Z
θ
J
C
(
t)
2 .
D u ty
F a cto r,
D = t
1
/t
2
3 .
T
J
M
T
C
P
D M
Z
θ
J
C
(
t)
:
o
=
2 .1 5
C /W
M a x.
1 0
-2
–
=
*
sing le
pulse
1 0
-3
1 0
-5
1 0
-4
1 0
-2
1 0
-1
1 0
0
1 0
1
t
1
, S
q u a
r
e
W a
ve P
u lse
D u ra tio n
[se c]
5
FDP18N50 / FDPF18N50 Rev. A
Gate Charge Test Circuit & Waveform
Resistive Switching Test Circuit & Waveforms
Unclamped Inductive Switching Test Circuit & Waveforms
6
FDP18N50 / FDPF18N50 Rev. A
Peak Diode Recovery dv/dt Test Circuit & Waveforms
7
FDP18N50 / FDPF18N50 Rev. A
Mechanical Dimensions
TO-220
4.50
0.20
+0.10
9.90
0.20
(8.70)
1.30
ø3.60
0.10
–0.05
1.27
0.10
1.52
0.10
0.80
0.10
+0.10
–0.05
0.50
2.40
0.20
2.54TYP
2.54TYP
[2.54
0.20
]
[2.54
0.20
]
10.00
0.20
8
FDP18N50 / FDPF18N50 Rev. A
Mechanical Dimensions
TO-220F
2.54
0.20
(0.70)
10.16
0.20
(7.00)
ø3.18
0.10
(1.00×45
°
)
MAX1.47
0.80
0.10
#1
0.35
0.10
+0.10
–0.05
0.50
2.76
0.20
2.54TYP
2.54TYP
[2.54
0.20
]
[2.54
0.20
]
9.40
0.20
9
FDP18N50 / FDPF18N50 Rev. A
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FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT
THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION.
As used herein:
1. Life support devices or systems are devices or systems which,
(a) are intended for surgical implant into the body, or (b) support
or sustain life, or (c) whose failure to perform when properly used
in accordance with instructions for use provided in the labeling,
can be reasonably expected to result in significant injury to the
user.
2. A critical component is any component of a life support device
or system whose failure to perform can be reasonably expected
to cause the failure of the life support device or system, or to
affect its safety or effectiveness.
PRODUCT STATUS DEFINITIONS
Definition of Terms
Datasheet Identification
Product Status
Definition
Advance Information
Formative or In
Design
This datasheet contains the design specifications for
product development. Specifications may change in
any manner without notice.
Preliminary
First Production
This datasheet contains preliminary data, and
supplementary data will be published at a later date.
Fairchild Semiconductor reserves the right to make
changes at any time without notice in order to improve
design.
No Identification Needed
Obsolete
Full Production
This datasheet contains final specifications. Fairchild
Semiconductor reserves the right to make changes at
any time without notice in order to improve design.
Not In Production
This datasheet contains specifications on a product
that has been discontinued by Fairchild semiconductor.
The datasheet is printed for reference information only.
Rev. I20
10
FDP18N50 / FDPF18N50 Rev. A
