onsemi-FDPF14N30

Part #onsemi-FDPF14N30
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onsemi-FDPF14N30
November 2013  
FDPF14N30  
N-Channel UniFET
 
MOSFET  
300 V, 14 A, 290 m
Ω
 
TM  
Features  
Description  
UniFET

TM

MOSFET is Fairchild Semiconductor’s high voltage  
MOSFET family based on planar stripe and DMOS technology.  
This MOSFET is tailored to reduce on-state resistance, and to  
provide better switching performance and higher avalanche  
energy strength. This device family is suitable for switching  
power converter applications such as power factor correction  
(PFC), flat panel display (FPD) TV power, ATX and electronic  
lamp ballasts.  
•
•
•
•
•
R

DS(on)

= 290 m
Ω
(Max.) @ V

GS

= 10 V, I

D

= 7 A  
Low Gate Charge (Typ. 18 nC)  
Low C

rss

(Typ. 17 pF)  
100% Avalanche
T
e
sted  
Improved dv/dt Capability  
Applications  
•
•
PDP TV  
Uninterruptible Power Supply  
D
G
G
D
S
TO-220F  
S
Absolute Maximum Ratings
 
T

C

= 25°C unless otherwise noted.  
Symbol  
V

DSS  

Parameter  
FDPF14N30  
Unit  
Drain-Source Voltage  
Drain Current  
300  
V
I

D  

– Continuous (T

C

= 25
°
C)  
– Continuous (T

C

= 100
°
C)  
1
4 *  
8.4
*  
A
A
(Note 1)  
I

DM  

Drain Current  
– Pulsed  
56
*  
30  
A
V
V

GSS  

E

AS  

I

AR  

Gate-Source voltage  
(Note 2)  
(Note 1)  
(Note 1)  
(Note 3)  
Single Pulsed Avalanche Energy  
Avalanche Current  
330  
14  
mJ  
A
E

AR  

dv/dt  
P

D  

Repetitive Avalanche Energy  
Peak Diode Recovery dv/dt  
14  
mJ  
V/ns  
4.5  
Power Dissipation  
(T

C

= 25
°
C)  
– Derate above 25
°
C  
Operating and Storage
T
e
mperature Range  
Maximum Lead
T
e
mperature for Soldering, 1/8” from Case for 5 Seconds  
35  
0.28  
W
W/
°
C  
T

J,

T

STG  

-55 to +150  
300  
°
C  
°
C  
T

L  

*Drain current limited by maximum junction temperature.  
Thermal Characteristics  
Symbol  
R

θ
JC  

R

θ
JA  

Parameter  
FDPF14N30  
3.56  
Unit  
Thermal Resistance, Junction-to-Case, Max.  
Thermal Resistance, Junction-to-Ambient, Max.  
°
C/W  
62.5  
©2007 Fairchild Semiconductor Corporation  
FDPF14N30 Rev. C1  
1

Package Marking and Ordering Information  
Part Number  
Top Mark  
Package  
Packing Method  
Reel Size  
Tape Width  
Quantity  
FDPF14N30  
FDPF14N30  
TO-220F  
Tube  
N/A  
N/A  
50 units  
Electrical Characteristics
 
T

C

= 25°C unless otherwise noted.  
Symbol  
Parameter  
Conditions  
Min.  
Typ.  
Max.  
Unit  
Off Characteristics  
BV

DSS  

Drain-Source Breakdown Voltage  
V

GS

= 0
V
,
I

D

= 250
μ
A  

D

= 250
μ
A, Referenced to 25
°
C  
300  
—  
—  
—  
—  
V
Δ
BV

DSS  

/
Δ
T

J  

Breakdown Voltage
T
e
mperature  
Coefficient  
I
0.3  
V/
°
C  
I

DSS  

Zero Gate Voltage Drain Current  
V

DS

= 300 V, V

GS

= 0 V  

DS

= 240 V, T

C

= 125
°
C  
—  
—  
—  
—  
1
10  
μ
A  
μ
A  
V
I

GSSF  

I

GSSR  

Gate-Body Leakage Current, Forward  
Gate-Body Leakage Current, Reverse  
V

GS

= 30
V
,
V

DS

= 0 V  
V

GS

= -30 V, V

DS

= 0 V  
—  
—  
—  
—  
100  
nA  
nA  
-100  
On Characteristics  
V

GS(th)

Gate Threshold Voltage  
R

DS(on)  

V

DS

= V

GS

, I

D

= 250
μ
A  
3.0  
—  
—  
5.0  
0.29  
—  
V
Ω
S
Static Drain-Source  
On-Resistance  
V

GS

= 10
V
,
I

D

= 7 A  
0.24  
10.5  
g

FS  

Forward Transconductance  
V

DS

= 40
V
,
I

D

= 7 A  
—  
Dynamic Characteristics  
C

iss  

C

oss  

C

rss  

Input Capacitance  
V

DS

= 25
V
, V

GS

= 0 V,  
f = 1.0 MHz  
—  
—  
—  
815  
150  
17  
1060  
195  
25  
pF  
pF  
pF  
Output Capacitance  
Reverse Transfer Capacitance  
Switching Characteristics  
t

d(on)

Turn-On Delay Time  
t

r  

t

d(off)  

t

f  

V

DD

= 150
V
,
I

D

= 14 A,  
—  
—  
—  
—  
—  
—  
—  
20  
105  
30  
75  
18  
4.5  
8
50  
120  
70  
160  
25  
—  
ns  
ns  
V

GS

= 10
V
,
R

G

= 25
Ω  
Turn-On Rise Time  
Turn-Off Delay Time  
Turn-Off Fall Time  
T
o
tal Gate Charge  
Gate-Source Charge  
Gate-Drain Charge  
ns  
(Note 4)  
(Note 4)  
ns  
Q

g  

V

DS

= 240 V, I

D

= 14 A,  

GS

= 10 V  
nC  
nC  
nC  
V
Q

gs  

Q

gd  

—  
Drain-Source Diode Characteristics and Maximum Ratings  
I

S  

Maximum Continuous Drain-Source Diode Forward Current  
Maximum Pulsed Drain-Source Diode Forward Current  
—  
—  
—  
—  
—  
—  
—  
14  
56  
1.4  
—  
A
A
I

SM  

V

SD  

t

rr  

Drain-Source Diode Forward Voltage  
Reverse Recovery Time  
V

GS

= 0
V
,
I

S

= 14 A  
—  
V
V

GS

= 0
V
,
I

S

= 14 A,  
235  
1.6  
ns  
μ
C  
dI

F

/dt =100 A/
μ
s  
Q

rr  

Reverse Recovery Charge  
—  
Notes:  
1. Repetitive rating: pulse-width limited by maximum junction temperature.  
2. L = 2.8 mH, I
 
= 14 A, V
 
= 50 V, R
 
= 25
Ω
, starting T
 
= 25
°
C.  
AS  
DD  
G
J
3. I
 
≤
14 A, di/dt
≤
200 A/
μ
s, V
 
≤
BV  
, starting T
 
= 25
°
C.  
SD  
DD  
DSS  
J
4. Essentially independent of operating temperature typical characteristics.  
©2007 Fairchild Semiconductor Corporation  
FDPF14N30 Rev. C1  
2

Typical Performance Characteristics  
Figure 1. On-Region Characteristics  
Figure 2. Transfer Characteristics  
10

2  

10

1  

10

0  

V

GS  

10

2  

10

1  

10

0  

10

-1  

Top :  
15.0 V  
10.0 V  
8.0 V  
7.0 V  
6.5 V  
6.0 V  
Bottom :
 
5.5 V  
150

o

C  
25

o

C  
-55

o

C  
* Notes :  
1. V

DS

= 40V  
* Notes :  
1. 250
μ
s Pulse Test  
2. 250
μ
s Pulse Test  
o
2. T

C

= 25 C  
2
4
6
8
10  
12  
10

-1  

10

0  

10

1  

V

GS

, Gate-Source Voltage [V]  
V

DS

, Drain-Source Voltage [V]  
Figure 3. On-Resistance Variation vs.  
Drain Current and Gate Voltage  
Figure 4. Body Diode Forward Voltage  
Variation vs. Source Current  
and Temperatue  
1.3  
1.2  
1.1  
1.0  
10

2  

0.9  
0.8  
0.7  
0.6  
0.5  
0.4  
0.3  
0.2  
0.1  
V

GS

= 10V  
10

1  

V

G
S

= 20V  
150

o

C  
25

o

C  
* Notes :  
1. V

GS

= 0V  
2. 250
μ
s Pulse Test  
o
* Note : T

J

= 25 C  
10

0  

0.2  
0.4  
0.6  
0.8  
1.0  
1.2  
1.4  
1.6  
1.8  
2.0  
2.2  
2.4  
0
5
10  
15  
20  
25  
30  
35  
40  
45  
V

SD

, Source-Drain voltage [V]  
I

D

, Drain Current [A]  
Figure 5. Capacitance Characteristics  
Figure 6. Gate Charge Characteristics  
2000  
12  
10  
8
C
C

iss

= C

gs

+ C

gd

(C

ds

= shorted)  

oss

= C

ds

+ C

gd  

C

rss

= C

gd  

V

DS

= 60V  
V

DS

= 150V  
C

oss  

C
V

DS

= 240V  
iss  
1000  
6
4
* Note :  
1. V

GS

= 0 V  
2. f = 1 MHz  
C
rss  
2
* Note : I

D

= 14A  
0
10

-1  

0
10

0  

10

1  

0
2
4
6
8
10  
12  
14  
16  
18  
20  
V

DS

, Drain-Source Voltage [V]  
Q

G

, Total Gate Charge [nC]  
©2007 Fairchild Semiconductor Corporation  
FDPF14N30 Rev. C1  
3

Typical Performance Characteristics
(Continued)  
Figure 7. Breakdown Voltage Variation  
vs. Temperature  
Figure 8. On-Resistance Variation  
vs. Temperature  
3.0  
2.5  
2.0  
1.5  
1.0  
1.2  
1.1  
1.0  
*
N
otes :  
1. V

G
S

= 0 V  
0.9  
* Notes :  
1. V

G
S

= 10 V  
2. I

D

=
2
50
μ
A  
0.5  
2. I

D

= 7 A  
0.8  
-100  
0.0  
-100  
-50  
0
50  
100  
150  
200  
-50  
0
50  
100  
150  
200  
T,
J
unction Temperature [

o

C
]  
T

J

, Junction Temperature [

o

C
]  
J
Figure 9. Maximum Safe Operating Area  
Figure 10. Maximum Drain Current  
vs. Case Temperature  
15  
10  
5
10

2  

10
μ
s  
100
μ
s  
10

1  

1
m
s  
10 ms  
100 ms  
DC  
Operation in This Area  
is Limited by R

DS(on)  

10

0  

10

-1  

10

-2  

* Notes :  
1. T

C

= 25

o  

2. T

J

= 150

o  

C
C
3. Single Pulse  
0
25  
50  
75  
100  
125  
150  
10

0  

10

1  

10

2  

T

C

, Case Temperature [

o

C]  
V

DS

, Drain-Source Voltage [V]  
Figure 11. Transient Thermal Response Curve  
1 0

1  

D =
0
.5  
0.2  
1 0

0  

0.1  
P

DM  

0.05  
t

1  

1 0

-1  

0.02  
t

2  

0.01  
*
N o te s  
1. Z
 

θ
J
C

(
t)  
2. D
 
u ty
 
F a c to r,
 
D = t

1

/t

2  

3. T
 

J
M

T

C

P

D M
 

Z

θ
J
C

(
t)  
:
o
=
3 .5 6
 
C /W
 
M a x.  
1 0

-2  

single pulse  
–
=
*
1 0

-5  

1 0

-4  

1 0

-3  

1 0

-2  

1 0

-1  

1 0

0  

1 0

1  

t

1

, S
 
q u
a
re
 
W a
 
ve P
 
ulse D
 
u ra tio n
 
[se c]  
©2007 Fairchild Semiconductor Corporation  
FDPF14N30 Rev. C1  
4

V

GS  

Same Type  
as DUT  
50K
Ω
 
Q

g  

12V  
200nF  
300nF  
V

DS  

V

GS  

Q

gs  

Q

gd  

DUT  
I
= const.  
G
Charge  
Figure 12. Gate Charge Test Circuit & Waveform  
R

L  

V

DS  

90%  
V

DS  

V

DD  

V

GS  

R

G  

10%  
V

GS  

DUT  
V
GS  
t

d(on)  

t

r  

t

d(off)  

t

f  

t

on  

t

off  

Figure 13. Resistive Switching Test Circuit & Waveforms  
BV

DSS  

——————–  
BV

DSS

– V

DD  

L
1
2
2
—-  
E

AS  

=
L I

AS  

V

DS  

I

D  

BV

DSS  

I

AS  

R

G  

V

DD  

I

D

(t)  
V
V

DS

(t)  
V

DD  

DUT  

G

S  

t

p  

t

p  

Time  
Figure 14. Unclamped Inductive Switching Test Circuit & Waveforms  
©2007 Fairchild Semiconductor Corporation  
FDPF14N30 Rev. C1  
5

+
DUT  
V

DS  

_
I

SD  

L
Driver  
R

G  

Same Type  
as DUT  
V

DD  

V

GS  

• dv/dt controlled by
 
R

G  

• I

SD

controlled by pulse period  
Gate Pulse Width  
————————–  
V

GS  

D =  
Gate Pulse Period  
10V  
( Driver )  
I

FM

, Body Diode Forward Current  
I

SD  

di/dt  
( DUT )  
I

RM  

Body Diode Reverse Current  
Body Diode Recovery dv/dt  
V

SD  

V

DS  

( DUT )  
V

DD  

Body Diode  
Forward Voltage Drop  
Figure 15. Peak Diode Recovery dv/dt Test Circuit & Waveforms  
©2007 Fairchild Semiconductor Corporation  
FDPF14N30 Rev. C1  
6

Mechanical Dimensions  
Figure 16. TO220, Molded, 3-Lead, Full Pack, EIAJ SC91, Straight Lead  
Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner  
without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or  
obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions, specif-  
ically the warranty therein, which covers Fairchild products.  
Always visit Fairchild Semiconductor’s online packaging area for the most recent package drawings:  
©2007 Fairchild Semiconductor Corporation  
FDPF14N30 Rev. C1  
7

TRADEMARKS  
The following includes registered and unregistered trademarks and service marks, owned by Fairchild Semiconductor and/or its global subsidiaries, and is not  
intended to be an exhaustive list of all such trademarks.  
AccuPower™  
AX-CAP *  
BitSiC™  
Build it Now™  
CorePLUS™  
CorePOWER™  
CROSSVOLT
™  
CTL™  
F-PFS™  
FRFET  
Sync-Lock™  
®*  
®
®
®
tm  
®
Global Power Resource

SM  

GreenBridge™  
Green FPS™  
PowerTrench  
PowerXS™  
Programmable Active Droop™  
QFET  
QS™  
Quiet Series™  
RapidConfigure™  
™
®
TinyBoost  
TinyBuck  
®
®
Green FPS™ e-Series™  
G
max
™  
GTO™  
TinyCalc™  
®
TinyLogic  
TINYOPTO™  
TinyPower™  
TinyPWM™  
TinyWire™  
TranSiC™  
TriFault Detect™  
Current Transfer Logic™  
IntelliMAX™  
®
DEUXPEED  
ISOPLANAR™  
Marking Small Speakers Sound Louder  
and Better™  
MegaBuck™  
MICROCOUPLER™  
MicroFET™  
MicroPak™  
MicroPak2™  
MillerDrive™  
MotionMax™  
Dual Cool™  
®
EcoSPARK  
Saving our world, 1mW/W/kW at a time™  
SignalWise™  
SmartMax™  
EfficentMax™  
ESBC™  
®
TRUECURRENT *  
μ
SerDes™  
SMART START™  
®
Solutions for Your Success™  
®
®
SPM  
Fairchild  
®
STEALTH™  
SuperFET  
SuperSOT™-3  
SuperSOT™-6  
SuperSOT™-8  
Fairchild Semiconductor  
FACT Quiet Series™  
®
®
UHC  
®
Ultra FRFET™  
UniFET™  
VCX™  
VisualMax™  
VoltagePlus™  
XS™  
®
mWSaver  
OptoHiT™  
OPTOLOGIC  
OPTOPLANAR  
FACT  
FAST  
®
®
FastvCore™  
FETBench™  
FPS™  
®
®
SupreMOS  
SyncFET™  
*Trademarks of System General Corporation, used under license by Fairchild Semiconductor.  
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FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE  
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THESE SPECIFICATIONS DO NOT EXPAND THE TERMS OF FAIRCHILD’S WORLDWIDE TERMS AND CONDITIONS, SPECIFICALLY THE WARRANTY  
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support devices or systems are devices or systems which, (a) are  
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2. A
 
critical component in any component of a life support, device, or  
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PRODUCT STATUS DEFINITIONS  
Definition of Terms  
Datasheet Identification  
Product Status  
Definition  
Datasheet contains the design specifications for product development. Specifications  
may change in any manner without notice.  
Advance Information  
Formative / In Design  
Datasheet contains preliminary data; supplementary data will be published at a later  
date. Fairchild Semiconductor reserves the right to make changes at any time without  
notice to improve design.  
Preliminary  
First Production  
Datasheet contains final specifications. Fairchild Semiconductor reserves the right to  
make changes at any time without notice to improve the design.  
No Identification Needed  
Obsolete  
Full Production  
Datasheet contains specifications on a product that is discontinued by Fairchild  
Semiconductor. The datasheet is for reference information only.  
Not In Production  
Rev. I66  
©2007 Fairchild Semiconductor Corporation  
FDPF14N30 Rev. C1  
8